From: Arnab Basu <arnab.b...@freescale.com> Remove trailing UL from CONFIG_SYS_SDRAM_BASE to be used from assembly. Fix CPU_RELEASE_ADDR to use the beginning of SDRAM.
Signed-off-by: Arnab Basu <arnab.b...@freescale.com> Signed-off-by: York Sun <york...@freescale.com> --- This set depends on this bundle http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/ include/configs/ls2085a_common.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 2bd5a47..49e2971 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -45,14 +45,18 @@ #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ -/* SMP Definitions */ -#define CPU_RELEASE_ADDR CONFIG_SYS_INIT_SP_ADDR - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL +/* + * SMP Definitions + * Spin table is at the beginning of boot page. + */ +#define SECONDARY_CPU_BOOT_PAGE (CONFIG_SYS_SDRAM_BASE) +#define CPU_RELEASE_ADDR SECONDARY_CPU_BOOT_PAGE + /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 12000000 /* 12MHz */ -- 1.7.9.5 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
