Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
Cc: Minkyu Kan
Support for USB UDC driver at trats board.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
Cc: Minkyu Kang
---
Changes for v2:
- replace puts to debug
---
board/samsung/trats/trats.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/b
Support for f_dfu USB function.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
---
Changes for v2:
- Replace kzalloc and kfree with free and calloc
- Reorganization of calloc calls
- Misspelling corrected
- Redesign of DFU state machine from "switch case" to funct
Support for MMC storage devices to work with DFU framework.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
---
Changes for v2:
- None
Changes for v3:
- Provide special abstraction layer (mmc_{block|file}_{read|write})
to alleviate switch to new device model (DM)
Support for u-boot's "dfu [list]" command.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
---
Changes for v2:
- None
Changes for v3:
- Remove unnecessary initialization to NULL of dynamic variables
- goto done added to reduce code duplication
- static definition
New, separate driver at ./drivers/dfu has been added. It allows platform
and storage independent operation of DFU.
It has been extended to use new MMC level of command abstraction.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
---
Changes for v2:
- None
Changes f
Those patches add support for composite USB download gadget.
This gadget (at least for now) is equipped with DFU download function.
A separate DFU back-end and front-end have been added.
Back-end is placed at ./drivers/dfu directory. The front-end is implemented
as USB function.
The back-end is w
Composite USB download gadget support (g_dnl) for download functions.
This code works on top of composite gadget.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Cc: Marek Vasut
---
Changes for v2:
- G_DNL_{VENDOR_NUM, PRODUCT_NUM and MANUFACTURER} defined at
./include/configs/.h
Hello
Help make a u-bottles for sti7109 for mb442 motherboards and Linux to boot
in 32bit mode. (now loaded in 29bit mode)
Thanks in advance.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.
Signed-off-by: Thierry Reding
---
board/avionic-design/dts/tegra20-tec.dts | 11 +++
include/configs/tec.h
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a91
On Sun, Jul 29, 2012 at 11:53:24PM -0700, Simon Glass wrote:
> This series adds NAND flash support to Tegra and enables it on Seaboard.
>
> Included here is a proposed device tree binding with most of the properties
> private to "nvidia,". The binding includes information about the NAND
> controll
> -Original Message-
> From: Michael Walle [mailto:mich...@walle.cc]
> Sent: 31 July 2012 02:17
> To: u-boot@lists.denx.de
> Cc: Michael Walle; Prafulla Wadaskar
> Subject: [PATCH] lsxl: support power switch
>
> This patch restores the Linkstation's original behaviour when powering
> off
> -Original Message-
> From: Jamie Lentin [mailto:j...@lentin.co.uk]
> Sent: 31 July 2012 03:26
> To: u-boot@lists.denx.de
> Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net;
> ub...@lukaperkov.net; Jamie Lentin
> Subject: [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320
>
> Exte
On 31.07.2012 07:56, Dirk Behme wrote:
Hi,
now, after U-Boot v2012.07 is released, I'd like to ask what's the
status the dcache support for i.MX(6)? Is it safe to enable
CONFIG_SYS_DCACHE_OFF now?
Arg, inverted logic ;) I meant 'disable/remove' CONFIG_SYS_DCACHE_OFF
here. I.e. is it save to
Hi,
now, after U-Boot v2012.07 is released, I'd like to ask what's the
status the dcache support for i.MX(6)? Is it safe to enable
CONFIG_SYS_DCACHE_OFF now? E.g. for the SabreLite [1]?
And if so, do we have to enable CONFIG_MMC_BOUNCE_BUFFER, too?
Opinions?
Many thanks and best regards
Di
Dear Jamie Lentin
> -Original Message-
> From: Jamie Lentin [mailto:j...@lentin.co.uk]
> Sent: 31 July 2012 03:26
> To: u-boot@lists.denx.de
> Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net;
> ub...@lukaperkov.net; Jamie Lentin
> Subject: [RESEND] [PATCH 0/2] kirkwood: Generalise dns325
On Mon, Jul 30, 2012 at 11:37:52AM -0600, Stephen Warren wrote:
> diff --git a/include/configs/harmony.h b/include/configs/harmony.h
[...]
> /* Environment not stored */
> -#define CONFIG_ENV_IS_NOWHERE
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K se
Dear Jim Lin,
> >-Original Message-
> >From: Marek Vasut [mailto:marek.va...@gmail.com]
> >Sent: Monday, July 30, 2012 8:02 PM
> >To: Jim Lin
> >Cc: Wolfgang Denk; Tom Warren; u-boot@lists.denx.de
> >Subject: Re: [U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB
> >controllers at onc
Dear Wolfgang Denk,
Please pull these patches to your repository. There will be one simple merge
conflict
around SPI makefile which is easy to resolve.
dts/ patch is acked by Simon
Thanks,
Michal
The following changes since commit 436da3cd233e7166b5ce9293dbd28092cf37bcc9:
u-b...@lakedaemon
On 07/29/2012 12:25 AM, Stephan Linz wrote:
Depending on XILINX_SPI_FLASH_BASEADDR enable SPI flash
and environment in SPI flash.
Expected values from xparameters.h are:
- XILINX_SPI_FLASH_BASEADDR
- XILINX_SPI_FLASH_MAX_FREQ
- XILINX_SPI_FLASH_CS
Signed-off-by: Stephan Linz
---
On 07/29/2012 12:25 AM, Stephan Linz wrote:
This is an improved version of the driver patch original
submitted by Graeme Smecher
The changes are:
- remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
use CONFIG_SYS_SPI_BASE from config.h instead
- add extensive register struc
Dear Jim Shimer,
In message
you wrote:
>
> Here's a patch.
Please read http://www.denx.de/wiki/U-Boot/Patches
User git-format-patch and git-send-email (or makae sure yourself to
stick to the mandatory format, which includes for example the
"[PATCH]" marker in the subject, and submit inline, no
Hi Marek,
Here's a patch.
-Jim
On Mon, Jul 30, 2012 at 7:41 PM, Marek Vasut wrote:
> Dear Jim Shimer,
>
> > Marek,
> >
> > I don't have a USB 1.x device to do that regression. Taking the call to
> > usb_test_unit_ready out of the block reads/writes and leaving it only in
> > get info really sp
Marek,
I don't have a USB 1.x device to do that regression. Taking the call to
usb_test_unit_ready out of the block reads/writes and leaving it only in
get info really speed up ext2load. With the recent cache changes on top of
this and the 5ms delay, we're getting fairly close to the Linux USB
tr
>-Original Message-
>From: Marek Vasut [mailto:marek.va...@gmail.com]
>Sent: Monday, July 30, 2012 8:02 PM
>To: Jim Lin
>Cc: Wolfgang Denk; Tom Warren; u-boot@lists.denx.de
>Subject: Re: [U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB
>controllers at once
>
>Dear Jim Lin,
>
>> >--
Dear Marek Vasut,
On Tue, Jul 31, 2012 at 12:38:54 AM, Marek Vasut wrote:
> [...]
>
> > > > Can you explain where this gain would come from? In both cases,
> > > > the
> > > > data in USB
> > > > transfers would be organized in the same way, and it would be
> > > > accessed in memory
> > > > also
Dear Jim Shimer,
> Marek,
>
> I don't have a USB 1.x device to do that regression. Taking the call to
> usb_test_unit_ready out of the block reads/writes and leaving it only in
> get info really speed up ext2load. With the recent cache changes on top of
> this and the 5ms delay, we're getting fa
On 07/30/2012 01:53 AM, Simon Glass wrote:
> diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
> index f95be58..d936b1e 100644
> --- a/arch/arm/dts/tegra20.dtsi
> +++ b/arch/arm/dts/tegra20.dtsi
> @@ -204,4 +204,11 @@
> compatible = "nvidia,tegra20-kbc";
>
On 07/30/2012 01:53 AM, Simon Glass wrote:
> The NAND layer needs to use cache-aligned buffers by default. Towards this
> goal. align the default buffers and their members according to the minimum
> DMA alignment defined for the architecture.
>
> Signed-off-by: Simon Glass
> ---
> Changes in v2:
On 07/30/2012 12:38 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> This allows cache flush/invalidate operations to succeed on the buffers.
>
> Signed-off-by: Stephen Warren
> ---
> common/env_nand.c | 10 +-
> 1 files changed, 5 insertions(+), 5 deletions(-)
Acked-by: Scott W
Dear Jim Shimer,
> While tuning ext2load, we found that usb_test_unit_ready was being called
> every block read. We compared the usb block storage to the scsi block
> storage cmd_scsi.c, and found that the scsi device was only calling its
> scsi_setup_test_unit_ready() during scsi_can. It appear
On 07/30/2012 01:53 AM, Simon Glass wrote:
> Add a flash node to handle the NAND, including memory timings and
> page / block size information.
>
> Signed-off-by: Simon Glass
> ---
> Changes in v2:
> - Update NAND binding to add "nvidia," prefix
>
> Changes in v3:
> - Add reg property for unit a
Dear Benoît Thébaudeau,
[...]
> > > Can you explain where this gain would come from? In both cases, the
> > > data in USB
> > > transfers would be organized in the same way, and it would be
> > > accessed in memory
> > > also in the same way (regarding bursts). The only difference would
> > > be
On 07/30/2012 01:53 AM, Simon Glass wrote:
> From: Jim Lin
>
> A device tree is used to configure the NAND, including memory
> timings and block/pages sizes.
>
> If this node is not present or is disabled, then NAND will not
> be initialized.
>
> Signed-off-by: Jim Lin
> Signed-off-by: Simon G
So we can re-use DNS-325 configuration for the DNS-320 without things getting
confusing, rename all common parts from dns325 to dnskw, and use a config
option to configure DNS-325 specifics.
Signed-off-by: Jamie Lentin
Cc: prafu...@marvell.com
Cc: albert.u.b...@aribaud.net
---
board/d-link/{dns3
Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For more
information on this NAS, see:-
http://jamie.lentin.co.uk/devices/dlink-dns320
http://dns323.kood.org/dns-320
http://sharecenter.dlink.com/products/DNS-320
Signed-off-by: Jamie Lentin
Cc: prafu...@marvell.com
Cc: albe
I submitted this a while ago[0], it would be nice to see it included
if possible. It generalises the DNS325 support so that it can be used
for both the DNS320 and DNS325.
Luka Perkov stated "I have no more questions regarding this patch", not
sure if this counts as an ACK. The patch here is ~same,
Hi Wolfgang,
On Mon, Jul 30, 2012 at 10:10 PM, Wolfgang Denk wrote:
> Dear Simon Glass,
>
> In message
> you
> wrote:
>>
>> > - env_t env_new;
>> > + ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, sizeof(env_t));
>>
>> I think this should b
>
> Should be ... ???
Sorry, I started a com
Dear Simon Glass,
In message
you wrote:
>
> > - env_t env_new;
> > + ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, sizeof(env_t));
>
> I think this should b
Should be ... ???
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 1
Hi Mike,
On Wed, Jul 25, 2012 at 1:49 PM, Mike Frysinger wrote:
> On Tuesday 24 July 2012 16:11:15 Joe Hershberger wrote:
>> --- a/drivers/net/netconsole.c
>> +++ b/drivers/net/netconsole.c
>> @@ -131,8 +131,17 @@ static void nc_send_packet(const char *buf, int len)
>> }
>>
>> if (eth
On Mon, Jul 30, 2012 at 3:53 PM, Bill wrote:
> Progress! I switched all the references from ttyAMA0... to ttyAM0. Also
> changed netargs too. Now it starts to boot linux but hangs right after the
> line of:
> mxs_cpu_init: cpufreq init finished.
Please remove cpufreq from your kernel c
From: Stephen Warren
When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that th
From: Stephen Warren
eMMC devices may have hardware-level partitions: 2 boot partitions,
up to 4 general partitions, plus the user area. This change introduces
optional config variable CONFIG_SYS_MMC_ENV_PART to indicate which
partition the environment should be stored in: 0=user, 1=boot0, 2=boot
From: Stephen Warren
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.
Note that the Linux kernel enables access to boot partiti
From: Stephen Warren
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.
Note that the Linux kernel enables access to boot partiti
This patch restores the Linkstation's original behaviour when powering off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the switch
is in the off position, before continuing the boot process again.
Additional
On Mon, Jul 30, 2012 at 6:38 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> This allows cache flush/invalidate operations to succeed on the buffers.
>
> Signed-off-by: Stephen Warren
Acked-by: Simon Glass
> ---
> common/env_nand.c | 10 +-
> 1 files changed, 5 insertions(+),
On Mon, Jul 30, 2012 at 6:37 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> Signed-off-by: Stephen Warren
Acked-by: Simon Glass
(nice to have a commit message though)
> ---
> board/nvidia/dts/tegra20-harmony.dts | 10 ++
> include/configs/harmony.h|9
Albert,
Please pull u-boot-tegra/master into ARM master. Thanks!
The following changes since commit f8f09dd40423b7f9ea0f0b810a8f5da9cd580a17:
Benoît Thébaudeau (1):
ARM1136: Fix cache range checks
are available in the git repository at:
git://git.denx.de/u-boot-tegra master
Allen M
While tuning ext2load, we found that usb_test_unit_ready was being called
every block read. We compared the usb block storage to the scsi block
storage cmd_scsi.c, and found that the scsi device was only calling its
scsi_setup_test_unit_ready() during scsi_can. It appears that
usb_test_unit_ready
The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported). Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, r
Hello all,
U-Boot v2012.07 has been released and is available from the git
repository and the FTP server.
The Merge Window for the next release (v2012.10) is open until
Sat Aug 18, 2012, 23:59:59 CEST = 19 days remaining.
Release "v2012.10" is scheduled in 77 days — on October 15, 2012.
A
Dear Gerlando,
In message <5016d241.4030...@keymile.com> you wrote:
>
> > Please also try with -M -C and see if this changes anything.
>
> For this one patch I can't get git to detect renames.
Neither can I. Thanks for trying, though.
Best regards,
Wolfgang Denk
--
DENX Software Engineering
Progress! I switched all the references from ttyAMA0... to ttyAM0.
Also changed netargs too. Now it starts to boot linux but hangs right
after the line of:
mxs_cpu_init: cpufreq init finished.
In regards to your question, yes it was booting the mainline kernel.
Here is the latest out
On 07/27/2012 07:31 PM, Wolfgang Denk wrote:
Dear Gerlando Falauto,
In message<1343402200-32020-5-git-send-email-gerlando.fala...@keymile.com> you
wrote:
The only file including km82xx-common.h is km82xx.h.
So there is no need to have it as a separate file.
Signed-off-by: Gerlando Falauto
--
Dear Linu Cherian,
In message <1343377313-30301-1-git-send-email-linucher...@gmail.com> you wrote:
> Hawkboard was using the wrong nand_read_page version for SPL image.
> As a side effect, the u-boot image loaded by the SPL from nand
> was getting corrupted.
>
> Enable CONFIG_SYS_NAND_HW_ECC_OOBF
Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need
to keep them as separate .h config files.
Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h
file.
Signed-off-by: Gerlando Falauto
---
Changes from v1:
switched to git v1.7.11.3, used git format-patch
On 07/30/2012 06:07 PM, Wolfgang Denk wrote:
Dear Gerlando Falauto,
In message<5016a093.6040...@keymile.com> you wrote:
The way I understand it, such renaming information is built on the fly
while building the patch (like you're suggesting, it's a parameter to
git format-patch, not to the com
> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 30 July 2012 14:53
> To: Gerlando Falauto
> Cc: u-boot@lists.denx.de; Holger Brunck; Prafulla Wadaskar
> Subject: Re: [U-Boot] [PATCH] km/common: remove printfs for i2c
> deblocking code
>
> Hello Gerlando,
>
> On
This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.
Signed-off-by: Markus Hubig
Cc: Andreas Bießmann
---
board/taskit/stamp9g20/Makefile| 52
board/
Stephen,
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Monday, July 30, 2012 10:34 AM
> To: Simon Glass
> Cc: U-Boot Mailing List; Tom Warren; Scott Wood
> Subject: Re: [PATCH v4 0/6] tegra: Add NAND flash support
>
> On 07/30/2012 12:53 AM, Simon Glas
From: Stephen Warren
This allows cache flush/invalidate operations to succeed on the buffers.
Signed-off-by: Stephen Warren
---
common/env_nand.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/common/env_nand.c b/common/env_nand.c
index e8daec9..e635472 10064
From: Stephen Warren
Signed-off-by: Stephen Warren
---
board/nvidia/dts/tegra20-harmony.dts | 10 ++
include/configs/harmony.h|9 -
2 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/board/nvidia/dts/tegra20-harmony.dts
b/board/nvidia/dts/tegra20-
On 07/30/2012 12:53 AM, Simon Glass wrote:
> This series adds NAND flash support to Tegra and enables it on Seaboard.
>
> Included here is a proposed device tree binding with most of the properties
> private to "nvidia,". The binding includes information about the NAND
> controller as well as the
Simon,
> -Original Message-
> From: Simon Glass [mailto:s...@chromium.org]
> Sent: Sunday, July 29, 2012 11:53 PM
> To: U-Boot Mailing List
> Cc: Tom Warren; Stephen Warren; Scott Wood; Simon Glass
> Subject: [PATCH v4 0/6] tegra: Add NAND flash support
>
> This series adds NAND flash sup
On Mon, Jul 30, 2012 at 04:34:39PM +, Laurence Withers wrote:
> On Mon, Jul 30, 2012 at 04:30:15PM +, Laurence Withers wrote:
> > Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
> > definition. In addition, don't request this clock ID on DA830 hardware,
> > which does no
On Mon, Jul 30, 2012 at 2:06 PM, Bill wrote:
> Here is my log. It stops at the "done, booting kernel."I tried setting
> the console to ttyAM0 and no change. I don't think its booting as I don't
> see the LCD flash and no penguin. The odd this is that I built the latest
> kernel for iMX and
On Wed, Jul 25, 2012 at 02:22:15AM +0400, Ilya Yanok wrote:
>
> These patches add CPSW switch driver and enable support for it
> on TI AM335x based boards. This version is rebased on top of
> u-boot-ti/next. Also now CPSW driver uses internal controller
> memory for DMA descriptors so coherent all
Here is my log. It stops at the "done, booting kernel."I tried
setting the console to ttyAM0 and no change. I don't think its booting
as I don't see the LCD flash and no penguin. The odd this is that I
built the latest kernel for iMX and this uboot will boot it. I also
included my u-bo
On Sat, Jul 28, 2012 at 01:19:31PM +0200, Javier Martinez Canillas wrote:
> IGEP-based boards can have two different flash memories, a OneNAND or a
> NAND device.
>
> Since u-boot still lacks of a device model to be the able to look at
> run-time which memory type is available on a the board, a b
On Mon, Jul 30, 2012 at 7:27 AM, Tom Rini wrote:
>> After adding a few printf's, it seems that the crash/hang is occurring
>> when calling env_relocate_spec in env_nand.c, which of course is
>> completely unrelated code!
>
> I've spent some time scratching my head against a hang in the same spot,
The various ratio1 fields are not documented in any of the documentation
I can find. Removing these and testing has yielded success, so remove
the code that sets them and move their locations into the reserved
fields.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/ddr.c | 1
A number of memory initalization functions were int and always returned
0. Further it's not feasible to be doing error checking here, so simply
turn them into void functions.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/ddr.c | 29 ++-
arch/arm/cpu
Rather than defining our own structs to note what to use when
programming the EMIF and related re-use the emif_regs struct.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/ddr.c | 28 -
arch/arm/cpu/armv7/am33xx/emif4.c | 43 ---
- Remove the call to set ddrctrl->ddrioctrl as it's all zeros.
- Comment what we're really setting in ddrctrl->ddrckectrl which is that
we're operating in the normal mode where EMIF/PHY clock is controlled
by the PHY.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/emif4.c |
This function sets a number of related registers to the same value (the
registers in question all have the same field descriptions and are
related in operation). Rather than defining a struct and setting the
value repeatedly, just pass in the value.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv
From: Vaibhav Bedia
EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.
Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines
- Remove a handful of unused defines.
- Prefix more values with 'DDR2' as DDR3 will require different values.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/emif4.c | 46 +--
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 32 +++
2 file
Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value. This call can be delayed
slightly to the point where we know which type of memory we have.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/clock.c|5 ++---
arch/ar
We need to pass in the type of memory that is connected to the board.
The only reliable way to do this is to know what type of board we are
running on (which later will be knowable in s_init()). For now, pass in
the value of DDR2.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/board.c
Rework the EMIF4/DDR code slightly to setup the structs that
config_cmd_ctrl and config_ddr_data take to be setup at compile time and
mark them as const. This lets us simplify the calling path slightly as
well as making it easier to deal with DDR3.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7
With the previous bugfix we now don't need to set two different REF_CTRL
values and instead set the final value.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/emif4.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.
We do not need to check for EMIF_GCLK and L3_GCLK being active. This
was a hold-over from bringup and no longer required.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/clock.c |5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c
b/arch/arm/cpu/ar
When we change SDRAM_CONFIG this triggers a refresh based on all of the
parameters that we have programmed so we must do this last.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/ddr.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/am33xx/ddr.c | 29 ++-
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 27 -
2 files changed, 15 insertions(+), 41 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu
The am33xx does not have a DMM, so don't define the base.
Signed-off-by: Tom Rini
---
arch/arm/include/asm/arch-am33xx/hardware.h |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
b/arch/arm/include/asm/arch-am33xx/hardware.h
index 0ec22eb..9be679
On all OMAP3+ platforms we know that SDRAM starts at 0x8000 and we
can use 0xD000 as the end.
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/omap3/board.c|4 ++--
arch/arm/cpu/armv7/omap3/sys_info.c | 12
arch/arm/include/asm/arch-omap3/sys_proto.h
- Add default commands
- Add HUSH parser
- Make environment, malloc areas larger
- Add ATAGS and OF_LIBFDT
- Add defaults to boot ramdisk and MMC, use uEnv.txt
Signed-off-by: Tom Rini
---
include/configs/am335x_evm.h | 69 --
1 file changed, 59 insertion
Hey all,
The following series of patches improves am33xx support, and cleans up
omap3/4/5 slightly. The slight cleanup to omap3/4/5 is that we can all
share a single function to see if we are executing in SDRAM or not. The
rest of the series cleans up the EMIF code for am33xx. While I had
hoped
On Mon, Jul 30, 2012 at 04:30:15PM +, Laurence Withers wrote:
> Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
> definition. In addition, don't request this clock ID on DA830 hardware,
> which does not have a DDR2/mDDR PHY (or associated PLL controller).
>
> Signed-off-by:
On Sat, Jul 28, 2012 at 12:49:55PM +0530, Prabhakar Lad wrote:
> Thanks for the patch. I have tested this patch, below are few comments.
[snip]
> > +int set_cpu_clk_info(void)
> > +{
> > + gd->bd->bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 100;
> > + /* DDR PHY uses an x2 input cloc
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/include/asm/arch-davinci/hardw
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/cpu/arm926ejs/davinci/cp
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/include/asm/arch-davinci/hard
Dear Gerlando Falauto,
In message <5016a093.6040...@keymile.com> you wrote:
>
> The way I understand it, such renaming information is built on the fly
> while building the patch (like you're suggesting, it's a parameter to
> git format-patch, not to the commit itself).
Yes, and I fail to unders
Dear Joe Hershberger,
> Hi Marek,
>
> On Mon, Jul 30, 2012 at 1:35 AM, Marek Vasut wrote:
> > Dear Prafulla Wadaskar,
> >
> >> > -Original Message-
> >> > From: u-boot-boun...@lists.denx.de [mailto:u-boot-
> >> > boun...@lists.denx.de] On Behalf Of Marek Vasut
> >> > Sent: 28 July 2012
Hi Marek,
On Mon, Jul 30, 2012 at 1:35 AM, Marek Vasut wrote:
> Dear Prafulla Wadaskar,
>
>> > -Original Message-
>> > From: u-boot-boun...@lists.denx.de [mailto:u-boot-
>> > boun...@lists.denx.de] On Behalf Of Marek Vasut
>> > Sent: 28 July 2012 01:20
>> > To: u-boot@lists.denx.de
>> > C
On 07/30/2012 01:28:45 AM, Prafulla Wadaskar wrote:
>
>
> > -Original Message-
> > From: u-boot-boun...@lists.denx.de [mailto:u-boot-
> > boun...@lists.denx.de] On Behalf Of Karl O. Pinc
> > Sent: 30 July 2012 08:00
> > To: Sabri Altunbas
> > Cc: u-boot@lists.denx.de
> > Subject: Re: [U-B
On 07/30/2012 03:00 PM, Wolfgang Denk wrote:
Dear Gerlando Falauto,
In message<50164f3a.6050...@keymile.com> you wrote:
boards.cfg |4 +-
include/configs/km82xx.h| 149
+++
include/configs/mgcoge.h| 93 --
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