On 07/30/2012 01:53 AM, Simon Glass wrote:
> Add a flash node to handle the NAND, including memory timings and
> page / block size information.
>
> Signed-off-by: Simon Glass <s...@chromium.org>
> ---
> Changes in v2:
> - Update NAND binding to add "nvidia," prefix
>
> Changes in v3:
> - Add reg property for unit address (should be used for chip select)
> - Update fdt binding to make everything Nvidia-specific
>
> Changes in v4:
> - Remove fdt bindings related to page structure
>
> board/nvidia/dts/tegra20-seaboard.dts | 10 ++++++++++
> 1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/board/nvidia/dts/tegra20-seaboard.dts
> b/board/nvidia/dts/tegra20-seaboard.dts
> index 3352539..25a63a0 100644
> --- a/board/nvidia/dts/tegra20-seaboard.dts
> +++ b/board/nvidia/dts/tegra20-seaboard.dts
> @@ -153,4 +153,14 @@
> 0x1f04008a>;
> linux,fn-keymap = <0x05040002>;
> };
> +
> + nand-controller@70008000 {
> + nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */
> + nvidia,width = <8>;
> + nvidia,timing = <26 100 20 80 20 10 12 10 70>;
> + nand@0 {
> + reg = <0>;
> + compatible = "hynix,hy27uf4g2b", "nand-flash";
> + };
> + };
Are #address-cells, #size-cells, and reg on the controller node provided
by an /include/?
-Scott
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