Module Name:src
Committed By: skrll
Date: Sun Feb 9 09:09:49 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_trng.c
Log Message:
risc-v: JH7110 TRNG aprint_verbose the features and build conf registers
To generate a diff of this commit:
cvs rdiff -u -r1.1 -
Module Name:src
Committed By: skrll
Date: Sun Feb 9 09:09:49 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_trng.c
Log Message:
risc-v: JH7110 TRNG aprint_verbose the features and build conf registers
To generate a diff of this commit:
cvs rdiff -u -r1.1 -
Module Name:src
Committed By: skrll
Date: Sat Jan 18 17:20:05 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
risc-v: add support for the StarFive JH7100 audio clocks
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arc
Module Name:src
Committed By: skrll
Date: Sat Jan 18 17:21:26 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
risc-v: StarFive JH7100: add the temperature sensor clocks to the clock driver
To generate a diff of this commit:
cvs rdiff -u -
Module Name:src
Committed By: skrll
Date: Sat Jan 18 17:21:26 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
risc-v: StarFive JH7100: add the temperature sensor clocks to the clock driver
To generate a diff of this commit:
cvs rdiff -u -
Module Name:src
Committed By: skrll
Date: Sat Jan 18 17:20:05 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
risc-v: add support for the StarFive JH7100 audio clocks
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arc
Module Name:src
Committed By: skrll
Date: Fri Jan 17 08:04:16 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
risc-v: Don't attach the JH7110 ISP clock controller
Something isn't quite right with the ISP clock controller and it causes
prob
Module Name:src
Committed By: skrll
Date: Fri Jan 17 08:04:16 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
risc-v: Don't attach the JH7110 ISP clock controller
Something isn't quite right with the ISP clock controller and it causes
prob
Module Name:src
Committed By: skrll
Date: Fri Jan 17 07:57:42 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Order the clock controllers consistently. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/st
Module Name:src
Committed By: skrll
Date: Fri Jan 17 07:57:42 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Order the clock controllers consistently. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/st
Module Name:src
Committed By: skrll
Date: Thu Jan 9 10:39:01 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pcie.c
Log Message:
Fix error reporting to not include two ": "
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starf
Module Name:src
Committed By: skrll
Date: Thu Jan 9 10:39:01 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pcie.c
Log Message:
Fix error reporting to not include two ": "
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starf
Module Name:src
Committed By: skrll
Date: Wed Jan 1 17:35:44 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pciephy.c
Log Message:
spaces to tab
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh7110_pciephy.c
Pleas
Module Name:src
Committed By: skrll
Date: Wed Jan 1 17:35:44 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pciephy.c
Log Message:
spaces to tab
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh7110_pciephy.c
Pleas
Module Name:src
Committed By: skrll
Date: Sun Nov 17 06:56:58 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_eqos.c
Log Message:
Miscellaneous cleanup.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_eqos.c
Pl
Module Name:src
Committed By: skrll
Date: Sun Nov 17 06:56:58 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_eqos.c
Log Message:
Miscellaneous cleanup.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_eqos.c
Pl
Module Name:src
Committed By: skrll
Date: Tue Nov 12 07:21:42 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pciephy.c
Log Message:
Remove #if 0 / #endif blocks
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_p
Module Name:src
Committed By: skrll
Date: Tue Nov 12 07:21:42 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_pciephy.c
Log Message:
Remove #if 0 / #endif blocks
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_p
Module Name:src
Committed By: skrll
Date: Sat Oct 12 18:07:25 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.h
Log Message:
Consistency of #define
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/starfive/jh71x0_clkc.h
Pl
Module Name:src
Committed By: skrll
Date: Sat Oct 12 18:07:25 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.h
Log Message:
Consistency of #define
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/starfive/jh71x0_clkc.h
Pl
Module Name:src
Committed By: rin
Date: Fri Sep 20 07:29:39 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
riscv/jh7110_clkc: Missing include
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/starfive/jh7110
Module Name:src
Committed By: rin
Date: Fri Sep 20 07:29:39 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
riscv/jh7110_clkc: Missing include
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/starfive/jh7110
Module Name:src
Committed By: skrll
Date: Wed Sep 18 10:37:03 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c jh71x0_clkc.h
Log Message:
risc-v: add reset support to the JH7110 SOC clock controller driver
To generate a diff of this commit:
cvs rdiff -
Module Name:src
Committed By: skrll
Date: Wed Sep 18 10:37:03 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c jh71x0_clkc.h
Log Message:
risc-v: add reset support to the JH7110 SOC clock controller driver
To generate a diff of this commit:
cvs rdiff -
Module Name:src
Committed By: skrll
Date: Wed Sep 18 10:33:36 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Match "Image-Signal-Process" clock controller and only aprint_debug the
state of "System" and "Always-On" clocks.
To generate a
Module Name:src
Committed By: skrll
Date: Wed Sep 18 10:33:36 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Match "Image-Signal-Process" clock controller and only aprint_debug the
state of "System" and "Always-On" clocks.
To generate a
Module Name:src
Committed By: skrll
Date: Wed Sep 18 08:31:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c jh7100_pinctrl.c
jh7110_clkc.c jh71x0_clkc.c jh71x0_usb.c
Log Message:
#define consistency
To generate a diff of this commit:
cvs
Module Name:src
Committed By: skrll
Date: Wed Sep 18 08:31:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c jh7100_pinctrl.c
jh7110_clkc.c jh71x0_clkc.c jh71x0_usb.c
Log Message:
#define consistency
To generate a diff of this commit:
cvs
Module Name:src
Committed By: skrll
Date: Mon Sep 9 07:34:08 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_clkc.c
Please note th
Module Name:src
Committed By: skrll
Date: Mon Sep 9 07:34:08 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7110_clkc.c
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_clkc.c
Please note th
Module Name:src
Committed By: skrll
Date: Sun Aug 25 15:23:51 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_usb.c
Log Message:
spaces to tab
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh71x0_usb.c
Please note t
Module Name:src
Committed By: skrll
Date: Sun Aug 25 15:23:29 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh71x0_clkc.h
Please note th
Module Name:src
Committed By: skrll
Date: Sun Aug 25 15:23:29 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh71x0_clkc.h
Please note th
Module Name:src
Committed By: skrll
Date: Sun Aug 25 15:23:51 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh71x0_usb.c
Log Message:
spaces to tab
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh71x0_usb.c
Please note t
Module Name:src
Committed By: skrll
Date: Sat Jul 27 07:09:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: files.starfive jh7100_clkc.c
Added Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.c jh71x0_clkc.h
Removed Files:
src/sys/arch/riscv/starfive:
Module Name:src
Committed By: skrll
Date: Sat Jul 27 07:09:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: files.starfive jh7100_clkc.c
Added Files:
src/sys/arch/riscv/starfive: jh71x0_clkc.c jh71x0_clkc.h
Removed Files:
src/sys/arch/riscv/starfive:
Module Name:src
Committed By: skrll
Date: Thu Feb 8 07:13:10 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_pinctrl.c
Log Message:
Some fixes from Roland Illig
- fix a locking bug
- '\n' at the end of error messages
To generate a diff of this commit:
cvs r
Module Name:src
Committed By: skrll
Date: Thu Feb 8 07:13:10 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_pinctrl.c
Log Message:
Some fixes from Roland Illig
- fix a locking bug
- '\n' at the end of error messages
To generate a diff of this commit:
cvs r
Module Name:src
Committed By: skrll
Date: Wed Jan 17 07:05:35 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.h
Log Message:
Fix types of constants
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7100_clkc.h
Pl
Module Name:src
Committed By: skrll
Date: Wed Jan 17 07:05:35 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.h
Log Message:
Fix types of constants
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7100_clkc.h
Pl
Module Name:src
Committed By: skrll
Date: Wed Jan 17 06:56:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
Implement jh7100_clkc_fracdiv_get_rate
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/j
Module Name:src
Committed By: skrll
Date: Wed Jan 17 06:56:50 UTC 2024
Modified Files:
src/sys/arch/riscv/starfive: jh7100_clkc.c
Log Message:
Implement jh7100_clkc_fracdiv_get_rate
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/j
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