Module Name: src Committed By: skrll Date: Sun Feb 9 09:09:49 UTC 2025
Modified Files:
src/sys/arch/riscv/starfive: jh7110_trng.c
Log Message:
risc-v: JH7110 TRNG aprint_verbose the features and build conf registers
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_trng.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
