CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Mar 2 08:14:26 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: locore.S riscv_machdep.c Log Message: risc-v: ensure the boot stacks are mapped so that pmap_extract works To generate a diff of this commit: cvs rdiff -u -r1

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Mar 2 08:14:26 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: locore.S riscv_machdep.c Log Message: risc-v: ensure the boot stacks are mapped so that pmap_extract works To generate a diff of this commit: cvs rdiff -u -r1

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: riastradh Date: Sun Mar 2 01:23:11 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: riscv/bus_dma: Handle pmap_extract failure. That is, when the va is not mapped in the pmap. Otherwise this trips over uninitialized

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: riastradh Date: Sun Mar 2 01:23:11 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: riscv/bus_dma: Handle pmap_extract failure. That is, when the va is not mapped in the pmap. Otherwise this trips over uninitialized

CVS commit: src/sys/arch/riscv/fdt

Module Name:src Committed By: skrll Date: Sun Feb 9 10:08:38 UTC 2025 Modified Files: src/sys/arch/riscv/fdt: intc_fdt.c Log Message: risc-v: show cpu number in intc_fdt_intrstr and not hartid. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/ris

CVS commit: src/sys/arch/riscv/fdt

Module Name:src Committed By: skrll Date: Sun Feb 9 10:08:38 UTC 2025 Modified Files: src/sys/arch/riscv/fdt: intc_fdt.c Log Message: risc-v: show cpu number in intc_fdt_intrstr and not hartid. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/ris

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sun Feb 9 09:09:49 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_trng.c Log Message: risc-v: JH7110 TRNG aprint_verbose the features and build conf registers To generate a diff of this commit: cvs rdiff -u -r1.1 -

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sun Feb 9 09:09:49 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_trng.c Log Message: risc-v: JH7110 TRNG aprint_verbose the features and build conf registers To generate a diff of this commit: cvs rdiff -u -r1.1 -

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Feb 8 16:12:20 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_trng.c Log Message: risc-v: add a JH7110 T

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Feb 8 16:12:20 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_trng.c Log Message: risc-v: add a JH7110 T

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sat Feb 8 16:09:59 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: riscv: Add pseudo-device openfirm Missed in previous commit To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sat Feb 8 16:09:59 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: riscv: Add pseudo-device openfirm Missed in previous commit To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Feb 2 11:29:37 UTC 2025 Modified Files: src/sys/arch/riscv/include: bus_funcs.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/bus_funcs.h Please note that dif

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Feb 2 11:29:37 UTC 2025 Modified Files: src/sys/arch/riscv/include: bus_funcs.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/include/bus_funcs.h Please note that dif

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Feb 2 11:04:58 UTC 2025 Modified Files: src/sys/arch/riscv/include: machdep.h Log Message: KNF - sort includes. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/machdep.h Please note th

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Feb 2 11:04:58 UTC 2025 Modified Files: src/sys/arch/riscv/include: machdep.h Log Message: KNF - sort includes. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/include/machdep.h Please note th

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sat Jan 25 13:52:19 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: risc-v: disable X-Powers AXP Power Management IC for now as it causes problems To generate a diff of this commit: cvs rdiff -u -r1.

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sat Jan 25 13:52:19 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: risc-v: disable X-Powers AXP Power Management IC for now as it causes problems To generate a diff of this commit: cvs rdiff -u -r1.

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Jan 18 17:20:05 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7100_clkc.c Log Message: risc-v: add support for the StarFive JH7100 audio clocks To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arc

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Jan 18 17:21:26 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7100_clkc.c Log Message: risc-v: StarFive JH7100: add the temperature sensor clocks to the clock driver To generate a diff of this commit: cvs rdiff -u -

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Jan 18 17:21:26 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7100_clkc.c Log Message: risc-v: StarFive JH7100: add the temperature sensor clocks to the clock driver To generate a diff of this commit: cvs rdiff -u -

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Jan 18 17:20:05 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7100_clkc.c Log Message: risc-v: add support for the StarFive JH7100 audio clocks To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arc

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Fri Jan 17 08:04:16 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_clkc.c Log Message: risc-v: Don't attach the JH7110 ISP clock controller Something isn't quite right with the ISP clock controller and it causes prob

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Fri Jan 17 08:04:16 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_clkc.c Log Message: risc-v: Don't attach the JH7110 ISP clock controller Something isn't quite right with the ISP clock controller and it causes prob

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Fri Jan 17 07:57:42 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_clkc.c Log Message: Order the clock controllers consistently. NFC. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/st

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Fri Jan 17 07:57:42 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_clkc.c Log Message: Order the clock controllers consistently. NFC. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/st

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Jan 12 09:05:28 UTC 2025 Modified Files: src/sys/arch/riscv/include: int_const.h Log Message: risc-v: Fix UINT32_C. PR port-riscv/58766 ntpd / ntpdate setting time on risc64 fails to work To generate a diff of this commit: c

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sun Jan 12 09:05:28 UTC 2025 Modified Files: src/sys/arch/riscv/include: int_const.h Log Message: risc-v: Fix UINT32_C. PR port-riscv/58766 ntpd / ntpdate setting time on risc64 fails to work To generate a diff of this commit: c

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Thu Jan 9 10:39:01 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_pcie.c Log Message: Fix error reporting to not include two ": " To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starf

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Thu Jan 9 10:39:01 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_pcie.c Log Message: Fix error reporting to not include two ": " To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starf

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: martin Date: Sun Jan 5 15:08:59 UTC 2025 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: fix copy&pasto in previous To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/riscv/include/asm.h Please note th

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: martin Date: Sun Jan 5 15:08:59 UTC 2025 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: fix copy&pasto in previous To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/riscv/include/asm.h Please note th

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sun Jan 5 09:04:07 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: Add X-Powers AXP Power Management IC and registers attachments To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sy

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Sun Jan 5 09:04:07 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: Add X-Powers AXP Power Management IC and registers attachments To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sy

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sat Jan 4 21:02:01 UTC 2025 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: PR 58960: riscv/asm.h: Respect NETBSD_REVISIONID. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/riscv/include/

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Sat Jan 4 21:02:01 UTC 2025 Modified Files: src/sys/arch/riscv/include: asm.h Log Message: PR 58960: riscv/asm.h: Respect NETBSD_REVISIONID. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/riscv/include/

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sat Jan 4 14:23:03 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Style change in mm_md_kernacc. NFC. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/riscv/riscv/riscv_

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sat Jan 4 14:23:03 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Style change in mm_md_kernacc. NFC. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/riscv/riscv/riscv_

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Fri Jan 3 11:49:04 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh71x0_temp.c Log Message: risc-v: add a StarFive

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Fri Jan 3 11:49:04 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh71x0_temp.c Log Message: risc-v: add a StarFive

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Thu Jan 2 07:55:26 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: risc-v: Add the Designware I2C controller To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/riscv/conf/GEN

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Thu Jan 2 07:55:26 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common Log Message: risc-v: Add the Designware I2C controller To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/riscv/conf/GEN

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Wed Jan 1 17:53:08 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common GENERIC64 files.riscv std.riscv std.riscv64 src/sys/arch/riscv/fdt: files.fdt src/sys/arch/riscv/starfive: files.starfi

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Wed Jan 1 17:53:08 UTC 2025 Modified Files: src/sys/arch/riscv/conf: GENERIC.common GENERIC64 files.riscv std.riscv std.riscv64 src/sys/arch/riscv/fdt: files.fdt src/sys/arch/riscv/starfive: files.starfi

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Wed Jan 1 17:35:44 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: spaces to tab To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh7110_pciephy.c Pleas

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Wed Jan 1 17:35:44 UTC 2025 Modified Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: spaces to tab To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh7110_pciephy.c Pleas

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Tue Dec 10 07:42:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: risc-v: bus_dma: Sprinkle error check with __predict_{true,false}. Apply the same sprinkling of __predict_{true,false} to bus_dmamap_loa

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Tue Dec 10 07:42:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: risc-v: bus_dma: Sprinkle error check with __predict_{true,false}. Apply the same sprinkling of __predict_{true,false} to bus_dmamap_loa

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Nov 24 19:41:18 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: risc-v: don't KASSERT in the disassembler. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/riscv/db_

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Nov 24 19:41:18 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: risc-v: don't KASSERT in the disassembler. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/riscv/db_

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Nov 24 14:49:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/riscv/riscv/riscv_machdep.c

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Nov 24 14:49:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/riscv/riscv/riscv_machdep.c

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 18:13:04 UTC 2024 Modified Files: src/sys/arch/riscv/include: types.h src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: add __HAVE_MM_MD_KERNACC (basic) support. To generate a diff of this commit:

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 18:13:04 UTC 2024 Modified Files: src/sys/arch/riscv/include: types.h src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: add __HAVE_MM_MD_KERNACC (basic) support. To generate a diff of this commit:

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 12:03:56 UTC 2024 Modified Files: src/sys/arch/riscv/conf: files.riscv src/sys/arch/riscv/riscv: db_machdep.c Added Files: src/sys/arch/riscv/riscv: db_memrw.c Log Message: risc-v: split db_{read,write}_b

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 12:03:56 UTC 2024 Modified Files: src/sys/arch/riscv/conf: files.riscv src/sys/arch/riscv/riscv: db_machdep.c Added Files: src/sys/arch/riscv/riscv: db_memrw.c Log Message: risc-v: split db_{read,write}_b

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 11:37:43 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h src/sys/arch/riscv/riscv: db_machdep.c db_trace.c trap.c Log Message: risc-v: don't include locore.h in db_machdep.h To generate a diff

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Nov 23 11:37:43 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h src/sys/arch/riscv/riscv: db_machdep.c db_trace.c trap.c Log Message: risc-v: don't include locore.h in db_machdep.h To generate a diff

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Fri Nov 22 20:01:04 UTC 2024 Modified Files: src/sys/arch/riscv/include: locore.h src/sys/arch/riscv/riscv: riscv_machdep.c syscall.c trap.c Added Files: src/sys/arch/riscv/include: userret.h Log Message: risc-v: sp

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Fri Nov 22 20:01:04 UTC 2024 Modified Files: src/sys/arch/riscv/include: locore.h src/sys/arch/riscv/riscv: riscv_machdep.c syscall.c trap.c Added Files: src/sys/arch/riscv/include: userret.h Log Message: risc-v: sp

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Fri Nov 22 08:37:34 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h Log Message: G/C To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/riscv/include/db_machdep.h Please note that diffs

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Fri Nov 22 08:37:34 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h Log Message: G/C To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/riscv/include/db_machdep.h Please note that diffs

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Tue Nov 19 21:17:09 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_trace.c Log Message: risc-v: use the provided printf like function in db_stack_trace_print To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Tue Nov 19 21:17:09 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_trace.c Log Message: risc-v: use the provided printf like function in db_stack_trace_print To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Tue Nov 19 18:11:52 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/riscv/include/db_machdep.h Please note that

CVS commit: src/sys/arch/riscv/include

Module Name:src Committed By: skrll Date: Tue Nov 19 18:11:52 UTC 2024 Modified Files: src/sys/arch/riscv/include: db_machdep.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/riscv/include/db_machdep.h Please note that

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Tue Nov 19 08:28:01 UTC 2024 Modified Files: src/sys/arch/riscv/include: intr.h src/sys/arch/riscv/riscv: interrupt.c Log Message: risc-v: expose intr_establish_xname To generate a diff of this commit: cvs rdiff -u -r1.6

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Tue Nov 19 08:28:01 UTC 2024 Modified Files: src/sys/arch/riscv/include: intr.h src/sys/arch/riscv/riscv: interrupt.c Log Message: risc-v: expose intr_establish_xname To generate a diff of this commit: cvs rdiff -u -r1.6

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sun Nov 17 06:56:58 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh7110_eqos.c Log Message: Miscellaneous cleanup. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_eqos.c Pl

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sun Nov 17 06:56:58 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh7110_eqos.c Log Message: Miscellaneous cleanup. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_eqos.c Pl

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Tue Nov 12 07:30:13 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: Remove the USB stuff that is already in GENERIC.common To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/riscv/

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Tue Nov 12 07:30:13 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: Remove the USB stuff that is already in GENERIC.common To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/riscv/

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Tue Nov 12 07:21:42 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: Remove #if 0 / #endif blocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_p

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Tue Nov 12 07:21:42 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: Remove #if 0 / #endif blocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh7110_p

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 20:30:08 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_syscon.c Log Message: risc-v: add a specif

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 20:30:08 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_syscon.c Log Message: risc-v: add a specif

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 20:01:38 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: risc-v: add a JH711

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 20:01:38 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_pciephy.c Log Message: risc-v: add a JH711

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Mon Nov 11 19:59:17 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: whitespace To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/riscv/conf/GENERIC64 Please note that diffs are n

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Mon Nov 11 19:59:17 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: whitespace To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/riscv/conf/GENERIC64 Please note that diffs are n

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Mon Nov 11 19:56:58 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: Attach GPIO controllers in pass 2 To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/riscv/conf/GENERIC64 Pleas

CVS commit: src/sys/arch/riscv/conf

Module Name:src Committed By: skrll Date: Mon Nov 11 19:56:58 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 Log Message: Attach GPIO controllers in pass 2 To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/riscv/conf/GENERIC64 Pleas

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 19:23:18 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_pinctrl.c Log Message: risc-v: Add initial

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Mon Nov 11 19:23:18 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7110_pinctrl.c Log Message: risc-v: Add initial

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Oct 26 15:49:43 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7100_gmac.c jh7110_eqos.c jh71x0_eth.c

CVS commit: src/sys/arch/riscv

Module Name:src Committed By: skrll Date: Sat Oct 26 15:49:43 UTC 2024 Modified Files: src/sys/arch/riscv/conf: GENERIC64 src/sys/arch/riscv/starfive: files.starfive Added Files: src/sys/arch/riscv/starfive: jh7100_gmac.c jh7110_eqos.c jh71x0_eth.c

CVS commit: src/sys/arch/riscv/dts

Module Name:src Committed By: skrll Date: Thu Oct 24 12:03:16 UTC 2024 Modified Files: src/sys/arch/riscv/dts: jh7100-beaglev-starlight.dts jh7100.dtsi Added Files: src/sys/arch/riscv/dts: jh7100-common.dtsi Log Message: risc-v: (re-) add the usb nodes for beagle-v

CVS commit: src/sys/arch/riscv/dts

Module Name:src Committed By: skrll Date: Thu Oct 24 12:03:16 UTC 2024 Modified Files: src/sys/arch/riscv/dts: jh7100-beaglev-starlight.dts jh7100.dtsi Added Files: src/sys/arch/riscv/dts: jh7100-common.dtsi Log Message: risc-v: (re-) add the usb nodes for beagle-v

CVS commit: src/sys/arch/riscv/dts

Module Name:src Committed By: skrll Date: Thu Oct 24 09:46:37 UTC 2024 Added Files: src/sys/arch/riscv/dts: jh7100-beaglev-starlight.dts jh7100.dtsi Log Message: risc-v: Add max-frequency properties for the mmc controllers on beagle-v The recent DTS import lost these prop

CVS commit: src/sys/arch/riscv/dts

Module Name:src Committed By: skrll Date: Thu Oct 24 09:46:37 UTC 2024 Added Files: src/sys/arch/riscv/dts: jh7100-beaglev-starlight.dts jh7100.dtsi Log Message: risc-v: Add max-frequency properties for the mmc controllers on beagle-v The recent DTS import lost these prop

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Mon Oct 21 07:10:44 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Sync a comment with the arm version. XXX need to fix the copy pasta To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sy

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Mon Oct 21 07:10:44 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Sync a comment with the arm version. XXX need to fix the copy pasta To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sy

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:36 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Apply the same fix that was applied to the arm version of this. _bus_dmatag_subregion is always EOPNOTSUPP for !_RISCV_NEED_BUS_DMA_BOUN

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:56 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: More KNF To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:56 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: More KNF To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:36 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Apply the same fix that was applied to the arm version of this. _bus_dmatag_subregion is always EOPNOTSUPP for !_RISCV_NEED_BUS_DMA_BOUN

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:37:51 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not publ

CVS commit: src/sys/arch/riscv/riscv

Module Name:src Committed By: skrll Date: Sun Oct 20 13:37:51 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not publ

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Oct 12 18:07:25 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh71x0_clkc.h Log Message: Consistency of #define To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/starfive/jh71x0_clkc.h Pl

CVS commit: src/sys/arch/riscv/starfive

Module Name:src Committed By: skrll Date: Sat Oct 12 18:07:25 UTC 2024 Modified Files: src/sys/arch/riscv/starfive: jh71x0_clkc.h Log Message: Consistency of #define To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/starfive/jh71x0_clkc.h Pl

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