On 2025/2/8 上午12:20, Igor Mammedov wrote:
Reseting vcpu before its thread is created, caused various issues in the past
for other targets. It doesn't cause issues for loongarch at the moment but
to be consistent with the rest of targets, move reset during realize time
after qemu_init_vcpu().
On Tue, Feb 25, 2025 at 09:10:40AM +0530, Ani Sinha wrote:
> On Mon, Feb 24, 2025 at 9:01 PM Gerd Hoffmann wrote:
> >
> > Hi,
> >
> > > /* should only be called once */
> > > -if (ovmf_flash_parsed) {
> > > +if (ovmf_flash_parsed && !force) {
> >
> > I think it makes more sense to c
Hi Cedric,
> Cc: Troy Lee
> Subject: Re: [PATCH v3 00/28] Support AST2700 A1
>
> On 2/20/25 06:11, Jamin Lin wrote:
> > Hi Cedric,
> >
> >> Subject: Re: [PATCH v3 00/28] Support AST2700 A1
> >>
> >> Hello Jamin,
> >>
> >>
> >> On 2/13/25 04:35, Jamin Lin wrote:
> >>> v1:
> >>>1. Refactor IN
> +/// An opaque wrapper around [`bindings::IRQState`].
> +#[repr(transparent)]
> +#[derive(Debug, qemu_api_macros::Wrapper)]
> +pub struct IRQState(Opaque);
> +
> /// Interrupt sources are used by devices to pass changes to a value
> (typically
> /// a boolean). The interrupt sink is usually a
John Snow writes:
> Instead of using the info object for the doc block as a whole (which
> always points to the very first line of the block), update the info
> pointer for each call to ensure_untagged_section when the existing
> section is otherwise empty. This way, Sphinx error information will
> @@ -621,7 +629,7 @@ pub trait ObjectImpl: ObjectType + IsA {
> /// We expect the FFI user of this function to pass a valid pointer that
> /// can be downcasted to type `T`. We also expect the device is
> /// readable/writeable from one thread at any time.
> -unsafe extern "C" fn rust_unparent_
On 2/25/25 09:26, Zhao Liu wrote:
+/// An opaque wrapper around [`bindings::IRQState`].
+#[repr(transparent)]
+#[derive(Debug, qemu_api_macros::Wrapper)]
+pub struct IRQState(Opaque);
+
/// Interrupt sources are used by devices to pass changes to a value
(typically
/// a boolean). The inter
On Tue, Feb 25, 2025 at 10:51:08AM +0530, Ani Sinha wrote:
> On Mon, Feb 24, 2025 at 9:17 PM Gerd Hoffman wrote:
> >
> > Works nicely for me. Test case:
> > https://kraxel.gitlab.io/uefi-tools-rs/seabios.efi
>
> yeah if I can't get my unit test working we can make this an
> integration test. o
On Fri, Feb 21, 2025 at 06:03:39PM +0100, Paolo Bonzini wrote:
> Date: Fri, 21 Feb 2025 18:03:39 +0100
> From: Paolo Bonzini
> Subject: [PATCH 12/15] rust: sysbus: wrap SysBusDevice with Opaque<>
> X-Mailer: git-send-email 2.48.1
>
> Signed-off-by: Paolo Bonzini
> ---
> rust/hw/timer/hpet/src/h
07.02.2025 07:53, Sairaj Kodilkar wrote:
This series provides few bug fixes for emulated AMD IOMMU. The series is based
on top of qemu upstream master commit d922088eb4ba.
Patch 1: The code was using wrong DTE field to determine interrupt passthrough.
Hence replaced it with correct fie
On 2025/2/25 上午8:40, Jiaxun Yang wrote:
Hi all,
This series is a collection of small fixes I made to TCG for
LoongArch32.
There are still many thing broken, especially on CSRs. More
series following. However this is sufficient to boot 32bit
kernel.
Is there any product introduction about Loo
> -unsafe extern "C" fn rust_realize_fn(dev: *mut DeviceState,
> _errp: *mut *mut Error) {
> +unsafe extern "C" fn rust_realize_fn(
> +dev: *mut bindings::DeviceState,
> +_errp: *mut *mut Error,
> +) {
> let state = NonNull::new(dev).unwrap().cast::();
> T::REALIZE.unwrap()(unsaf
> impl MemoryRegion {
> // inline to ensure that it is not included in tests, which only
> @@ -174,13 +174,15 @@ pub fn init_io>(
> size: u64,
> ) {
> unsafe {
> -Self::do_init_io(&mut self.inner, owner.cast::(),
> &ops.0, name, size);
> +Self::
On 2/19/2025 3:21 AM, Francesco Lavra wrote:
On Fri, 24 Jan 2025 08:20:01 -0500, Xiaoyao Li wrote:
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index 4ff94860815d..bd212abab865 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -10,17 +10,122 @@
*/
#include "
On 25.02.25 03:00, Chenyi Qiang wrote:
On 2/21/2025 6:04 PM, Chenyi Qiang wrote:
On 2/21/2025 4:09 PM, David Hildenbrand wrote:
On 21.02.25 03:25, Chenyi Qiang wrote:
On 2/21/2025 3:39 AM, David Hildenbrand wrote:
On 20.02.25 17:13, Jean-Philippe Brucker wrote:
For Arm CCA we'd like th
On Tue, Feb 25, 2025 at 09:28:52AM +0100, Paolo Bonzini wrote:
> Date: Tue, 25 Feb 2025 09:28:52 +0100
> From: Paolo Bonzini
> Subject: Re: [PATCH 09/15] rust: irq: wrap IRQState with Opaque<>
>
> On 2/25/25 09:26, Zhao Liu wrote:
> > > +/// An opaque wrapper around [`bindings::IRQState`].
> > >
On Fri, 21 Feb 2025 07:02:21 +0100
Mauro Carvalho Chehab wrote:
> Em Mon, 3 Feb 2025 15:34:23 +0100
> Igor Mammedov escreveu:
>
> > On Fri, 31 Jan 2025 18:42:44 +0100
> > Mauro Carvalho Chehab wrote:
> >
> > > There are two pointers that are needed during error injection:
> > >
> > > 1. Th
17.02.2025 17:07, Stefano Garzarella wrote:
On Mon, Feb 17, 2025 at 02:12:55PM +0100, Matias Ezequiel Vara Larsen wrote:
Use virtio_get_config_size() rather than sizeof(struct
virtio_snd_config) for the config_size in the vhost-user-snd frontend.
The frontend shall rely on device features for th
If the chardev is client, the socket file path in localAddr may be NULL.
This is because the socket path comes from getsockname(), according
to man page, getsockname() returns the current address bound by the
socket sockfd. If the chardev is client, it's socket is unbound sockfd.
Therefore, when c
On 2/17/25 12:34 PM, Cédric Le Goater wrote:
Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-platform, vfio-ap and vfio-ccw
devices are simpler.
Sort the properties based on th
On Tue, 25 Feb 2025 at 10:40, Michael Tokarev wrote:
>
> 17.02.2025 17:07, Stefano Garzarella wrote:
> > On Mon, Feb 17, 2025 at 02:12:55PM +0100, Matias Ezequiel Vara Larsen wrote:
> >> Use virtio_get_config_size() rather than sizeof(struct
> >> virtio_snd_config) for the config_size in the vhost
Hi,
> > See
> > https://lore.kernel.org/qemu-devel/20250219071431.50626-2-kra...@redhat.com/
>
> After looking at it, it seems to me that data will be in host byte order
> and guest has no idea what that is.
> Probably it should advertise byteorder as part of the structure,
> and guest side sh
On Fri, Feb 21, 2025 at 06:03:41PM +0100, Paolo Bonzini wrote:
> Date: Fri, 21 Feb 2025 18:03:41 +0100
> From: Paolo Bonzini
> Subject: [PATCH 14/15] rust: chardev: wrap Chardev with Opaque<>
> X-Mailer: git-send-email 2.48.1
>
> Signed-off-by: Paolo Bonzini
> ---
> rust/qemu-api/src/bindings.r
On Fri, Feb 21, 2025 at 06:03:42PM +0100, Paolo Bonzini wrote:
> Date: Fri, 21 Feb 2025 18:03:42 +0100
> From: Paolo Bonzini
> Subject: [PATCH 15/15] rust: bindings: remove more unnecessary Send/Sync
> impls
> X-Mailer: git-send-email 2.48.1
>
> Send and Sync are now implemented on the opaque wr
On Fri, Feb 21, 2025 at 04:44:48AM -0500, Manish Mishra wrote:
> We allocate extra metadata SKBs in case of zerocopy send. This metadata memory
> is accounted for in the OPTMEM limit. If there is any error with sending
> zerocopy data or if zerocopy was skipped, these metadata SKBs are queued in
>
13.02.2025 14:45, Alexander Graf wrote:
When we return a response packet from NSM, we need to indicate its
length according to the content of the response. Prior to this patch, we
returned the length of the source buffer, which may confuse guest code
that relies on the response size.
Fix it by r
25.02.2025 12:32, Michael Tokarev wrote:
This looks like qemu-stable material (9.2.x).
Ah, it is already Cc'd to qemu-stable@, -- n/m.
Jayakrishnan A writes:
> Hi Team ,
>
> Seeking help on implementing sync over ivshmem shared memory , As part of
> internal project we could able to achieve
> shared ivshmem with doorbell mechanism ,But in order to achieve shared memory
> synchronisation we are trying to add
> atomic operation
Hi Alex,
On 2/25/25 6:24 AM, Alex Williamson wrote:
> On Mon, 24 Feb 2025 20:03:56 +0100
> Eric Auger wrote:
>
>> Hi Alex,
>>
>> On 2/20/25 11:48 PM, Alex Williamson wrote:
>>> The memory and IO BARs for devices are only accessible in the D0
>>> power state. In other power states the PCI spec d
12.02.2025 19:49, Konstantin Shkolnyy wrote:
VDPA didn't work on a big-endian machine due to missing/incorrect
CPU<->LE data format conversions.
Signed-off-by: Konstantin Shkolnyy
This looks like a qemu-stable material.
Please let me know if it is not.
Thanks,
/mjt
On 2/25/25 10:14, Zhao Liu wrote:
impl MemoryRegion {
// inline to ensure that it is not included in tests, which only
@@ -174,13 +174,15 @@ pub fn init_io>(
size: u64,
) {
unsafe {
-Self::do_init_io(&mut self.inner, owner.cast::(), &ops.0,
name, siz
On 2/19/2025 6:14 PM, Francesco Lavra wrote:
On Fri, 2025-01-24 at 08:20 -0500, Xiaoyao Li wrote:
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 45867dbe0839..e35a9fbd687e 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -540,8 +540,15 @@ int kvm_init_vcpu(CPUState *cp
On Mon, Feb 24, 2025 at 8:25 AM Marc-André Lureau
wrote:
>
> Hi
>
> On Sun, Feb 23, 2025 at 6:56 PM Roman Penyaev wrote:
> >
> > This patch implements DCH (delete character) and ICH (insert
> > character) commands.
> >
> > DCH - Delete Character:
> >"As characters are deleted, the remaining c
On Tue, Feb 25, 2025 at 2:09 PM Gerd Hoffman wrote:
>
> On Tue, Feb 25, 2025 at 10:51:08AM +0530, Ani Sinha wrote:
> > On Mon, Feb 24, 2025 at 9:17 PM Gerd Hoffman wrote:
> > >
> > > Works nicely for me. Test case:
> > > https://kraxel.gitlab.io/uefi-tools-rs/seabios.efi
> >
> > yeah if I can'
On Fri, 21 Feb 2025 10:21:27 +
Jonathan Cameron wrote:
> On Fri, 21 Feb 2025 07:38:23 +0100
> Mauro Carvalho Chehab wrote:
>
> > Em Mon, 3 Feb 2025 16:22:36 +0100
> > Igor Mammedov escreveu:
> >
> > > On Mon, 3 Feb 2025 11:09:34 +
> > > Jonathan Cameron wrote:
> > >
> > > > On
Am 25.02.2025 um 08:20 hat Thomas Huth geschrieben:
>
> Hi!
>
> I'm facing a weird hang in iotest 233 on my Fedora 41 laptop. When running
>
> ./check -raw 233
>
> the test simply hangs. Looking at the log, the last message is "== check
> plain client to TLS server fails ==". I added some deb
Hi,
> > Part of the verification process can be that you already copy the
> > firmware to a host buffer.
>
> I think we decided early on that we would not want to do that - that
> is consume extra memory on the host side for boot components.
Fine with me, was just an idea, certainly not critic
On Mon, 24 Feb 2025 16:47:31 +0100
Gerd Hoffman wrote:
> On Fri, Feb 14, 2025 at 09:04:07PM +0530, Ani Sinha wrote:
> > VM firmware update is a mechanism where the virtual machines can use their
> > preferred and trusted firmware image in their execution environment without
> > having to depend o
On Fri, 7 Feb 2025 17:20:38 +0100
Igor Mammedov wrote:
> Changelog:
> * drop wire/unwire hooks patches
> * drop unrealize related patches
> * include fixed up patches from
>[PATCH 0/6] tcg: fix qemu crash when add assert_cpu_is_self() is
> enabled
> and cleanups related to
These only work for system-mode and are NOPs for user-mode.
Signed-off-by: Alex Bennée
---
plugins/api-system.c | 58
plugins/api-user.c | 40 +
plugins/api.c| 70
plugins/meson.bu
Thanks to re-factoring and clean-up work (especially to exec-all) we
no longer need such broad headers for the api.
Signed-off-by: Alex Bennée
---
plugins/api.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/plugins/api.c b/plugins/api.c
index 10b258b08d..3e1aac7bfb 100644
--- a/plugins/a
Requiring TARGET_PAGE_MASK to be defined gets in the way of building
this unit once. As tcg_ctx has the value lets use it.
Signed-off-by: Alex Bennée
---
plugins/api.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plugins/api.c b/plugins/api.c
index cf8cdf076a..10b258b08d 1
Now all the softmmu/user-mode stuff has been split out we can build
this compilation unit only once.
Signed-off-by: Alex Bennée
---
plugins/api.c | 11 ---
plugins/meson.build | 3 +--
2 files changed, 1 insertion(+), 13 deletions(-)
diff --git a/plugins/api.c b/plugins/api.c
ind
Headers should bring in what they need so don't rely on getting
queue.h by side effects. This will help with clean-ups in the
following patches.
Signed-off-by: Alex Bennée
---
plugins/plugin.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/plugins/plugin.h b/plugins/plugin.h
index 30e2299a5
As we move towards a more modular build this series converts both
loader and api to build once objects. For both objects the only real
difference is between user mode and system emulation so those bits
have been hived off into those source sets.
The remaining core plugin is more intimately aligned
We have a function we can call for this, lets not rely on macros that
stop us building once.
Signed-off-by: Alex Bennée
---
plugins/loader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plugins/loader.c b/plugins/loader.c
index 99686b5466..827473c8b6 100644
--- a/plugins/l
hwaddr is a fixed size on all builds.
Signed-off-by: Alex Bennée
---
include/qemu/plugin-memory.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/qemu/plugin-memory.h b/include/qemu/plugin-memory.h
index 71c1123308..6065ec7aaf 100644
--- a/include/qemu/plugin-memory.h
+++ b/include/qe
To move the main api.c to a single build compilation object we need to
start splitting out user and system specific code. As we need to grob
around host headers we move these particular helpers into the *-user
mode directories.
The binary/start/end/entry helpers are all NOPs for system mode.
Sign
There is very little in loader that is different between builds save
for a tiny user/system mode difference in the plugin_info structure.
Create two new files, user and system to hold mode specific helpers
and move loader into common_ss.
Signed-off-by: Alex Bennée
---
plugins/plugin.h| 6 ++
These are only usable in system mode where we control the timer. For
user-mode make them NOPs.
Signed-off-by: Alex Bennée
---
plugins/api-system.c | 34 ++
plugins/api-user.c | 17 +
plugins/api.c| 41 -
On 24/02/2025 14:10, BALATON Zoltan wrote:
Add named constants for register bit values that should make it easier
to understand what these mean.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/misc/macio/gpio.c | 19 ---
1 file changed, 12 insertion
Unlike cpr-reboot mode, cpr-transfer mode cannot save volatile ram blocks
in the migration stream file and recreate them later, because the physical
memory for the blocks is pinned and registered for vfio. Add a blocker
for volatile ram blocks.
Also add a blocker for RAM_GUEST_MEMFD. Preserving
From: Weishi Li
Due to the fact that g->parent_obj.conf only adds
VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED setting when
VIRGL_VERSION_MAJOR >= 1, virgl_cmd_comtext_create()
will always return by error=VIRTIO_GPU_RESP_ERR_UNSPEC
when VIRGL_VERSION_MAJOR < 1, resulting in gl context
initialization fail
Hi Cedric,
> >> and the register array as:
> >>
> >> uint32_t regs[ASPEED_INTC_NR_REGS];
> >>
> >> The number of regs looks pretty big for me. Are the registers
> >> covering the whole MMIO aperture ?
> >>
> > According to the datasheet, the entire register address space size of
> > INTC (CPU
Switch callers directly initializing the PCI PM capability with
pci_add_capability() to use pci_pm_init().
Cc: Dmitry Fleytman
Cc: Akihiko Odaki
Cc: Jason Wang
Cc: Stefan Weil
Cc: Sriram Yagnaraman
Cc: Keith Busch
Cc: Klaus Jensen
Cc: Jesper Devantier
Cc: Michael S. Tsirkin
Cc: Marcel Apf
This is now redundant to PCIDevice.pm_cap.
Cc: Cédric Le Goater
Reviewed-by: Zhenzhong Duan
Reviewed-by: Eric Auger
Signed-off-by: Alex Williamson
---
hw/vfio/pci.c | 9 -
hw/vfio/pci.h | 1 -
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
On 22/02/2025 12:28, BALATON Zoltan wrote:
Add macio_gpio_read trace event and use that in macio_gpio_read()
instead of macio_gpio_write. Also change log message to match
macio_timer_{read,write}.
Signed-off-by: BALATON Zoltan
---
hw/misc/macio/gpio.c | 2 +-
hw/misc/macio/trace-event
> 2025年2月25日 21:29，Marc-André Lureau 写道：
>
> Hi Haoqian
>
> On Tue, Feb 25, 2025 at 5:19 PM Haoqian He wrote:
>>
>> I use chardev to connect with a vhost-user target, the chardev backend type
>> is
>> socket, part of QEMU boot parameter:
>> -device vhost-user-blk-pci,chardev=my-vhost-blk-0
On 17/2/25 00:07, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 4 +++
tcg/aarch64/tcg-target.c.inc | 31 -
tcg/arm/tcg-target.c.inc | 24
tcg/i386/tcg-target.c.inc| 25 +
John Snow writes:
> The pylint config is being left in place because the settings differ
> enough from the python/ directory settings that we need a chit-chat on
> how to merge them O:-)
>
> Everything else can go.
>
> Signed-off-by: John Snow
> ---
> scripts/qapi/.flake8| 3 ---
> scripts/
Daniel P. Berrangé writes:
> On Tue, Feb 25, 2025 at 01:31:56PM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > The 'qapi.backend.QAPIBackend' class defines an API contract for code
>> > generators. The current generator is put into a new class
>> > 'qapi.backend.QAPICBack
Hi,
> > +# @data: variable value, encoded as hex string.
>
> I understand this is a blob. We commonly use base64 for that. Why not
> here?
It's an existing format already supported by other tools. Guess I
should add that to the preamble.
> > +# @digest: variable certificate digest. Used t
On 17/2/25 00:07, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 4 +++
tcg/aarch64/tcg-target.c.inc | 31 +++-
tcg/arm/tcg-target.c.inc | 25 +++-
tcg/i386/tcg-target.c.inc| 27 --
This qtest requires there is a RDMA(RoCE) link in the host.
In order to make the test work smoothly, introduce a
scripts/rdma-migration-helper.sh to
- setup a new Soft-RoCE(aka RXE) if it's root
- detect existing RoCE link
Test will be skipped if there is no available RoCE link.
# Start of rdma t
Depending on the order of starting RDMA and setting capability,
the following scenarios can be categorized into the following scenarios:
Source:
S1: [set capabilities] -> [Start RDMA outgoing]
Destination:
D1: [set capabilities] -> [Start RDMA incoming]
D2: [Start RDMA incoming] -> [set capabili
- It fix the RDMA migration broken issue
- disable RDMA + postcopy
- some cleanups
- Add a qtest for RDMA at last
Changes since V3:
- check RDMA and capabilities are compatible on both sides # renamed from
previous V3's "migration: Add
migration_capabilities_and_transport_compatible()"
Changes
Since we have disabled RDMA + postcopy, it's safe to remove
the migration_in_postcopy() that follows the migrate_rdma().
Signed-off-by: Li Zhijian
---
V3:
reorder: 7th->4th
---
migration/rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/migration/rdma.c b/migrati
control_save_page() is for RDMA only, unfold it to make the code more
clear.
In addition:
- Similar to other branches style in ram_save_target_page(), involve RDMA
only if the condition 'migrate_rdma()' is true.
- Further simplify the code by removing the RAM_SAVE_CONTROL_NOT_SUPP.
Signed-off
Address an error in RDMA-based migration by ensuring RDMA is prioritized
when saving pages in `ram_save_target_page()`.
Previously, the RDMA protocol's page-saving step was placed after other
protocols due to a refactoring in commit bc38dc2f5f3. This led to migration
failures characterized by unkn
On 25/02/2025 22:48, Peter Xu wrote:
> On Tue, Feb 25, 2025 at 06:37:21AM +, Zhijian Li (Fujitsu) wrote:
>>
>>
>> On 25/02/2025 03:58, Peter Xu wrote:
>>> On Fri, Feb 21, 2025 at 02:36:09PM +0800, Li Zhijian wrote:
Similar to migration_channels_and_transport_compatible(), introduce a
>>>
Am 25. Februar 2025 17:00:53 UTC schrieb Peter Maydell
:
>On Tue, 25 Feb 2025 at 15:42, Peter Maydell wrote:
>> The C compiler for the OpenSUSE CI job doesn't seem to like this:
>> https://gitlab.com/pm215/qemu/-/jobs/9239416833
>>
>> ../hw/arm/fsl-imx8mp.c: In function ‘fsl_imx8mp_realize’:
>
Hi Cedric,
>
> On 2/13/25 04:35, Jamin Lin wrote:
> > According to the design of the AST2600, it has a Silicon Revision ID
> > Register, specifically SCU004 and SCU014, to set the Revision ID for the
> AST2600.
> > For the AST2600 A3, SCU004 is set to 0x05030303 and SCU014 is set to
> 0x05030303
It's believed that RDMA + postcopy-ram has been broken for a while.
Rather than spending time re-enabling it, let's simply disable it as a
trade-off.
Reviewed-by: Peter Xu
Signed-off-by: Li Zhijian
---
V3:
- collect Reviewed tag
- reoder: 6th -> 3th
---
migration/options.c | 4
1 file
On 25/02/2025 22.00, Thomas Huth wrote:
On 25/02/2025 21.35, Thomas Huth wrote:
On 25/02/2025 18.57, Daniel P. Berrangé wrote:
On Tue, Feb 25, 2025 at 06:52:43PM +0100, Thomas Huth wrote:
On 25/02/2025 18.44, Thomas Huth wrote:
On 25/02/2025 11.12, Kevin Wolf wrote:
Am 25.02.2025 um 08:20 ha
Gerd Hoffmann writes:
> Define qapi schema for the uefi variable store state.
>
> Use it and the generated visitor helper functions to store persistent
> (EFI_VARIABLE_NON_VOLATILE) variables in JSON format on disk.
>
> Signed-off-by: Gerd Hoffmann
[...]
> diff --git a/qapi/meson.build b/qapi/
Replace the advent calendar test with a buildroot image built with
qemu_ppc64_e5500_defconfig. Boot a ppce500 machine from kernel and
disk, test network and poweroff. Add '-no-shutdown' to the command
line to avoid exiting from QEMU as it seems to bother the functional
framework.
Signed-off-by: Cé
The tests are using a now archived Fedora29 release. Switch to the
most recent Fedora41 release.
Signed-off-by: Cédric Le Goater
---
tests/functional/test_ppc64_powernv.py | 6 +++---
tests/functional/test_ppc64_pseries.py | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git
On 2/21/25 9:04 PM, Jonathan Cameron wrote:
On Fri, 21 Feb 2025 15:27:36 +1000
Gavin Shan wrote:
[...]
I would say #1 is the ideal model because the read_ack_register is the
bottleneck
and it should be scaled up to max_cpus. In that way, the bottleneck can be
avoided
from the bottom. An
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
So it can be safety accessed from multiple threads.
This variable type needs to be changed to unsigned long since
32-bit host platforms lack the necessary addition atomics on 64-bit
variables.
Using 32-bit counters on 32
On 2/26/25 08:01, Thomas Huth wrote:
On 26/02/2025 07.54, Cédric Le Goater wrote:
The tests are using a now archived Fedora29 release. Switch to the
most recent Fedora41 release.
Signed-off-by: Cédric Le Goater
---
tests/functional/test_ppc64_powernv.py | 6 +++---
tests/functional/test_ppc
On 26/2/25 03:46, Patrick Venture wrote:
The reg isn't validated to be a possible register before
it's dereferenced for one case. The mmio space registered
for the gpio device is 4KiB but there aren't that many
registers in the struct.
Google-Bug-Id: 397469048
Change-Id: I2fb8d0d3d41422baab22e8
On 26/02/2025 07.54, Cédric Le Goater wrote:
The tests are using a now archived Fedora29 release. Switch to the
most recent Fedora41 release.
Signed-off-by: Cédric Le Goater
---
tests/functional/test_ppc64_powernv.py | 6 +++---
tests/functional/test_ppc64_pseries.py | 6 +++---
2 files cha
On 26/02/2025 07.50, Cédric Le Goater wrote:
Replace the advent calendar test with a buildroot image built with
qemu_ppc64_e5500_defconfig.
When picking this up, I'll add a "Unlike the advent calendar image, this
newer buildroot image supports networking, too, so we can check whether it
gets
On 7/2/25 17:20, Igor Mammedov wrote:
Reseting vcpu before its thread is created, caused various issues in the past
for other targets. It doesn't cause issues for loongarch at the moment but
to be consistent with the rest of targets, move reset during realize time
after qemu_init_vcpu().
That ba
On 7/2/25 17:20, Igor Mammedov wrote:
Reseting vcpu before its thread is created, caused various issues in the past
for other targets. It doesn't cause issues for m68k at the moment but
to be consistent with the rest of targets, move reset during realize time
after qemu_init_vcpu().
That basical
On 7/2/25 17:20, Igor Mammedov wrote:
cpu_list_add() was doing 2 distinct things:
- assign some index to vCPU
- add unrealized (thus in inconsistent state) vCPU to &cpus_queue
Code using CPU_FOREACH() macro would iterate over possibly
unrealized vCPUs, often dealt with special casing.
Instead o
On 2/25/25 9:19 PM, Igor Mammedov wrote:
On Fri, 21 Feb 2025 11:04:35 +
Jonathan Cameron wrote:
Ideally I'd like whatever we choose to look like what a bare metal machine
does - mostly because we are less likely to hit untested OS paths.
Ack for that but,
that would need someone from hw/
Markus Armbruster writes:
> John Snow writes:
>
>> The pylint config is being left in place because the settings differ
>> enough from the python/ directory settings that we need a chit-chat on
>> how to merge them O:-)
>>
>> Everything else can go.
>>
>> Signed-off-by: John Snow
>
> I tried to
Similar to migration_channels_and_transport_compatible(), introduce a
new helper migration_capabilities_and_transport_compatible() to check if
the capabilites is compatible with the transport.
Currently, only move the capabilities vs RDMA transport to this
function.
Reviewed-by: Peter Xu
Signed-
This qtest requires there is a RDMA(RoCE) link in the host.
In order to make the test work smoothly, introduce a
scripts/rdma-migration-helper.sh to
- setup a new Soft-RoCE(aka RXE) if it's root
- detect existing RoCE link
Test will be skipped if there is no available RoCE link.
# Start of rdma t
control_save_page() is for RDMA only, unfold it to make the code more
clear.
In addition:
- Similar to other branches style in ram_save_target_page(), involve RDMA
only if the condition 'migrate_rdma()' is true.
- Further simplify the code by removing the RAM_SAVE_CONTROL_NOT_SUPP.
Signed-off
Address an error in RDMA-based migration by ensuring RDMA is prioritized
when saving pages in `ram_save_target_page()`.
Previously, the RDMA protocol's page-saving step was placed after other
protocols due to a refactoring in commit bc38dc2f5f3. This led to migration
failures characterized by unkn
It's believed that RDMA + postcopy-ram has been broken for a while.
Rather than spending time re-enabling it, let's simply disable it as a
trade-off.
Reviewed-by: Peter Xu
Signed-off-by: Li Zhijian
---
V3:
- collect Reviewed tag
- reoder: 6th -> 3th
---
migration/migration.c | 4
1 fil
- It fix the RDMA migration broken issue
- disable RDMA + postcopy
- some cleanups
- Add a qtest for RDMA at last
Chnages since V2:
- squash previous 2/3/4 to '[PATCH v3 5/6] migration: Unfold
control_save_page()'
- reorder the patch layout to prevent recently added code from being deleted
agai
We want the device in the D0 power state going into reset, but the
config write can enable the BARs in the address space, which are
then removed from the address space once we clear the memory enable
bit in the command register. Re-order to clear the command bit
first, so the power state change do
v2:
Eric noted in v1 that one of the drivers had a redundant wmask setting
since pci_pm_init() enabled writes to the power state field. This was
added because vfio-pci was not setting wmask for this capability but
is allowing writes to the PM state field through to the device. For
vfio-pci, QEMU
The memory and IO BARs for devices are only accessible in the D0 power
state. In other power states the PCI spec defines that the device
responds to TLPs and messages with an Unsupported Request response.
To approximate this behavior, consider the BARs as unmapped when the
device is not in the D0
The pm_cap on the PCIExpressDevice object can be distilled down
to the new instance on the PCIDevice object.
Cc: Michael S. Tsirkin
Cc: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Reviewed-by: Zhenzhong Duan
Reviewed-by: Eric Auger
Signed-off-by: Alex Williamson
---
hw/pci-bridge/pcie_
Since we have disabled RDMA + postcopy, it's safe to remove
the migration_in_postcopy() that follows the migrate_rdma().
Signed-off-by: Li Zhijian
---
V3:
reorder: 7th->4th
---
migration/rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/migration/rdma.c b/migrati
On Tue, Feb 25, 2025 at 5:13 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> In this version no major changes were made. Just a rebase with
> alistair/riscv-to-apply.next and acks from Alistair.
>
> All patches acked.
>
> v1 link:
> https://lore.kernel.org/qemu-riscv/20241205133003.184581-1-dbarb..
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