07.02.2025 07:53, Sairaj Kodilkar wrote:
This series provides few bug fixes for emulated AMD IOMMU. The series is based on top of qemu upstream master commit d922088eb4ba.Patch 1: The code was using wrong DTE field to determine interrupt passthrough. Hence replaced it with correct field according to [1]. Patch 2: Current code sets the PCI capability BAR low and high to the lower and upper 16 bits of AMDVI_BASE_ADDR respectively, which is wrong. Instead use 32 bit mask to set the PCI capability BAR low and high. The guest IOMMU driver works with current qemu code because it uses base address from the IVRS table and not the one provided by PCI capability. Sairaj Kodilkar (2): amd_iommu: Use correct DTE field for interrupt passthrough amd_iommu: Use correct bitmask to set capability BAR hw/i386/amd_iommu.c | 10 +++++----- hw/i386/amd_iommu.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-)
Is this qemu-stable material (current series: 7.2, 8.2, 9.2)? 3684717b74 "amd_iommu: Use correct bitmask to set capability BAR" does not apply to 7.2, since v8.0.0-10-g6291a28645 "hw/i386/amd_iommu: Explicit use of AMDVI_BASE_ADDR in amdvi_init" in not in 7.2, but the change can be adjusted for 7.2 easily, or 6291a28645 can be picked up too. Thanks, /mjt
