On Wed, 10 Feb 2021 17:40:43 +1100
Alexey Kardashevskiy wrote:
>
>
> On 27/01/2021 12:28, Alexey Kardashevskiy wrote:
> >
> >
> > On 25/01/2021 21:23, Greg Kurz wrote:
> >> On Sat, 23 Jan 2021 13:36:34 +1100
> >> Alexey Kardashevskiy wrote:
> >>
> >>>
> >>>
> >>> On 23/01/2021 04:01, Greg Ku
On 2021/2/10 上午5:32, Eric Auger wrote:
In an attempt to fix smmu/virtio-iommu - vhost regression, commit
958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support")
broke virtio-iommu integration. This is due to the fact VFIO registers
IOMMU_NOTIFIER_ALL notifiers, which includes
On Tue, Feb 09, 2021 at 10:32:33PM +0100, Eric Auger wrote:
> Previous work on dev-iotlb message broke spapr_iommu/vhost integration
> as it did for SMMU and virtio-iommu. The spapr_iommu currently
> only sends IOMMU_NOTIFIER_UNMAP notifications. Since commit
> 958ec334bca3 ("vhost: Unbreak SMMU an
On 2021/2/10 上午5:32, Eric Auger wrote:
Previous work on dev-iotlb message broke spapr_iommu/vhost integration
as it did for SMMU and virtio-iommu. The spapr_iommu currently
only sends IOMMU_NOTIFIER_UNMAP notifications. Since commit
958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iot
On Tue, 9 Feb 2021 22:32:33 +0100
Eric Auger wrote:
> Previous work on dev-iotlb message broke spapr_iommu/vhost integration
> as it did for SMMU and virtio-iommu. The spapr_iommu currently
> only sends IOMMU_NOTIFIER_UNMAP notifications. Since commit
> 958ec334bca3 ("vhost: Unbreak SMMU and vir
From: Andreas Konopik
Signed-off-by: Andreas Konopik
Signed-off-by: Georg Hofstetter
Signed-off-by: David Brenken
---
target/tricore/translate.c | 37 ++---
1 file changed, 10 insertions(+), 27 deletions(-)
diff --git a/target/tricore/translate.c b/target/tric
From: Andreas Konopik
Hello together,
we have fixed a few conditions leading to incorrect intermediate code
generation. RCPW_IMASK, RRPW_EXTR, RRPW_EXTR_U and RRPW_IMASK invoke
undefined behavior for "pos + width > 32", which is also checked in
tcg_gen_extract_tl(). RRRW_EXTR_U invokes undefined
On Tue, Feb 09, 2021 at 04:52:41PM +0100, Igor Mammedov wrote:
> > ---
> > hw/i386/acpi-build.c | 172 +++
> > 1 file changed, 172 insertions(+)
> >
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index c2f11d95d8..bcb1f65c1d 100644
> > ---
On Tue, Feb 09, 2021 at 12:02:58PM -0800, Isaku Yamahata wrote:
> > > + * When the method of _CRS is called to determine MMCONFIG region,
> > > + * only port io is allowed to access PCI configuration space.
> > > + * It means qword access isn't allowed.
> > > + *
> > > + * Devic
On Wed, Feb 10, 2021 at 02:19:59PM +0800, Jason Wang wrote:
>
> On 2021/2/9 下午11:04, Michael S. Tsirkin wrote:
> > On Tue, Feb 09, 2021 at 02:51:05PM +, Daniel P. Berrangé wrote:
> > > On Tue, Feb 09, 2021 at 09:34:20AM -0500, Michael S. Tsirkin wrote:
> > > > On Thu, Feb 04, 2021 at 10:29:12P
On 09.02.21 19:49, Eric Blake wrote:
On 2/9/21 12:27 PM, Max Reitz wrote:
Many _unsupported_imgopts lines for refcount_bits values use something
like "refcount_bits=1[^0-9]" to forbid everything but "refcount_bits=1"
(e.g. "refcount_bits=16" is allowed).
That does not work when $IMGOPTS does no
On Fri, 22 Jan 2021 at 20:00, Cornelia Huck wrote:
> The pvrdma code relies on the pvrdma_ring.h kernel header for some
> basic ring buffer handling. The content of that header isn't very
> exciting, but contains some (q)atomic_*() invocations that (a)
> cause manual massaging when doing a header
On Tue, Feb 9, 2021 at 10:30 AM Bin Meng wrote:
>
> Hi Edgar,
>
> On Mon, Feb 8, 2021 at 11:17 PM Edgar E. Iglesias
> wrote:
> >
> >
> >
> > On Mon, Feb 8, 2021 at 3:45 PM Bin Meng wrote:
> >>
> >> Hi Edgar,
> >>
> >> On Mon, Feb 8, 2021 at 10:34 PM Edgar E. Iglesias
> >> wrote:
> >> >
> >> >
>
Kevin Wolf writes:
> Introduce alias definitions for object types (structs and unions). This
> allows using the same QAPI type and visitor for many syntax variations
> that exist in the external representation, like between QMP and the
> command line. It also provides a new tool for evolving the
The following changes since commit 1214d55d1c41fbab3a9973a05085b8760647e411:
Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into
staging (2021-02-09 13:24:37 +)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
Use the GitLab repo URL as the main repo location in order to reduce
load on qemu.org.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Message-id: 2021015017.156802-2-stefa...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
.github/lockdown.y
qemu.org is running out of bandwidth and the QEMU project is moving
towards a gating CI on GitLab. Use the GitLab repos instead of qemu.org
(they will become mirrors).
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-
From: Jagannathan Raman
Add configuration options to enable or disable multiprocess QEMU code
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
Message-id:
6cc37253e35418ebd7b675a31a3df6e3c7a12dc1.1611938319.git.jag.ra
It is no longer necessary to point .gitmodules at GitLab repos when
running in GitLab CI since they are now used all the time.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 2021015017.156802-
qemu.org is running out of bandwidth and the QEMU project is moving
towards a gating CI on GitLab. Use the GitLab repos instead of qemu.org
(they will become mirrors).
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-
From: Jagannathan Raman
Allow RAM MemoryRegion to be created from an offset in a file, instead
of allocating at offset of 0 by default. This is needed to synchronize
RAM between QEMU & remote process.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
From: Elena Ufimtseva
Adds qio_channel_readv_full_all_eof() and qio_channel_readv_full_all()
to read both data and FDs. Refactors existing code to use these helpers.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Acked-by: Daniel P. Berrangé
Mes
qemu.org is running out of bandwidth and the QEMU project is moving
towards a gating CI on GitLab. Use the GitLab repos instead of qemu.org
(they will become mirrors).
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-
From: Jagannathan Raman
PCI host bridge is setup for the remote device process. It is
implemented using remote-pcihost object. It is an extension of the PCI
host bridge setup by QEMU.
Remote-pcihost configures a PCI bus which could be used by the remote
PCI device to latch on to.
Signed-off-by:
From: Jagannathan Raman
x-remote-machine object sets up various subsystems of the remote
device process. Instantiate PCI host bridge object and initialize RAM, IO &
PCI memory regions.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: S
qemu.org is running out of bandwidth and the QEMU project is moving
towards a gating CI on GitLab. Use the GitLab repos instead of qemu.org
(they will become mirrors).
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-
From: Elena Ufimtseva
Defines MPQemuMsg, which is the message that is sent to the remote
process. This message is sent over QIOChannel and is used to
command the remote process to perform various tasks.
Define transmission functions used by proxy and by remote.
Signed-off-by: Jagannathan Raman
From: Jagannathan Raman
Initializes the message handler function in the remote process. It is
called whenever there's an event pending on QIOChannel that registers
this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan
From: John G Johnson
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Message-id:
02a68adef99f5df6a380bf8fd7b90948777e411c.1611938319.git.jag.ra...@oracle.com
Signed-off-by: Stefan Hajnoczi
---
MAINTAINERS
ll-tricore-20210210
for you to fetch changes up to 52be63523e80bc92b8192a1e445fe499650085ac:
tricore: added triboard with tc27x_soc (2021-02-10 10:26:38 +0100)
added triboard with
From: Jagannathan Raman
Proxy device object implements handler for PCI BAR writes and reads.
The handler uses BAR_WRITE/BAR_READ message to communicate to the
remote process with the BAR address and value to be written/read.
The remote process implements handler for BAR_WRITE/BAR_READ
message.
S
From: Elena Ufimtseva
The Proxy Object sends the PCI config space accesses as messages
to the remote process over the communication channel
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
Message-id:
d3c94f4618813234
From: Elena Ufimtseva
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
Message-id:
d54edb4176361eed86b903e8f27058363b6c83b3.1611938319.git.jag.ra...@oracle.com
Signed-off-by: Stefan Hajnoczi
---
include/hw/remote/mpq
From: Elena Ufimtseva
Adds documentation explaining the command-line arguments needed
to use multi-process.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
Message-id:
49f757a84e5dd6fae14b22544897d1124c5fdbad.1611938
On Tue, Feb 09, 2021 at 06:16:57PM -0800, Doug Evans wrote:
> On Thu, Feb 4, 2021 at 10:25 AM Doug Evans wrote:
>
> > On Thu, Feb 4, 2021 at 2:03 AM Daniel P. Berrangé
> > wrote:
> >
> >> On Wed, Feb 03, 2021 at 03:35:36PM -0800, dje--- via wrote:
> >> > Add support for ipv6 host forwarding
> >>
From: Elena Ufimtseva
Adds qio_channel_writev_full_all() to transmit both data and FDs.
Refactors existing code to use this helper.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Acked-by: Daniel P. Berrangé
Message
From: Elena Ufimtseva
Perform device reset in the remote process when QEMU performs
device reset. This is required to reset the internal state
(like registers, etc...) of emulated devices
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by
From: Jagannathan Raman
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD
ioctl to create irqfd to injecting PCI interrupts to the guest.
IOHUB object forwards the irqfd to the remote process. Remote process
uses this fd to directly send interrupts to the guest, bypassing QEMU.
Signed-
To disallow certain refcount_bits values, some _unsupported_imgopts
invocations look like "refcount_bits=1[^0-9]", i.e. they match an
integer boundary with [^0-9]. This expression does not match the end of
the string, though, so it breaks down when refcount_bits is the last
option (which it tends
From: Jagannathan Raman
Retrieve PCI configuration info about the remote device and
configure the Proxy PCI object based on the returned information
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Message-id:
85ee367
From: Jagannathan Raman
Associate the file descriptor for a PCIDevice in remote process with
DeviceState object.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Message-id:
f405a2ed5d7518b87bea7c59cfdf334d67e5ee51.16
From: Bin Meng
Current QEMU HEAD nvme.c does not compile:
hw/block/nvme.c: In function ‘nvme_process_sq’:
hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
function [-Werror=maybe-uninitialized]
trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "disabled")
Hello Sai Pavan,
[ ... ]
>>> The patchset is in the aspeed-6.0 branch :
>>>
>>> df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot
>>> area as a boot rom
>>> 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property
>>> 2836
From: Jagannathan Raman
SyncSysMemMsg message format is defined. It is used to send
file descriptors of the RAM regions to remote device.
RAM on the remote device is configured with a set of file descriptors.
Old RAM regions are deleted and new regions, each with an fd, is
added to the RAM.
Sign
From: Elena Ufimtseva
Defines a PCI Device proxy object as a child of TYPE_PCI_DEVICE.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
Message-id:
b5186ebfedf8e557044d09a768846c59230ad3a7.1611938319.git.jag.ra...@ora
On 09.02.21 19:51, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 21:41, Denis V. Lunev wrote:
On 2/9/21 9:36 PM, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 19:39, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 17:47, Max Reitz wrote:
On 09.02.21 15:10, Vladimir Sementsov-Ogievskiy wrote:
From: Andreas Konopik
Signed-off-by: Andreas Konopik
Signed-off-by: David Brenken
Signed-off-by: Georg Hofstetter
Signed-off-by: Robert Rasche
Signed-off-by: Lars Biermanski
Message-Id: <20201109165055.10508-2-david.bren...@efs-auto.org>
Signed-off-by: Bastian Koppelmann
---
default-config
On Wed, Feb 10, 2021 at 05:08:01PM +0800, Bin Meng wrote:
> On Tue, Feb 9, 2021 at 10:30 AM Bin Meng wrote:
> >
> > Hi Edgar,
> >
> > On Mon, Feb 8, 2021 at 11:17 PM Edgar E. Iglesias
> > wrote:
> > >
> > >
> > >
> > > On Mon, Feb 8, 2021 at 3:45 PM Bin Meng wrote:
> > >>
> > >> Hi Edgar,
> > >>
From: Jagannathan Raman
Add ProxyMemoryListener object which is used to keep the view of the RAM
in sync between QEMU and remote process.
A MemoryListener is registered for system-memory AddressSpace. The
listener sends SYNC_SYSMEM message to the remote process when memory
listener commits the ch
From: "Denis V. Lunev"
Original specification says that l1 table size if 64 * l1_size, which
is obviously wrong. The size of the l1 entry is 64 _bits_, not bytes.
Thus 64 is to be replaces with 8 as specification says about bytes.
There is also minor tweak, field name is renamed from l1 to l1_ta
On 09.02.21 17:52, Denis V. Lunev wrote:
On 2/9/21 5:47 PM, Max Reitz wrote:
On 09.02.21 15:10, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 16:25, Max Reitz wrote:
On 29.01.21 17:50, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
I know, I have several series waiting for a resend, but I had
From: Bin Meng
ZynqMP QSPI supports SPI transfer using DMA mode, but currently this
is unimplemented. When QSPI is programmed to use DMA mode, QEMU will
crash. This is observed when testing VxWorks 7.
We added a basic CSU DMA model and the implementation is based on
https://github.com/Xilinx/qem
From: Xuzhou Cheng
ZynqMP QSPI supports SPI transfer using DMA mode, but currently this
is unimplemented. When QSPI is programmed to use DMA mode, QEMU will
crash. This is observed when testing VxWorks 7.
This adds a basic CSU DMA model and the implementation is based on
https://github.com/Xilin
From: Xuzhou Cheng
Insert XLNX CSU DMA module to ZynqMP SoC, and connent the stream
link of GQSPI to CSU DMA.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
Changes in v3:
- new patch: xlnx-zynqmp: Add XLNX CSU DMA module
include/hw/arm/xlnx-zynqmp.h | 2 ++
hw/arm/xlnx-zynqmp.c
From: Xuzhou Cheng
There are some coding convention warnings in xilinx_spips.c,
as reported by:
$ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c
Let's clean them up.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
---
(no
From: Xuzhou Cheng
There are some coding convention warnings in xlnx-zynqmp.c and
xlnx-zynqmp.h, as reported by:
$ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h
$ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c
Let's clean them up.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
From: Xuzhou Cheng
Now that the XLNX CSU DMA model is implemented, the existing codes
in the ZynqMP QSPIS are useless and should be removed.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
Changes in v3:
- new patch: xilinx_spips: Remove DMA related code from zynqmp_qspips
hw/ssi/x
10.02.2021 13:00, Max Reitz wrote:
On 09.02.21 19:51, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 21:41, Denis V. Lunev wrote:
On 2/9/21 9:36 PM, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 19:39, Vladimir Sementsov-Ogievskiy wrote:
09.02.2021 17:47, Max Reitz wrote:
On 09.02.21 15:10,
On Wed, Feb 10, 2021 at 5:54 PM Bin Meng wrote:
>
> From: Bin Meng
>
> Current QEMU HEAD nvme.c does not compile:
>
> hw/block/nvme.c: In function ‘nvme_process_sq’:
Not sure why compiler reports this error happens in nvme_process_sq()?
But it should be in nvme_get_feature(). I will update th
From: Bin Meng
Current QEMU HEAD nvme.c does not compile:
hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
function [-Werror=maybe-uninitialized]
trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "disabled");
^
hw/block/nvme.c:3150:14: note: ‘res
On Wed, Feb 10, 2021 at 6:23 PM Klaus Jensen wrote:
>
> On Feb 10 18:15, Bin Meng wrote:
> > On Wed, Feb 10, 2021 at 5:54 PM Bin Meng wrote:
> > >
> > > From: Bin Meng
> > >
> > > Current QEMU HEAD nvme.c does not compile:
> > >
> > > hw/block/nvme.c: In function ‘nvme_process_sq’:
> >
> > Not
On Feb 10 18:15, Bin Meng wrote:
> On Wed, Feb 10, 2021 at 5:54 PM Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > Current QEMU HEAD nvme.c does not compile:
> >
> > hw/block/nvme.c: In function ‘nvme_process_sq’:
>
> Not sure why compiler reports this error happens in nvme_process_sq()?
>
Ye
On Feb 10 18:24, Bin Meng wrote:
> On Wed, Feb 10, 2021 at 6:23 PM Klaus Jensen wrote:
> >
> > On Feb 10 18:15, Bin Meng wrote:
> > > On Wed, Feb 10, 2021 at 5:54 PM Bin Meng wrote:
> > > >
> > > > From: Bin Meng
> > > >
> > > > Current QEMU HEAD nvme.c does not compile:
> > > >
> > > > hw/blo
CC qemu-trivial.
On Feb 10 18:23, Bin Meng wrote:
> From: Bin Meng
>
> Current QEMU HEAD nvme.c does not compile:
>
> hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
> function [-Werror=maybe-uninitialized]
> trace_pci_nvme_getfeat_vwcache(result ? "enabled
On 21-02-10 18:23:17, Bin Meng wrote:
> From: Bin Meng
>
> Current QEMU HEAD nvme.c does not compile:
>
> hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
> function [-Werror=maybe-uninitialized]
> trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "disabled
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Hi Richard,
I've just tracked this commit down to breaking the plugin inline support
(qemu_plugin_register_vcpu_insn_exec_inline). It wasn't picked up by CI
because inline isn't the default (normal callbacks are). I was just
adding
There's a change in mprotect() behaviour [1] in the latest macOS on M1
and it's not yet clear if it's going to be fixed by Apple. For now we
can avoid unsupported mprotect() calls. QEMU and qtests work fine
without it.
1. https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f
Buglink:
On Wed, 10 Feb 2021 at 10:31, Klaus Jensen wrote:
> On Feb 10 18:24, Bin Meng wrote:
> > I am using the default GCC 5.4 on a Ubuntu 16.04 host.
> >
>
> Alright. I'm actually not sure why newer compilers does not report this.
> The warning looks reasonable.
It's not actually ever possible for nvme
On Wed, 10 Feb 2021 at 00:02, Richard Henderson
wrote:
>
> Resolve the untagged address once, using thread_cpu.
> Tidy the DEBUG_REMAP code using glib routines.
>
> Signed-off-by: Richard Henderson
> ---
> linux-user/uaccess.c | 27 ++-
Reviewed-by: Peter Maydell
thanks
On 21-02-10 08:06:45, Klaus Jensen wrote:
> From: Gollu Appalanaidu
>
> Add the 'oncs' nvme device parameter to allow optional features to be
> enabled/disabled explicitly. Since most of these are optional commands,
> make the CSE log pages dynamic to account for the value of ONCS.
>
> Signed-of
Hi Bin,
On 2/10/21 11:23 AM, Bin Meng wrote:
> From: Bin Meng
>
> Current QEMU HEAD nvme.c does not compile:
>
> hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
> function [-Werror=maybe-uninitialized]
> trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "
On 21-02-10 08:06:46, Klaus Jensen wrote:
> From: Gollu Appalanaidu
>
> Add support for marking blocks invalid with the Write Uncorrectable
> command. Block status is tracked in a (non-persistent) bitmap that is
> checked on all reads and written to on all writes. This is potentially
> expensive,
Hi Philippe,
On Wed, Feb 10, 2021 at 7:12 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Bin,
>
> On 2/10/21 11:23 AM, Bin Meng wrote:
> > From: Bin Meng
> >
> > Current QEMU HEAD nvme.c does not compile:
> >
> > hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
> > function
On Tue, Feb 09, 2021 at 09:58:29AM +, Daniel P. Berrangé wrote:
> On Tue, Feb 09, 2021 at 07:37:51AM +0100, Thomas Huth wrote:
> > On 08/02/2021 17.33, Daniel P. Berrangé wrote:
> > [...]
> > > For example, consider pushing 5 commits, one of which contains a
> > > dockerfile change. This will t
Hi Philippe,
On Wed, Feb 10, 2021 at 7:15 PM Philippe Mathieu-Daudé
wrote:
>
> On 2/10/21 12:12 PM, Philippe Mathieu-Daudé wrote:
> > Hi Bin,
> >
> > On 2/10/21 11:23 AM, Bin Meng wrote:
> >> From: Bin Meng
> >>
> >> Current QEMU HEAD nvme.c does not compile:
> >>
> >> hw/block/nvme.c:3242:9:
On 2/10/21 12:12 PM, Philippe Mathieu-Daudé wrote:
> Hi Bin,
>
> On 2/10/21 11:23 AM, Bin Meng wrote:
>> From: Bin Meng
>>
>> Current QEMU HEAD nvme.c does not compile:
>>
>> hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
>> function [-Werror=maybe-uninitialized]
>>
gt; are available in the Git repository at:
>
> https://github.com/bkoppelmann/qemu.git tags/pull-tricore-20210210
>
> for you to fetch changes up to 52be63523e80bc92b8192a1e445fe499650085ac:
>
> tricore: added trib
ping?
On 1/27/21 11:42 PM, Philippe Mathieu-Daudé wrote:
> Taking notes while reviewing commit 671a0a1265a
> ("use MMUAccessType instead of int in mmu_translate").
>
> Philippe Mathieu-Daudé (3):
> target/tricore: Replace magic value by MMU_DATA_LOAD definition
> target/tricore: Pass MMUAcces
From: Bin Meng
Current QEMU HEAD nvme.c does not compile with the default GCC 5.4
on a Ubuntu 16.04 host:
hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in this
function [-Werror=maybe-uninitialized]
trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "disabled");
This is NOT a fix but we can get working FTPs again with this patch -
narrowing into where the problem is. Looks like the behaviour of this
code is different on macOS to other OSes.
--- slirp.c.orig2021-02-08 21:05:20.0 +
+++ slirp.c 2021-02-10 11:00:00.0 +
@@ -
On Wed, Feb 10, 2021 at 12:15:45PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/10/21 12:12 PM, Philippe Mathieu-Daudé wrote:
> > Hi Bin,
> >
> > On 2/10/21 11:23 AM, Bin Meng wrote:
> >> From: Bin Meng
> >>
> >> Current QEMU HEAD nvme.c does not compile:
> >>
> >> hw/block/nvme.c:3242:9: error:
On 10/02/2021 12.15, Bin Meng wrote:
Hi Philippe,
On Wed, Feb 10, 2021 at 7:12 PM Philippe Mathieu-Daudé
wrote:
Hi Bin,
On 2/10/21 11:23 AM, Bin Meng wrote:
From: Bin Meng
Current QEMU HEAD nvme.c does not compile:
hw/block/nvme.c:3242:9: error: ‘result’ may be used uninitialized in t
Ciao Paolo,
On 2/5/21 9:04 PM, Richard Henderson wrote:
> On 2/4/21 6:39 AM, Claudio Fontana wrote:
>> +static void hvf_cpu_accel_class_init(ObjectClass *oc, void *data)
>> +{
>> +AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
>> +
>> +acc->cpu_realizefn = host_cpu_realizefn;
>> +acc->cpu_i
On Wed, Feb 10, 2021 at 11:22:19AM +, Daniel P. Berrangé wrote:
> On Wed, Feb 10, 2021 at 12:15:45PM +0100, Philippe Mathieu-Daudé wrote:
> > On 2/10/21 12:12 PM, Philippe Mathieu-Daudé wrote:
> > > Hi Bin,
> > >
> > > On 2/10/21 11:23 AM, Bin Meng wrote:
> > >> From: Bin Meng
> > >>
> > >> C
On Feb 10 11:01, Peter Maydell wrote:
> On Wed, 10 Feb 2021 at 10:31, Klaus Jensen wrote:
> > On Feb 10 18:24, Bin Meng wrote:
> > > I am using the default GCC 5.4 on a Ubuntu 16.04 host.
> > >
> >
> > Alright. I'm actually not sure why newer compilers does not report this.
> > The warning looks r
On Wed, Feb 10, 2021 at 06:10:11PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng
>
> Insert XLNX CSU DMA module to ZynqMP SoC, and connent the stream
> link of GQSPI to CSU DMA.
>
> Signed-off-by: Xuzhou Cheng
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3:
> - new patch: xlnx-zynqmp: Add
On Wed, Feb 10, 2021 at 06:10:13PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng
>
> Now that the XLNX CSU DMA model is implemented, the existing codes
> in the ZynqMP QSPIS are useless and should be removed.
We should also modify XLNX_ZYNQMP_SPIPS_R_MAX in the header file.
Otherwise, this looks
On Wed, Feb 10, 2021 at 06:10:12PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng
>
> There are some coding convention warnings in xilinx_spips.c,
> as reported by:
>
> $ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c
>
> Let's clean them up.
>
> Signed-off-by: Xuzhou Cheng
> Signed-off-by: Bin
On Feb 10 20:14, Minwoo Im wrote:
> On 21-02-10 08:06:46, Klaus Jensen wrote:
> > From: Gollu Appalanaidu
> >
> > Add support for marking blocks invalid with the Write Uncorrectable
> > command. Block status is tracked in a (non-persistent) bitmap that is
> > checked on all reads and written to o
On Wed, Feb 10, 2021 at 06:10:09PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng
>
> ZynqMP QSPI supports SPI transfer using DMA mode, but currently this
> is unimplemented. When QSPI is programmed to use DMA mode, QEMU will
> crash. This is observed when testing VxWorks 7.
>
> This adds a basic C
On 2/4/21 11:37 PM, Hao Wu wrote:
> I don't see this error. It could be some error in the clock that the
> timer module does not get a correct clock input.
> How do you reproduce this?
I got it only once, can not reproduce, but it happened on our CI too:
https://gitlab.com/qemu-project/qemu/-/jobs
On Wed, Feb 10, 2021 at 06:10:10PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng
>
> There are some coding convention warnings in xlnx-zynqmp.c and
> xlnx-zynqmp.h, as reported by:
>
> $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h
> $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c
>
>
On Wed, Jan 27, 2021 at 11:42:53PM +0100, Philippe Mathieu-Daudé wrote:
> cpu_get_phys_page_debug() uses 'DATA LOAD' MMU access type.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/tricore/helper.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Bastian Koppelma
On Wed, Jan 27, 2021 at 11:42:54PM +0100, Philippe Mathieu-Daudé wrote:
> 'int access_type' and ACCESS_INT are unused, drop them.
> Provide the mmu_idx argument to match other targets.
> 'int rw' is actually the MMUAccessType, rename it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/t
On Wed, Jan 27, 2021 at 11:42:55PM +0100, Philippe Mathieu-Daudé wrote:
> Remove these confusing and unused definitions.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/tricore/cpu.h | 12
> 1 file changed, 12 deletions(-)
>
Reviewed-by: Bastian Koppelmann
Cheers,
Basti
@John please build from master and apply the patch
https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg03527.html
** Tags added: macos tcg
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1913505
Hi,
On Wed, Jan 27, 2021 at 11:42:52PM +0100, Philippe Mathieu-Daudé wrote:
> Taking notes while reviewing commit 671a0a1265a
> ("use MMUAccessType instead of int in mmu_translate").
>
> Philippe Mathieu-Daudé (3):
> target/tricore: Replace magic value by MMU_DATA_LOAD definition
> target/tri
#x27;remotes/nvme/tags/nvme-next-pull-request'
> > into staging (2021-02-09 13:24:37 +)
> >
> > are available in the Git repository at:
> >
> > https://github.com/bkoppelmann/qemu.git tags/pull-tricore-20210210
> >
> > for you to fetch ch
On Thu, Feb 04, 2021 at 05:39:09PM +0100, Claudio Fontana wrote:
> From: Eduardo Habkost
>
> The TCG-specific CPU methods will be moved to a separate struct,
> to make it easier to move accel-specific code outside generic CPU
> code in the future. Start by moving tcg_initialize().
>
> The new C
On Thu, Feb 04, 2021 at 05:39:10PM +0100, Claudio Fontana wrote:
> for now only TCG is allowed as an accelerator for riscv,
> so remove the CONFIG_TCG use.
>
> Signed-off-by: Claudio Fontana
> Reviewed-by: Alistair Francis
> Reviewed-by: Alex Bennée
> ---
> target/riscv/cpu.c | 3 +--
> 1 file
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