On Wed, Feb 10, 2021 at 06:10:10PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng <xuzhou.ch...@windriver.com>
>
> There are some coding convention warnings in xlnx-zynqmp.c and
> xlnx-zynqmp.h, as reported by:
>
> $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h
> $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c
>
> Let's clean them up.
>
> Signed-off-by: Xuzhou Cheng <xuzhou.ch...@windriver.com>
> Signed-off-by: Bin Meng <bin.m...@windriver.com>
>
> ---
>
> Changes in v3:
> - new patch: xlnx-zynqmp: Clean up coding convention issues
>
> include/hw/arm/xlnx-zynqmp.h | 3 ++-
> hw/arm/xlnx-zynqmp.c | 11 +++++++----
> 2 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 6f45387..be15cc8 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -60,7 +60,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
>
> #define XLNX_ZYNQMP_GIC_REGIONS 6
>
> -/* ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k
> offsets
> +/*
> + * ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k
> offsets
> * and under-decodes the 64k region. This mirrors the 4k regions to every 4k
> * aligned address in the 64k region. To implement each GIC region needs a
> * number of memory region aliases.
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 8818472..76b94a5 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -301,11 +301,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
>
> ram_size = memory_region_size(s->ddr_ram);
>
> - /* Create the DDR Memory Regions. User friendly checks should happen at
> + /*
> + * Create the DDR Memory Regions. User friendly checks should happen at
> * the board level
> */
> if (ram_size > XLNX_ZYNQMP_MAX_LOW_RAM_SIZE) {
> - /* The RAM size is above the maximum available for the low DDR.
> + /*
> + * The RAM size is above the maximum available for the low DDR.
> * Create the high DDR memory region as well.
> */
> assert(ram_size <= XLNX_ZYNQMP_MAX_RAM_SIZE);
> @@ -351,7 +353,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
>
> qdev_realize(DEVICE(&s->apu_cluster), NULL, &error_fatal);
>
> - /* Realize APUs before realizing the GIC. KVM requires this. */
> + /* Realize APUs before realizing the GIC. KVM requires this. */
This doesn't look like a checkpatch fix...
> for (i = 0; i < num_apus; i++) {
> const char *name;
>
> @@ -526,7 +528,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
> SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]);
> Object *sdhci = OBJECT(&s->sdhci[i]);
>
> - /* Compatible with:
> + /*
> + * Compatible with:
> * - SD Host Controller Specification Version 3.00
> * - SDIO Specification Version 3.0
> * - eMMC Specification Version 4.51
> --
> 2.7.4
>
