在 2018/10/1 下午5:22, Thomas Huth 写道:
On 2018-09-29 07:48, Yi Min Zhao wrote:
在 2018/9/19 下午3:53, Thomas Huth 写道:
On 2018-09-19 09:08, Yi Min Zhao wrote:
[...]
diff --git a/hw/s390x/s390-pci-bus.h b/hw/s390x/s390-pci-bus.h
index 1f7f9b5814..fdf13a19c0 100644
--- a/hw/s390x/s390-pci-bus.h
+++
On Mon, 2018-10-15 at 09:59 -0700, Alistair Francis wrote:
> On Mon, Oct 15, 2018 at 7:39 AM Andrea Bolognani wrote:
> > One more thing that I forgot to bring up earlier: at the same time
> > as PCIe support is added, we should also make sure that the
> > pcie-root-port device is built into the qe
On 15 October 2018 at 21:28, Palmer Dabbelt wrote:
> On Fri, 12 Oct 2018 02:34:12 PDT (-0700), peter.mayd...@linaro.org wrote:
>> The expected patch flow for QEMU is:
>> * original patch author posts patch to qemu-devel
>>(this applies also if the author happens to be the
>>submaintainer)
On 11/10/2018 18:47, Richard Henderson wrote:
> On 10/11/18 1:06 AM, David Hildenbrand wrote:
>> On 03/10/2018 21:39, Richard Henderson wrote:
>>> When op raises an exception, it may not have initialized the output
>>> temps that would be written back by wout or cout.
>>>
>>> Cc: qemu-s3...@nongnu.
On 15 October 2018 at 19:01, Eduardo Habkost wrote:
> On Mon, Oct 15, 2018 at 05:55:27PM +0100, Peter Maydell wrote:
>> I also suspect "a few months" is an underestimate. My guess
>> would be we're going to want to keep Python 2 support for
>> at least the next year, maybe two.
>
> Python 2.7 will
* Richard Henderson (richard.hender...@linaro.org) wrote:
> On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> > In some cases it may be helpful to modify state before saving it for
> > migration, and then modify the state back after it has been saved. The
> > existing pre_save function provides half of t
On 15 October 2018 at 18:36, Alex Williamson wrote:
> The following changes since commit ff56877e911782dedc9a424233fd3f62369c258c:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/vga-20181015-pull-request' into staging (2018-10-15
> 15:03:45 +0100)
>
> are available in the Git reposito
On Mon, 15 Oct 2018 15:14:04 -0300
Eduardo Habkost wrote:
> On Sun, Oct 14, 2018 at 05:35:12PM -0400, Michael S. Tsirkin wrote:
> > On Fri, Oct 12, 2018 at 11:54:35PM -0300, Eduardo Habkost wrote:
> > > The current virtio-*-pci device types actually represent 3
> > > different types of devices:
Adds EXTERNAL attribute definition to qemu timers subsystem and assigns it to
virtual clock timers, used in slirp (ICMP IPv6) and ui (key queue).
Virtual clock processing in rr mode reimplemented using this attribute.
Fixes: 87f4fe7653baf55b5c2f2753fe6003f473c07342
Fixes: 775a412bf83f6bc0c5c02091
This small patchset fixes a couple of bugs in our ATS insn
handling:
* for faults reported to the 64-bit PAR we were not
setting the S and PTW bits to indicate stage 2
fault information
(NB: stage 2 faults aren't reported with 32-bit
PAR formats so there's no need to change the 32-bit
ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations
on the EL2 translation regime) were implemented in commit 14db7fe09a2c8.
However, we got them wrong: these should do stage 1 address translations
as defined for NS-EL2, which is ARMMMUIdx_S1E2. We were incorrectly
making them per
In do_ats_write() we construct a PAR value based on the result
of the translation. A comment says "S2WLK and FSTAGE are always
zero, because we don't implement virtualization".
Since we do in fact now implement virtualization, add the missing
code that sets these bits based on the reported ARMMMUF
> From: Fredrik Noring
> Sent: Monday, October 15, 2018 7:02 PM
> To: Maciej W. Rozycki
> Cc: Philippe Mathieu-Daudé; Richard Henderson; Aleksandar Markovic; Aurelien
> Jarno; > qemu-devel@nongnu.org Developers; Jürgen Urban
> Subject: Re: [PATCH] target/mips: Support Toshiba specific three-opera
* Alex Williamson (alex.william...@redhat.com) wrote:
> Hi,
>
> I'd like to start a discussion about virtual PCIe link width and speeds
> in QEMU to figure out how we progress past the 2.5GT/s, x1 width links
> we advertise today. This matters for assigned devices as the endpoint
> driver may not
Public bug reported:
Specs:
CPU: Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz
OS: Ubuntu 18.04 AMD64
QEMU: 1:2.11+dfsg-1ubuntu7.6 (Ubuntu Bionic Package)
Openstack: Openstack Queens (Ubuntu Bionic Package)
Libvirt-daemon: 4.0.0-1ubuntu8.5
Seabios: 1.10.2-1ubuntu1
The Problem:
We are not able to sta
On Oct 15 14:35, Richard Henderson wrote:
> On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> > +static const pm_event pm_events[] = {
> > +};
> > +#define MAX_EVENT_ID 0x0
>
> Is this going to be ARRAY_SIZE(pm_events) - 1 in the end?
No, this ends up being a 'sparse' array. It maps the ARM architected
On Tue, 16 Oct 2018 01:19:35 +
Stewart Hildebrand wrote:
Hi,
Stewart, thanks a lot for picking this up!
> On Monday, October 15, 2018 6:05 PM, Philippe Mathieu-Daudé wrote:
> > Hi Stewart,
> >
> > On 15/10/2018 23:26, Stewart Hildebrand wrote:
> > > +/* For the virt board, we
On 16 October 2018 at 11:02, Andre Przywara wrote:
> On Tue, 16 Oct 2018 01:19:35 +
> Stewart Hildebrand wrote:
>
> Hi,
>
> Stewart, thanks a lot for picking this up!
>
>> On Monday, October 15, 2018 6:05 PM, Philippe Mathieu-Daudé wrote:
>> > Hi Stewart,
>> >
>> > On 15/10/2018 23:26, Stewar
Hi Alex,
You should be able to fix this by passing the right cpu flags, e.g.:
-cpu IvyBridge,host-phys-bits=yes
or
-cpu IvyBridge,physbits=46
Dave
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1
v1: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg01601.html
The XTS cipher mode is significantly slower than CBC mode. This series
approximately doubles the XTS performance which will improve the I/O
rate for LUKS disks.
Changed in v2:
- Use union for xts_uint128 to allow bytewise
The tweak encrypt/decrypt functions are identical except for the
comments, so can be merged. Profiling data shows that the compiler is
in fact already merging the two merges in the object files.
Reviewed-by: Marc-André Lureau
Reviewed-by: Alberto Garcia
Signed-off-by: Daniel P. Berrangé
---
cr
The new type is designed to allow use of 64-bit arithmetic instead
of operating 1-byte at a time. The following patches will use this to
improve performance.
Signed-off-by: Daniel P. Berrangé
---
crypto/xts.c | 46 ++
1 file changed, 26 insertions(+),
Using 64-bit arithmetic increases the performance for xts-aes-128
when built with gcrypt:
Encrypt: 272 MB/s -> 355 MB/s
Decrypt: 275 MB/s -> 362 MB/s
Signed-off-by: Daniel P. Berrangé
---
crypto/xts.c | 84
1 file changed, 58 insertions(+
Encouraging the compiler to inline xts_tweak_encdec increases the
performance for xts-aes-128 when built with gcrypt:
Encrypt: 545 MB/s -> 580 MB/s
Decrypt: 568 MB/s -> 602 MB/s
Reviewed-by: Alberto Garcia
Signed-off-by: Daniel P. Berrangé
---
crypto/xts.c | 10 +-
1 file changed,
Add testing coverage for AES with XTS, ECB and CTR modes
Reviewed-by: Marc-André Lureau
Reviewed-by: Alberto Garcia
Signed-off-by: Daniel P. Berrangé
---
tests/benchmark-crypto-cipher.c | 149 +++-
1 file changed, 126 insertions(+), 23 deletions(-)
diff --git a/tes
The current XTS test overloads two different tests in a single function
making the code a little hard to follow. Split it into distinct test
cases.
Signed-off-by: Daniel P. Berrangé
---
tests/test-crypto-xts.c | 140 +++-
1 file changed, 80 insertions(+), 60 d
Using 64-bit arithmetic increases the performance for xts-aes-128
when built with gcrypt:
Encrypt: 355 MB/s -> 545 MB/s
Decrypt: 362 MB/s -> 568 MB/s
Signed-off-by: Daniel P. Berrangé
---
crypto/xts.c | 39 +++
1 file changed, 27 insertions(+), 12 deletio
On 2018/10/15 下午9:20, Peter Maydell wrote:
On 15 October 2018 at 09:46, Jason Wang wrote:
The following changes since commit a73549f99612f758dec0fdea6ae1c30b6c709a0b:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20181012-pull-request'
into staging (2018-10-12 16:45:51 +0100)
are
Validate that the XTS cipher mode will correctly operate with plain
text, cipher text and IV buffers that are not 64-bit aligned.
Signed-off-by: Daniel P. Berrangé
---
tests/test-crypto-xts.c | 86 +
1 file changed, 86 insertions(+)
diff --git a/tests/tes
On 15 October 2018 at 10:08, Jerome Forissier
wrote:
> Hi Peter,
>
> On 10/05/2018 11:26 AM, Jerome Forissier wrote:
>> +CC: Rob Herring
>>
>> On 10/05/2018 11:16 AM, Peter Maydell wrote:
>>> On 5 October 2018 at 09:07, Jerome Forissier
>>> wrote:
Bindings for /secure-chosen and /secure-chos
The qcow2 block driver expects to see a valid sector size even when it
has opened the crypto layer with QCRYPTO_BLOCK_OPEN_NO_IO.
Signed-off-by: Daniel P. Berrangé
---
crypto/block-qcow.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/crypto/block-qcow.c b/crypto/block-qcow.c
index 4284e0
On Mon, Oct 15, 2018 at 06:38:14PM +0200, Max Reitz wrote:
> On 11.10.18 12:58, Alberto Garcia wrote:
> > This doesn't have any practical effect at the moment because the
> > values of BDRV_SECTOR_SIZE, QCRYPTO_BLOCK_LUKS_SECTOR_SIZE and
> > QCRYPTO_BLOCK_QCOW_SECTOR_SIZE are all the same (512 byte
On 8 October 2018 at 22:22, Richard Henderson
wrote:
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 17 +++-
> target/arm/translate-a64.h | 1 +
> target/arm/translate.h | 1 +
> linux-user/elfload.c | 6 +--
On 8 October 2018 at 22:21, Richard Henderson
wrote:
> At present we assert:
>
> arm_el_is_aa64: Assertion `el >= 1 && el <= 3' failed.
>
> The comment in arm_el_is_aa64 explains why asking about EL0 without
> extra information is impossible. Add an extra argument to provide
> it from the surro
On 8 October 2018 at 22:21, Richard Henderson
wrote:
> Most of the v8 extensions are self-contained within the ISAR
> registers and are not implied by other feature bits, which
> makes them the easiest to convert.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> diff
Hi
On Fri, Oct 12, 2018 at 1:56 PM Daniel P. Berrangé wrote:
>
> On Fri, Oct 12, 2018 at 01:43:39PM +0400, Marc-André Lureau wrote:
> > Hi
> >
> > On Thu, Oct 11, 2018 at 7:49 PM Daniel P. Berrangé
> > wrote:
> > >
> > > Adding Markus since we're talking about new CLI argument and capability
>
On 8 October 2018 at 22:21, Richard Henderson
wrote:
> This edition fixes a number of conflicts with master, and adds
> a few field definitions from ARMv8.5, courtesy of Philippe.
>
> It also fixes a big think-o in a last-minute change to the
> sve system mode patch set that was applied to master
On 11 October 2018 at 03:19, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> This patch series adds initial support for Xilinx's Versal SoC.
> Xilinx is introducing Versal, an adaptive compute acceleration platform
> (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Sc
On 11 October 2018 at 04:50, Heinrich Schuchardt wrote:
> According to the "Devicetree Specification, Release v0.2" 'model' is a
> required property of the root node.
>
> Some software like the Debian flash-kernel package rely on this property
> to identify boards.
>
> The patch sets the model pro
On Tue 16 Oct 2018 12:31:05 PM CEST, Daniel P. Berrangé wrote:
> The qcow2 block driver expects to see a valid sector size even when it
> has opened the crypto layer with QCRYPTO_BLOCK_OPEN_NO_IO.
>
> Signed-off-by: Daniel P. Berrangé
I was actually preparing a patch along these lines :-)
Review
From: Xiao Guangrong
Adapt the compression code to the lockless multithread model
Signed-off-by: Xiao Guangrong
---
migration/ram.c | 312 +---
1 file changed, 115 insertions(+), 197 deletions(-)
diff --git a/migration/ram.c b/migration/ram.
From: Xiao Guangrong
This is the last part of our previous work:
https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg00526.html
This part finally improves the multithreads model used by compression
and decompression, that makes the compression feature is really usable
in the production.
From: Xiao Guangrong
ptr_ring is good to minimize cache-contention and has the simple model
of memory barrier which will be used by lockless threads model to pass
requests between main migration thread and compression threads
Some changes are made:
1) drop unnecessary APIs, e.g, for _irq, _bh AP
From: Xiao Guangrong
Adapt the compression code to the lockless multithread model
Signed-off-by: Xiao Guangrong
---
migration/ram.c | 223
1 file changed, 78 insertions(+), 145 deletions(-)
diff --git a/migration/ram.c b/migration/ram.c
From: Xiao Guangrong
Current implementation of compression and decompression are very
hard to be enabled on productions. We noticed that too many wait-wakes
go to kernel space and CPU usages are very low even if the system
is really free
The reasons are:
1) there are two many locks used to do sy
Gerd Hoffmann writes:
>> >> +error_propagate(errp, local_err);
>> > Shall we use error_propagate(errp, local_err, ("Failed to init VNC
>> > server: ");
>> > like vnc_display_open does?
>>
>> I don't know.
>>
>> The error reporting is somewhat poor around here. Consider:
>>
>> $
From: "Dr. David Alan Gilbert"
Signed-off-by: Dr. David Alan Gilbert
---
hw/input/pckbd.c | 19 ++-
hw/input/trace-events | 7 +++
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index 07c8801387..3d9eded323 100644
-
I noticed this hadn't got merged - who wants it?
Dave
* Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
> * Mark Cave-Ayland (mark.cave-ayl...@ilande.co.uk) wrote:
> > On 27/07/18 14:44, Dr. David Alan Gilbert wrote:
> >
> > > * Mark Cave-Ayland (mark.cave-ayl...@ilande.co.uk) wrote:
> > >
Am 16.10.2018 um 12:31 hat Daniel P. Berrangé geschrieben:
> The qcow2 block driver expects to see a valid sector size even when it
> has opened the crypto layer with QCRYPTO_BLOCK_OPEN_NO_IO.
>
> Signed-off-by: Daniel P. Berrangé
Thanks, applied to the block branch (and staged before the other
On 12 October 2018 at 11:00, Cornelia Huck wrote:
> From: Tony Krowiak
>
> Introduces a VFIO based AP device. The device is defined via
> the QEMU command line by specifying:
>
> -device vfio-ap,sysfsdev=
>
> There may be only one vfio-ap device configured for a guest.
>
> The mediated matrix
On 29 August 2018 at 18:50, Eduardo Habkost wrote:
> On Wed, Aug 29, 2018 at 12:14:22AM +0800, Zhang Yi wrote:
>> object_get_canonical_path_component() returns a string which
>> must be freed using g_free().
>>
>> Reported-by: Peter Maydell
>> Signed-off-by: Michael S. Tsirkin
>> Signed-off-by:
If ioctl(..., VFIO_DEVICE_RESET) fails, we want to report errno
instead of ret (which is always -1 on error).
Fixes Coverity issue CID 1396176.
Reported-by: Peter Maydell
Signed-off-by: Cornelia Huck
---
hw/vfio/ap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/vfio/a
On 10 October 2018 at 21:37, Aaron Lindsay wrote:
> The ARM PMU implementation currently contains a basic cycle counter, but
> it is often useful to gather counts of other events, filter them based
> on execution mode, and/or be notified on counter overflow. These patches
> flesh out the implement
First the mmap size is a kvm ioctl, so it can go kvm initialization.
Second this can avoid triggering KVM_GET_VCPU_MMAP_SIZE while
initializing and destroying every VCPU.
Signed-off-by: Li Qiang
---
accel/kvm/kvm-all.c | 28 ++--
1 file changed, 10 insertions(+), 18 delet
Am 15.10.2018 um 19:28 hat Max Reitz geschrieben:
> This adds some whitespace into the option help (including indentation)
> and replaces '=' by ': ' (not least because '=' should be used for
> values, not types). Furthermore, the list name is no longer printed as
> part of every line, but only on
On Tue, Oct 16, 2018 at 02:47:12PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Fri, Oct 12, 2018 at 1:56 PM Daniel P. Berrangé
> wrote:
> >
> > On Fri, Oct 12, 2018 at 01:43:39PM +0400, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Thu, Oct 11, 2018 at 7:49 PM Daniel P. Berrangé
> > > wrote
From: Aleksandar Markovic
This series adds opcodes and accompanying comments for Ingenic's
MXU ASE.
Aleksandar Markovic (4):
target/mips: Add basic description of MXU ASE
target/mips: Add assembler mnemonics list for MXU ASE
target/mips: Add organizational chart of MXU ASE
target/mips: A
From: Aleksandar Markovic
Add opcode values for all instructions in MXU ASE.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 276
1 file changed, 276 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
From: Aleksandar Markovic
Add a comment that contains a list all MXU instructions,
expressed in assembler mnemonics.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 88 +
1 file changed, 88 insertions(+)
diff --git a/target/mips
From: Aleksandar Markovic
Add a comment that contains a basic description of MXU ASE.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 20
1 file changed, 20 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ab16cdb..23e21c
From: Aleksandar Markovic
Add a comment that contains an organizational chart of MXU ASE
instructions.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 156
1 file changed, 156 insertions(+)
diff --git a/target/mips/translate.c
> From: Aleksandar Markovic
> Subject: [PATCH v5 00/28] Misc MIPS fixes and improvements for October 2018
Hi, Laurent
Earlier I mentioned that I intend to include these in my MIPS queue:
elf: Fix PT_MIPS_XXX constants
elf: Add MIPS_ABI_FP_XXX constants
elf: Add Mips_elf_abiflags_v0 struct
On 20 June 2018 at 17:58, John Snow wrote:
>
>
> On 06/20/2018 12:43 PM, Peter Maydell wrote:
>> On 27 April 2018 at 14:22, Peter Maydell wrote:
>>> On 13 March 2018 at 21:14, John Snow wrote:
From: Vladimir Sementsov-Ogievskiy
Postcopy migration of dirty bitmaps. Only named dirt
On 25 August 2018 at 08:47, Paolo Bonzini wrote:
> They are not consecutive with DAC1_FRAME* and DAC2_FRAME*.
>
> Fixes: 154c1d1f960c5147a3f8ef00907504112f271cd8
> Signed-off-by: Paolo Bonzini
> ---
> hw/audio/es1370.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff -
Am 16.10.2018 um 08:41 hat Markus Armbruster geschrieben:
> bdrv_img_create() takes an Error ** argument and used it in the
> conventional way, except for one place: when qemu_opts_do_parse()
> fails, it first reports its error to stderr or the HMP monitor with
> error_report_err(), then error_setg
On Tue 16 Oct 2018 12:09:13 PM CEST, Daniel P. Berrangé wrote:
> The new type is designed to allow use of 64-bit arithmetic instead
> of operating 1-byte at a time. The following patches will use this to
> improve performance.
>
> Signed-off-by: Daniel P. Berrangé
Reviewed-by: Alberto Garcia
Be
On Oct 16 13:01, Peter Maydell wrote:
> On 10 October 2018 at 21:37, Aaron Lindsay wrote:
> > The ARM PMU implementation currently contains a basic cycle counter, but
> > it is often useful to gather counts of other events, filter them based
> > on execution mode, and/or be notified on counter ove
Am 15.10.2018 um 22:03 hat Cleber Rosa geschrieben:
> While testing the Python 3 changes which touch the 083 test, I noticed
> that it would fail with qcow2. Expanding the testing, I noticed it
> had nothing to do with the Python 3 changes, and in fact, it would not
> pass on anything but raw:
>
On 10/16/2018 01:58 PM, Cornelia Huck wrote:
> If ioctl(..., VFIO_DEVICE_RESET) fails, we want to report errno
> instead of ret (which is always -1 on error).
>
> Fixes Coverity issue CID 1396176.
>
> Reported-by: Peter Maydell
> Signed-off-by: Cornelia Huck
makes sense
Reviewed-by: Christ
On 27 September 2018 at 17:55, Dongjiu Geng wrote:
> Support KVM_GET/SET_VCPU_EVENTS to get/set the SError exception state, and
> support the state migration.
>
> Now the VCPU event only includes the SError exception status, it can be
> extended if needed. When do migration, If source machine has
On Tue, Oct 16, 2018 at 12:55:08PM +0100, Peter Maydell wrote:
> On 29 August 2018 at 18:50, Eduardo Habkost wrote:
> > On Wed, Aug 29, 2018 at 12:14:22AM +0800, Zhang Yi wrote:
> >> object_get_canonical_path_component() returns a string which
> >> must be freed using g_free().
> >>
> >> Reported-
On 10/15/2018 11:45 AM, Max Reitz wrote:
082 is failing for me on master (046936ed), and this fixes it.
I'm wondering if/why other people are not running into this, as 082 runs
with qcow2 and is included on `make check-block`.
+ Max,
FIY, I ran into this while reviewing/testing your Python
We sometimes use g_new() & friends, which abort() on OOM, and sometimes
g_try_new() & friends, which can fail, and therefore require error
handling.
HACKING points out the difference, but is mum on when to use what:
3. Low level memory management
Use of the malloc/free/realloc/calloc/val
Attributes are simple flags, associated with individual timers for their whole
lifetime.
They intended to be used to mark individual timers for special handling by
various qemu features operating at qemu core level.
New/init functions family in timer interface updated and their comments
improved
On Tue 16 Oct 2018 12:09:14 PM CEST, Daniel P. Berrangé wrote:
> @@ -110,20 +111,34 @@ void xts_decrypt(const void *datactx,
> /* encrypt the iv */
> encfunc(tweakctx, XTS_BLOCK_SIZE, T.b, iv);
>
> -for (i = 0; i < lim; i++) {
> -xts_tweak_encdec(datactx, decfunc, src, dst,
16.10.2018 15:25, Peter Maydell wrote:
> On 20 June 2018 at 17:58, John Snow wrote:
>>
>> On 06/20/2018 12:43 PM, Peter Maydell wrote:
>>> On 27 April 2018 at 14:22, Peter Maydell wrote:
On 13 March 2018 at 21:14, John Snow wrote:
> From: Vladimir Sementsov-Ogievskiy
>
> Postco
On Tue, Oct 16, 2018 at 03:01:29PM +0200, Markus Armbruster wrote:
> We sometimes use g_new() & friends, which abort() on OOM, and sometimes
> g_try_new() & friends, which can fail, and therefore require error
> handling.
>
> HACKING points out the difference, but is mum on when to use what:
>
>
Theoretically possible that we finish the skipping loop with bs = NULL
and the following code will crash trying to dereference it. Fix that.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
migration/block-dirty-bitmap.c | 4
1 file changed, 4 insertions(+)
diff --git a/migration/block-dirt
On 16.10.18. 14:14, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Add a comment that contains a basic description of MXU ASE.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 20
1 file changed, 20 insertions(+)
diff --git a/target/mips/transl
On 2018-10-16 13:58, Cornelia Huck wrote:
> If ioctl(..., VFIO_DEVICE_RESET) fails, we want to report errno
> instead of ret (which is always -1 on error).
>
> Fixes Coverity issue CID 1396176.
>
> Reported-by: Peter Maydell
> Signed-off-by: Cornelia Huck
> ---
> hw/vfio/ap.c | 2 +-
> 1 file
What's this
===
Following the patch (vhost: introduce mdev based hardware vhost backend)
https://lwn.net/Articles/750770/, which defines a generic mdev device for
vhost data path acceleration (aliased as vDPA mdev below), this patch set
introduces a new net client type: vhost-vfio.
Current
Following the patch (vhost: introduce mdev based hardware vhost backend)
https://lwn.net/Articles/750770/, which defines a generic mdev device for
vDPA (vhost data path acceleration), this patch set introduces a new net
client type: vhost-vfio.
Currently we have 2 types of vhost backends in QEMU:
This patch implements vhost ops of vhost-vfio backend.
All the regular vhost messages including vring addr, negotiated features,
etc., are written to vDPA mdev device directly.
For device DMA mapping, QEMU passes memory region info to mdev device
and let kernel parent device driver to program IOM
On Tue, Oct 16, 2018 at 10:39:30AM +0200, Cornelia Huck wrote:
> On Mon, 15 Oct 2018 15:14:04 -0300
> Eduardo Habkost wrote:
>
> > On Sun, Oct 14, 2018 at 05:35:12PM -0400, Michael S. Tsirkin wrote:
> > > On Fri, Oct 12, 2018 at 11:54:35PM -0300, Eduardo Habkost wrote:
> > > > The current virti
On 16.10.18. 14:14, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Add a comment that contains a list all MXU instructions,
expressed in assembler mnemonics.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 88 +
1 fil
* Markus Armbruster (arm...@redhat.com) wrote:
> We sometimes use g_new() & friends, which abort() on OOM, and sometimes
> g_try_new() & friends, which can fail, and therefore require error
> handling.
>
> HACKING points out the difference, but is mum on when to use what:
>
> 3. Low level mem
On 16.10.18. 14:14, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Add a comment that contains an organizational chart of MXU ASE
instructions.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 156
1 file changed, 156
On Tue 16 Oct 2018 12:09:15 PM CEST, Daniel P. Berrangé wrote:
> Using 64-bit arithmetic increases the performance for xts-aes-128
> when built with gcrypt:
>
> Encrypt: 355 MB/s -> 545 MB/s
> Decrypt: 362 MB/s -> 568 MB/s
>
> Signed-off-by: Daniel P. Berrangé
This patch is also fine, but I h
On 16.10.18. 14:14, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Add opcode values for all instructions in MXU ASE.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 276
1 file changed, 276 insertions(+)
Reviewed
On Tue, Oct 16, 2018 at 08:48:16AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > I don't know. The `disable-modern` option already exists but I
> > don't know who would want to use it.
>
> Compat property for old (2.6 & older) machine types.
>
> > > Right - maybe a flag to disable modern interface
When [2] was fixed it was agreed that adding and calling post_plug()
callback after device_reset() was low risk approach to hotfix issue
right before release. So it was merged instead of moving already
existing plug() callback after device_reset() is called which would
be more risky and require all
On 16/10/2018 15:03, Artem Pisarenko wrote:
> +if (!timer_list) {
> +timer_list = main_loop_tlg.tl[type];
> +}
> +timer_init_full(ts, timer_list, scale, attributes, cb, opaque);
Please move this "if" to timer_init_full, so that here you can just pass
timer_list. timer_init_ful
They are not consecutive with DAC1_FRAME* and DAC2_FRAME*; Coverity
still complains about es1370_read, while es1370_write was fixed in
commit cf9270e5220671f49cc238deaf6136669cc07ae1.
Fixes: 154c1d1f960c5147a3f8ef00907504112f271cd8
Signed-off-by: Paolo Bonzini
---
hw/audio/es1370.c | 10
On 10/15/18 2:41 PM, Caio Carrara wrote:
> On 13-10-2018 00:37, Eduardo Habkost wrote:
>> On Fri, Oct 12, 2018 at 11:30:39PM +0200, Philippe Mathieu-Daudé wrote:
>>> Hi Cleber,
>>>
>>> On 12/10/2018 18:53, Cleber Rosa wrote:
A number of QEMU tests are written in Python, and may benefit
On 10/12/18 11:37 PM, Eduardo Habkost wrote:
> On Fri, Oct 12, 2018 at 11:30:39PM +0200, Philippe Mathieu-Daudé wrote:
>> Hi Cleber,
>>
>> On 12/10/2018 18:53, Cleber Rosa wrote:
>>> A number of QEMU tests are written in Python, and may benefit
>>> from an untainted Python venv.
>>>
>>> By using
On Tue, Oct 16, 2018 at 03:09:16PM +0200, Alberto Garcia wrote:
> On Tue 16 Oct 2018 12:09:14 PM CEST, Daniel P. Berrangé wrote:
>
> > @@ -110,20 +111,34 @@ void xts_decrypt(const void *datactx,
> > /* encrypt the iv */
> > encfunc(tweakctx, XTS_BLOCK_SIZE, T.b, iv);
> >
> > -for (
On Oct 16 09:21, Dr. David Alan Gilbert wrote:
> * Richard Henderson (richard.hender...@linaro.org) wrote:
> > On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> > > In some cases it may be helpful to modify state before saving it for
> > > migration, and then modify the state back after it has been saved
On Tue, 16 Oct 2018 15:33:40 +0200
Igor Mammedov wrote:
> When [2] was fixed it was agreed that adding and calling post_plug()
> callback after device_reset() was low risk approach to hotfix issue
> right before release. So it was merged instead of moving already
> existing plug() callback after
On 10/15/18 6:28 PM, Philippe Mathieu-Daudé wrote:
> Hi Caio,
>
> On 15/10/2018 20:41, Caio Carrara wrote:
>> On 13-10-2018 00:37, Eduardo Habkost wrote:
>>> On Fri, Oct 12, 2018 at 11:30:39PM +0200, Philippe Mathieu-Daudé wrote:
Hi Cleber,
On 12/10/2018 18:53, Cleber Rosa wrote:
On Tue, Oct 16, 2018 at 03:35:01PM +0200, Alberto Garcia wrote:
> On Tue 16 Oct 2018 12:09:15 PM CEST, Daniel P. Berrangé wrote:
> > Using 64-bit arithmetic increases the performance for xts-aes-128
> > when built with gcrypt:
> >
> > Encrypt: 355 MB/s -> 545 MB/s
> > Decrypt: 362 MB/s -> 568 M
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