> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Monday, August 27, 2012 4:50 PM
> To: Pavel Dovgaluk
> Cc: qemu-devel
> Subject: Re: [Qemu-devel] [PATCH] Save/load PC speaker internal state
>
> On 27 August 2012 13:21, Pavel Dovgaluk wrote:
> > Save PC
Add MIPS ASE DSP GPR-Based Shift instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 991 ++
target-mips/helper.h | 62 +++
target-mips/translate.c | 359 +
3 files changed, 1412 insertions(+)
diff --git a/targ
On 2012-08-28 08:58, Pavel Dovgaluk wrote:
> Save PC speaker state to remove differences between system
> states after saving the snapshot and after loading it again.
> This patch is needed for deterministic replay of the execution.
>
> v2: Do not save the data that cannot affect the guest code be
Hi list,
i'm trying to boot on virtio-scsi with scsi-block
but scsi-block don't seem to have the bootindex property
-device
scsi-block,bus=scsihw0.0,scsi-id=0,drive=drive-scsi0,id=scsi0,bootindex=100:
Property '.bootindex' not found
scsi-hd and scsi-generic works fine
any idea ?
Regards
Add MIPS ASE DSP Bit/Manipulation instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 79 ++
target-mips/helper.h |7 ++
target-mips/translate.c | 268 +-
3 files changed, 353 insertions(+), 1 deletion(-)
diff -
Add MIPS ASE DSP Load instructions.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 18d827d..9a86b2c 100644
--- a/target-mips/translat
Add MIPS[32|64] ASE DSP[R1|R2] generic cpu model for test.
Signed-off-by: Jia Liu
---
target-mips/translate_init.c | 55 ++
1 file changed, 55 insertions(+)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index c39138f..65ba547
Add MIPS ASE DSP resources access check.
Signed-off-by: Jia Liu
---
linux-user/main.c |6 ++
target-mips/cpu.h |8 ++--
target-mips/helper.c|3 +++
target-mips/op_helper.c | 19 +++
target-mips/translate.c | 23 +++
5 fi
On Tue, 21 Aug 2012 18:12:05 +
Blue Swirl wrote:
>
> Now I get this on mingw32:
> config-host.mak is out-of-date, running configure
>
> Error: librt check failed
Any news on the v4 patch, which should fix this?
Thanks!
Add MIPS ASE DSP Compare-Pick instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 917 ++
target-mips/helper.h | 52 +++
target-mips/translate.c | 322 +++-
3 files changed, 1289 insertions(+), 2 deletions(-)
diff
On 27.08.2012 22:56, Blue Swirl wrote:
[]
>> +static uint32_t slow_bar_readb(void *opaque, target_phys_addr_t addr)
>> +{
>> +AssignedDevRegion *d = opaque;
>> +uint8_t *in = d->u.r_virtbase + addr;
>
> Don't perform arithmetic with void pointers.
There are a few places in common qemu cod
On 2012년 08월 28일 03:31, Peter Maydell wrote:
On 27 August 2012 08:23, Yeongkyoon Lee wrote:
BTW, who will finally confirm my patches?
I have sent four version of my patches in which I have applied all the
reasonable feedbacks from this community.
If you'd like your patches committed you should
Winwave audio backend has problem with pausing and restart audio out.
Unlike other backends, Winwave pausing API does not flush audio buffer.
As a result, the previous audio data are playedin front of
user expected sound when user restart audio.
So changes it to waveOutReset()
Signed-off-by: Munky
On 27 August 2012 22:33, Erik de Castro Lopo <1042...@bugs.launchpad.net> wrote:
> Peter Maydell wrote:
>> Yes, qemu's linux-user emulation layer doesn't currently support any of
>> the posix timer syscalls.
>
> Any idea how much work is involved to implement this?
A couple of days for somebody wh
On Mon, Aug 27, 2012 at 7:54 AM, Vic wrote:
> Public bug reported:
>
> Hi,
>
> I can no longer boot my Windows 7 guest after this commit (update
> seabios to latest master)
>
> http://git.qemu.org/?p=qemu.git;a=commitdiff;h=01afdadc92e71e29700e64f3a5f42c1c543e3cf9
>
> When I tried to boot Windows,
On Mon, Aug 27, 2012 at 5:12 PM, Kevin Wolf wrote:
> Am 27.08.2012 11:04, schrieb Stefan Hajnoczi:
>> On Sun, Aug 26, 2012 at 10:56 AM, Alexandre DERUMIER
>> wrote:
>>> It is possible to achieve the same behaviour with external snapshot ? (I
>>> would like to do it online)
>>> I don't see how I
Hi All,
I have the following questions related to QEMU
a. Does the userland emulation mode of QEMU support running
multiple processes on separate processors? (i.e. if we were running
ARM7 emulation on a x86 machine with 8 CPU cores, can we launch one
ARM7 binary per CPU?).
b. Same quest
Public bug reported:
Environment:
Host OS (ia32/ia32e/IA64):ia32e
Guest OS (ia32/ia32e/IA64):ia32e
Guest OS Type (Linux/Windows):Linux
kvm.git Commit:1a577b72475d161b6677c05abe57301362023bb2
qemu-kvm Commit:98f1f30a89901c416e51cc70c1a08d9dc15a2ad4
Host Kernel Version:3.5.0-rc1
Hardwar
On 08/28/12 10:07, Stefan Hajnoczi wrote:
> On Mon, Aug 27, 2012 at 7:54 AM, Vic wrote:
>> Public bug reported:
>>
>> Hi,
>>
>> I can no longer boot my Windows 7 guest after this commit (update
>> seabios to latest master)
>>
>> http://git.qemu.org/?p=qemu.git;a=commitdiff;h=01afdadc92e71e29700e64
Hi..
On Tue, Aug 28, 2012 at 3:04 PM, Naresh Bhat wrote:
> Hi All,
>
> I have the following questions related to QEMU
>
> a. Does the userland emulation mode of QEMU support running
> multiple processes on separate processors? (i.e. if we were running
> ARM7 emulation on a x86 machine with 8
> However, if a disk-only snapshot is enough (this is what qemu-img
> snapshot -c would produce), it would be a trivial patch to add a savevm
> option to omit the VM state - and even though the snapshot is then still
> not really performed in the background, it should be quick enough to be
> worka
Implementing timer_create along is probably not enough, one would have
to implement rest of the related syscalls:
* timer_create(): Create a timer.
* timer_settime(2): Arm (start) or disarm (stop) a timer.
* timer_gettime(2): Fetch the time remaining until the next expirati
Hi Alex,
In my susyem I have following devices:
I tried assigning a following PCI devices:
00:03.0 Communication controller: Intel Corporation 4 Series Chipset HECI
Controller (rev 03)
00:03.2 IDE interface: Intel Corporation 4 Series Chipset PT IDER Controller
(rev 03)
00:03.3 Serial controlle
On 2012-08-28 05:38, liu ping fan wrote:
> On Tue, Aug 28, 2012 at 11:09 AM, liu ping fan wrote:
>> On Tue, Aug 28, 2012 at 3:38 AM, Jan Kiszka wrote:
>>> On 2012-08-27 20:52, Avi Kivity wrote:
On 08/27/2012 11:39 AM, Jan Kiszka wrote:
> On 2012-08-27 20:20, Avi Kivity wrote:
>> On 0
Il 28/08/2012 11:42, Jan Kiszka ha scritto:
> Context A Context B
> - -
> object = lookup()
> deregister(object)
> modify(object) -> invalid state
> ...
I have tried both 32-bit and 64-bit Windows 7, both have the same issue.
But I can also boot into the Window 7 setup. I have tried to use the
repair option but it cannot repair it. I then recreated the partion and
do a fresh installation and it then boots fine. So this issue only
affects the guest
I am now trying to reinstall a new instance without the BIOS update,
then update the BIOS after that to see if I can reproduce the issue.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1042084
Title:
Il 28/08/2012 09:12, Alexandre DERUMIER ha scritto:
> Hi list,
>
> i'm trying to boot on virtio-scsi with scsi-block
>
>
> but scsi-block don't seem to have the bootindex property
>
>
> -device
> scsi-block,bus=scsihw0.0,scsi-id=0,drive=drive-scsi0,id=scsi0,bootindex=100:
> Property '.bootin
On Mon, Aug 27, 2012 at 8:15 PM, Steven wrote:
>> Guest code is accessed at the translation time by C functions and
>> I guess there are other layers of address translation caching. I wouldn't
>> try to interpret these _cmmu printouts and would instead instrument
>> [cpu_]ld{{u,s}{b,w},l,q}_code m
On Tue, Aug 28, 2012 at 7:23 AM, Bo Yang wrote:
> According
> to liunux driver's implementation, the descriptor with EL bit set
> must not be touched by hardware, usually, the buffer size of this
> descriptor is set to 0.
Please describe the bug you are seeing and how to reproduce it. It's
not c
I cannot reproduce the issue with newly created image, so looks like
this is not a qemu bug, but just a problem of my corrupted image. Sorry
for the noise, please close the issue and I will report another one if I
find other things.
--
You received this bug notification because you are a member o
Andreas Färber wrote:
> Am 27.08.2012 14:21, schrieb Pavel Dovgaluk:
>> Save PC speaker state to remove differences between system
>> states after saving the snapshot and after loading it again.
>> This patch is needed for deterministic replay of the execution.
>>
>
> What about pc-1.0 etc. machi
On 27 August 2012 23:51, Aurelien Jarno wrote:
> The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was
> broken in that it did not respect the ABI requirement that 64
> bit values were passed in even-odd register pairs. The simplest
> way to fix this is to implement some new utility functio
Gerd Hoffmann wrote:
> On 08/27/12 18:21, Søren Sandmann wrote:
>> From: Søren Sandmann Pedersen
>>
>> It's not uncommon for an X workload to have more than 1024 pixmaps
>> live at the same time. Ideally, there wouldn't be any fixed limit like
>> this, but since we have one, increase it to 4096.
On 28 August 2012 00:41, Meador Inge wrote:
> When setting up the NVIC memory regions the memory range
> 0x100..0xcff is aliased to an IO memory region that belongs
> to the ARM GIC. This aliased region should be added to the
> NVIC memory container, but the actual GIC IO memory region
> was bein
On Tue, Aug 28, 2012 at 01:19:21PM +0100, Peter Maydell wrote:
> On 27 August 2012 23:51, Aurelien Jarno wrote:
> > The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was
> > broken in that it did not respect the ABI requirement that 64
> > bit values were passed in even-odd register pairs.
Hi,
> /* move from ARRAY to VARRAY with sive on num_surfaces */
> VMSTATE_VARRAY_INT32(guest_surfaces.cmds, PCIQXLDevice, num_surfaces,
> 0,
>vmstate_info_uint64, uint64_t),
Ah. Yes, VARRAY will do, somehow I didn't find it.
> And thinking about it, no
On 27 August 2012 21:37, Meador Inge wrote:
> The minimal amount of arm_boot_info has been setup to allow
> for machines based off of ARMv7-M processors to be loaded via the
> -kernel option.
>
> Signed-off-by: Meador Inge
> ---
> hw/armv7m.c | 13 +
> 1 files changed, 13 insertion
On 27 August 2012 21:37, Meador Inge wrote:
> The current implementation of the ARM semi-hosting SYS_HEAPINFO
> system call assumes that the base address of RAM for all ARM devices
> is 0x0. This isn't true for ARMv7-M devices, which uses a base of
> 0x2000 for SRAM.
This isn't a v7M specifi
On 27 August 2012 21:37, Meador Inge wrote:
> This patch adds support for a "dummy" ARMv7-M board so that
> QEMU can be used as an ISS for ARMv7-M processors. For example,
> running an image compiled for the Cortex-M3 with -cpu cortex-m3
> should just work.
So what programs would run on this 'du
Andreas Färber writes:
> Hi,
>
> Am 27.08.2012 08:28, schrieb Jan Kiszka:
>> From: Jan Kiszka
>>
>> This adds PCI device assignment for i386 targets using the classic KVM
>> interfaces. This version is 100% identical to what is being maintained
>> in qemu-kvm for several years and is supported
The following changes since commit 36c6711bbe79642b0102416a9dd4243505e874a6:
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE (2012-08-27
22:18:02 +0200)
are available in the git repository at:
git://github.com/bonzini/qemu.git scsi-next
for you to fetch changes up to df1d
Commit 0384783 (scsi-block: remove properties that are not relevant for
passthrough, 2012-07-09) removed one property that should have been
left there, "bootindex".
It also did not touch scsi-generic, while it should have.
Fix both problems.
Reported-by: Alexandre DERUMIER
Signed-off-by: Paolo
SeaBIOS will issue requests for more than 64k when loading a CD-ROM
image into memory. Support the TCHI register from the AMD PCscsi
spec.
Acked-by: Hervé Poussineau
Signed-off-by: Paolo Bonzini
---
hw/esp.c | 16 +++-
1 file modificato, 11 inserzioni(+), 5 rimozioni(-)
diff --git
From: Hannes Reinecke
Add a 'hba_serial' property to the megasas driver. Originally
it would be using a pointer value which would break migration.
Reported-by: Stefan Weil
Cc: Paolo Bonzini
Signed-off-by: Hannes Reinecke
Signed-off-by: Paolo Bonzini
---
hw/megasas.c | 9 +++--
1 file mo
> > This changes the driver behavior to choose the default machine
> > model based on the CPU being used. Defaulting the machine this
> > way makes it easier to use QEMU as an ISS by just specifying
> > the -cpu option since a default machine that is suitable for
> > emulating the full ISA can be
From: Ronnie Sahlberg
The number of blocks of the device is used to compute the device size
in bdrv_getlength()/iscsi_getlength().
For MMC devices, the ReturnedLogicalBlockAddress in the READCAPACITY10
has a special meaning when it is 0.
In this case it does not mean that LBA 0 is the last access
Zero writes have cluster granularity in QED. Therefore they can only be
used to zero entire clusters.
If the zero write request leaves sectors untouched, zeroing the entire
cluster would obscure the backing file. Instead return -ENOTSUP, which
is handled by block.c:bdrv_co_do_write_zeroes() and
On 28 August 2012 13:58, Paul Brook wrote:
> Peter Maydell wrote:
>> Just to pick an obvious example, you can't stick a core
>> which supports VFPv4 (the A15 is the only one we have) into
>> the integratorcp
>
> Yes you can.
No you can't. integratorcp.c doesn't create the parts of the CPU
which l
On Mon, 27 Aug 2012 09:36:05 +0200
Benoît Canet wrote:
> Adding Luiz to the thread since he is concerned by migration.
>
> Luiz do you have any hints on doing this properly ?
I don't. Juan is a better option though.
But, we use exec migration for this, no?
>
> Benoît
>
> > Le Thursday 23 Au
It turns out PV EOI gets disabled after migration -
until next guest reset.
This is because we are missing code to actually migrate it.
This patch fixes it up: it applies cleanly to qemu.git
as well as qemu-kvm.git, so I think it's cleaner
to apply it in qemu.git to keep diff to minimum.
Note: the
Update linux-headers to version present in Linux 3.6-rc3.
Header asm-x96_64/kvm_para.h update is needed for the new PV EOI
feature.
Signed-off-by: Michael S. Tsirkin
---
linux-headers/asm-s390/kvm.h | 2 +-
linux-headers/asm-s390/kvm_para.h | 2 +-
linux-headers/asm-x86/kvm.h | 1 +
l
In preparation for adding PV EOI support, disable PV EOI by default for
1.1 and older machine types, to avoid CPUID changing during migration.
PV EOI can still be enabled/disabled by specifying it explicitly.
Enable for 1.1
-M pc-1.1 -cpu kvm64,+kvm_pv_eoi
Disable for 1.2
-M pc-1.2
Support get/set of new PV EOI MSR, for migration.
Add an optional section for MSR value - send it
out in case MSR was changed from the default value (0).
Signed-off-by: Michael S. Tsirkin
---
target-i386/cpu.h | 1 +
target-i386/kvm.c | 13 +
target-i386/machine.c | 21 +
In preparation to adding PV EOI migration for 1.2,
trivially refactor some some compat code
to make it easier to add version specific
cpuid tweaks.
Signed-off-by: Michael S. Tsirkin
---
hw/pc_piix.c | 44
1 file changed, 36 insertions(+), 8 deletions(
Il 28/08/2012 15:04, Stefan Hajnoczi ha scritto:
> Zero writes have cluster granularity in QED. Therefore they can only be
> used to zero entire clusters.
>
> If the zero write request leaves sectors untouched, zeroing the entire
> cluster would obscure the backing file. Instead return -ENOTSUP,
On Tue, Aug 28, 2012 at 12:54:54AM +0200, Juan Quintela wrote:
>
> Hi
>
> Please send in any agenda items you are interested in covering.
- *-user and qdev (recent RFCs didn't get many comments in the list, and
I don't see a conclusion);
- 1.2 branching, or creation of a "cpu-next" tree where
> >> Just to pick an obvious example, you can't stick a core
> >> which supports VFPv4 (the A15 is the only one we have) into
> >> the integratorcp
> >
> > Yes you can.
>
> No you can't. integratorcp.c doesn't create the parts of the CPU
> which live in QEMU's 'a15mpcore_priv' device, so the resu
On Tue, Aug 28, 2012 at 2:25 PM, Paolo Bonzini wrote:
> Il 28/08/2012 15:04, Stefan Hajnoczi ha scritto:
>> Zero writes have cluster granularity in QED. Therefore they can only be
>> used to zero entire clusters.
>>
>> If the zero write request leaves sectors untouched, zeroing the entire
>> clus
Am 28.08.2012 15:25, schrieb Paolo Bonzini:
> Il 28/08/2012 15:04, Stefan Hajnoczi ha scritto:
>> Zero writes have cluster granularity in QED. Therefore they can only be
>> used to zero entire clusters.
>>
>> If the zero write request leaves sectors untouched, zeroing the entire
>> cluster would o
Eduardo Habkost wrote:
> On Tue, Aug 28, 2012 at 12:54:54AM +0200, Juan Quintela wrote:
>>
>> Hi
>>
>> Please send in any agenda items you are interested in covering.
>
> - *-user and qdev (recent RFCs didn't get many comments in the list, and
> I don't see a conclusion);
> - 1.2 branching, or
On Tue, Aug 28, 2012 at 03:43:17PM +0200, Juan Quintela wrote:
> Eduardo Habkost wrote:
> > On Tue, Aug 28, 2012 at 12:54:54AM +0200, Juan Quintela wrote:
> >>
> >> Hi
> >>
> >> Please send in any agenda items you are interested in covering.
> >
> > - *-user and qdev (recent RFCs didn't get many
On 28 August 2012 14:32, Paul Brook wrote:
>> No you can't. integratorcp.c doesn't create the parts of the CPU
>> which live in QEMU's 'a15mpcore_priv' device, so the resulting
>> mess is liable to just fall over. If anybody reports bugs in
>> QEMU in such a configuration I will tell them to go aw
On 28 August 2012 14:30, Eduardo Habkost wrote:
> - 1.2 branching, or creation of a "cpu-next" tree where "good to be
> merged" patches can live until 1.2 is done;
With 1.3 due for release in just over a week, it seems unlikely
that it's worth branching at this point...
-- PMM
It is possible to create an image that is larger than its backing file.
Reading beyond the end of the backing file produces zeroes if no writes
have been made to those sectors in the image file.
This patch finishes streaming early when the end of the backing file is
reached. Without this patch th
On Tue, Aug 28, 2012 at 2:58 PM, Stefan Hajnoczi
wrote:
> It is possible to create an image that is larger than its backing file.
> Reading beyond the end of the backing file produces zeroes if no writes
> have been made to those sectors in the image file.
>
> This patch finishes streaming early w
Il 28/08/2012 15:37, Stefan Hajnoczi ha scritto:
>> > The "right fix" would not be much more complex though, something like
>> > this, right?
>> > (untested).
> Yes but it's more complicated. To do a really good job we should
> slice off the first/last clusters if they are unaligned, handle them
On Tue, Aug 28, 2012 at 02:55:56PM +0100, Peter Maydell wrote:
> On 28 August 2012 14:30, Eduardo Habkost wrote:
> > - 1.2 branching, or creation of a "cpu-next" tree where "good to be
> > merged" patches can live until 1.2 is done;
>
> With 1.3 due for release in just over a week, it seems unl
Image streaming hangs if the backing image is smaller than the image file. The
problem is that the image streaming loop makes no progress when
bdrv_co_is_allocated() returns 0 with pnum=0. More details in the actual
patch.
I have also included a qemu-iotest to check this scenario. It hangs when
This new test case checks that streaming completes successfully when the
backing file is smaller than the image file.
Signed-off-by: Stefan Hajnoczi
---
tests/qemu-iotests/030 | 33 +
tests/qemu-iotests/030.out |4 ++--
2 files changed, 35 insertions(+),
It is possible to create an image that is larger than its backing file.
Reading beyond the end of the backing file produces zeroes if no writes
have been made to those sectors in the image file.
This patch finishes streaming early when the end of the backing file is
reached. Without this patch th
Hi
As almost everybody was at LinuxCon, we only started talking about the
cpu patches from Eduardo and decided to left things for the list/next
week.
- cpu patches until 1.2
* get a new tree somewhere
- 1.3 discussion will wait until 1.2 is out
people too busy right now
- Remember than KVM
Il 28/08/2012 16:26, Stefan Hajnoczi ha scritto:
> It is possible to create an image that is larger than its backing file.
> Reading beyond the end of the backing file produces zeroes if no writes
> have been made to those sectors in the image file.
>
> This patch finishes streaming early when the
Il 28/08/2012 16:26, Stefan Hajnoczi ha scritto:
> This new test case checks that streaming completes successfully when the
> backing file is smaller than the image file.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> tests/qemu-iotests/030 | 33 +
> tests/qemu-
On Tue, 28 Aug 2012, munkyu.im wrote:
> Winwave audio backend has problem with pausing and restart audio out.
> Unlike other backends, Winwave pausing API does not flush audio buffer.
> As a result, the previous audio data are playedin front of
> user expected sound when user restart audio.
> So c
On 08/24/2012 05:10 PM, Andreas Färber wrote:
Am 22.08.2012 14:27, schrieb Julien Grall:
This function permits to retrieve ISA IO address space.
It will be usefull when we need to pass IO address space as argument.
Signed-off-by: Julien Grall
---
hw/isa-bus.c |5 +
hw/isa.h |
On Tue, Aug 28, 2012 at 07:01:16PM +0300, Michael S. Tsirkin wrote:
> We copied HACKING from libvirt but it has some bogus stuff:
> neither underscore capital, double underscore, or underscore 't' suffixes
> are reserved in Posix/C: this appears to be based on misreading of the
> C standard. Using
On 08/28/2012 07:48 AM, Peter Maydell wrote:
> On 27 August 2012 21:37, Meador Inge wrote:
>> This patch adds support for a "dummy" ARMv7-M board so that
>> QEMU can be used as an ISS for ARMv7-M processors. For example,
>> running an image compiled for the Cortex-M3 with -cpu cortex-m3
>> shoul
We copied HACKING from libvirt but it has some bogus stuff:
neither underscore capital, double underscore, or underscore 't' suffixes
are reserved in Posix/C: this appears to be based on misreading of the
C standard. Using sane prefixes is enough to avoid conflicts.
These rules are also widely vio
On Mon, Aug 27, 2012 at 07:40:56PM +, Blue Swirl wrote:
> On Mon, Aug 27, 2012 at 7:24 PM, Michael S. Tsirkin wrote:
> > On Mon, Aug 27, 2012 at 07:12:27PM +, Blue Swirl wrote:
> >> On Mon, Aug 27, 2012 at 7:06 PM, Michael S. Tsirkin
> >> wrote:
> >> > On Mon, Aug 27, 2012 at 06:58:29PM
On 28 August 2012 17:01, Michael S. Tsirkin wrote:
> We copied HACKING from libvirt but it has some bogus stuff:
> neither underscore capital, double underscore, or underscore 't' suffixes
> are reserved in Posix/C: this appears to be based on misreading of the
> C standard. Using sane prefixes is
On Mon, Aug 27, 2012 at 03:20:13PM +0300, Michael S. Tsirkin wrote:
> In preparation to adding PV EOI migration for 1.2,
> trivially refactor some some compat code
> to make it easier to add version specific
> cpuid tweaks.
>
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/pc_piix.c | 44
On Tue, Aug 28, 2012 at 01:23:18PM -0300, Marcelo Tosatti wrote:
> On Mon, Aug 27, 2012 at 03:20:13PM +0300, Michael S. Tsirkin wrote:
> > In preparation to adding PV EOI migration for 1.2,
> > trivially refactor some some compat code
> > to make it easier to add version specific
> > cpuid tweaks.
Hi :)
On Tue, Aug 28, 2012 at 3:39 PM, Naresh Bhat wrote:
> Hi Mulyadi Santosa,
>
> Thank you very much for quick response. Can you share some documents
> ? I want to do it practically.
one of the google results you might find helpful is:
http://www.cyberciti.biz/tips/setting-processor-affinity
On Tue, 2012-08-28 at 09:23 +, Bhushan Bharat-R65777 wrote:
> Hi Alex,
>
> In my susyem I have following devices:
>
> I tried assigning a following PCI devices:
> 00:03.0 Communication controller: Intel Corporation 4 Series Chipset HECI
> Controller (rev 03)
> 00:03.2 IDE interface: Intel Co
On Mon, Aug 27, 2012 at 9:13 PM, Aurelien Jarno wrote:
> Hi,
>
> As you probably know, the PPC machines with a heathrow controller is
> broken following commit 9e56edcf ("vga: raise default vgamem size").
> The PCI hole space is not big enough for such a new default size.
>
> Alexander has fixed i
On Tue, Aug 28, 2012 at 6:52 AM, Yeongkyoon Lee
wrote:
>
>>> It's been a long time.
>>>
>>> I've tested the performances of one jump difference when fast qemu_ld/st
>>> (TLB hit).
>>> The result shows 3.6% CoreMark enhancement when reducing one jump where
>>> slow
>>> paths are generated at the en
On Tue, 28 Aug 2012, Michael S. Tsirkin wrote:
> On Mon, Aug 27, 2012 at 07:40:56PM +, Blue Swirl wrote:
> > On Mon, Aug 27, 2012 at 7:24 PM, Michael S. Tsirkin wrote:
> > > On Mon, Aug 27, 2012 at 07:12:27PM +, Blue Swirl wrote:
> > >> On Mon, Aug 27, 2012 at 7:06 PM, Michael S. Tsirkin
On Tue, Aug 28, 2012 at 7:35 AM, Michael Tokarev wrote:
> On 27.08.2012 22:56, Blue Swirl wrote:
> []
>>> +static uint32_t slow_bar_readb(void *opaque, target_phys_addr_t addr)
>>> +{
>>> +AssignedDevRegion *d = opaque;
>>> +uint8_t *in = d->u.r_virtbase + addr;
>>
>> Don't perform arithme
On Tue, Aug 28, 2012 at 1:22 PM, Michael S. Tsirkin wrote:
> In preparation for adding PV EOI support, disable PV EOI by default for
> 1.1 and older machine types, to avoid CPUID changing during migration.
>
> PV EOI can still be enabled/disabled by specifying it explicitly.
> Enable for 1.1
>
On 2012-08-28 17:42, Julien Grall wrote:
> On 08/24/2012 05:10 PM, Andreas Färber wrote:
>> Am 22.08.2012 14:27, schrieb Julien Grall:
>>
>>> This function permits to retrieve ISA IO address space.
>>> It will be usefull when we need to pass IO address space as argument.
>>>
>>> Signed-off-by:
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Tuesday, August 28, 2012 9:27 PM
> To: Bhushan Bharat-R65777
> Cc: k...@vger.kernel.org; Avi Kivity; qemu-devel@nongnu.org
> Subject: Re: Isuue assiging devices using VFIO on x86
>
> On Tue, 2012-08-
On Tue, Aug 28, 2012 at 4:01 PM, Michael S. Tsirkin wrote:
> We copied HACKING from libvirt but it has some bogus stuff:
> neither underscore capital, double underscore, or underscore 't' suffixes
> are reserved in Posix/C: this appears to be based on misreading of the
> C standard. Using sane pre
On Tue, Aug 28, 2012 at 7:33 AM, Natanael Copa wrote:
> On Tue, 21 Aug 2012 18:12:05 +
> Blue Swirl wrote:
>>
>> Now I get this on mingw32:
>> config-host.mak is out-of-date, running configure
>>
>> Error: librt check failed
>
> Any news on the v4 patch, which should fix this?
No change:
con
On Tue, Aug 28, 2012 at 05:24:40PM +0100, Peter Maydell wrote:
> On 28 August 2012 17:01, Michael S. Tsirkin wrote:
> > We copied HACKING from libvirt but it has some bogus stuff:
> > neither underscore capital, double underscore, or underscore 't' suffixes
> > are reserved in Posix/C: this appear
Am 27.08.2012 20:31, schrieb Peter Maydell:
> On 27 August 2012 08:23, Yeongkyoon Lee wrote:
>> BTW, who will finally confirm my patches?
>> I have sent four version of my patches in which I have applied all the
>> reasonable feedbacks from this community.
>
> If you'd like your patches committed
On Tue, Aug 28, 2012 at 05:13:24PM +, Blue Swirl wrote:
> On Tue, Aug 28, 2012 at 4:01 PM, Michael S. Tsirkin wrote:
> > We copied HACKING from libvirt but it has some bogus stuff:
> > neither underscore capital, double underscore, or underscore 't' suffixes
> > are reserved in Posix/C: this a
On Tue, Aug 28, 2012 at 05:05:25PM +, Blue Swirl wrote:
> > +static bool _kvm_pv_eoi_disabled;
>
> NACK. I find your lack of compliance disturbing.
Compliance with what? Could you please add some
motivation for the NACK?
--
MST
On 28 August 2012 18:18, Michael S. Tsirkin wrote:
> On Tue, Aug 28, 2012 at 05:24:40PM +0100, Peter Maydell wrote:
>> C99 7.1.3
>> reserves underscore capital and double underscore prefixes.
>
> This is taking it out of context - reserved means different
> things in different parts of the spec.
On Tue, Aug 28, 2012 at 5:21 PM, Michael S. Tsirkin wrote:
> On Tue, Aug 28, 2012 at 05:13:24PM +, Blue Swirl wrote:
>> On Tue, Aug 28, 2012 at 4:01 PM, Michael S. Tsirkin wrote:
>> > We copied HACKING from libvirt but it has some bogus stuff:
>> > neither underscore capital, double underscor
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