On Tue, Aug 28, 2012 at 01:19:21PM +0100, Peter Maydell wrote: > On 27 August 2012 23:51, Aurelien Jarno <aurel...@aurel32.net> wrote: > > The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was > > broken in that it did not respect the ABI requirement that 64 > > bit values were passed in even-odd register pairs. The simplest > > way to fix this is to implement some new utility functions > > for marshalling function arguments into the correct registers > > and stack, so that the code which sets up the address and > > data arguments does not need to care whether there has been > > a preceding env argument. > > > > Based on commit 9716ef3b for ARM by Peter Maydell. > > > > Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> > > Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Thanks for the review. > Not tested, since I don't have any MIPS boxes. But it looks right, > and I went through and checked that the register constraints > were right, which I think is the most likely spot for subtle > bugs. Agreed, actually I got such issues when initially testing the patch (with a 64-bit guest on a 32-bit host it's quite easy to reach the maximum number of registers, even if mips has 32 of them). I should have added that I have tested this patch on mips an mipsel hosts, with i386, x86_64, ppc, mips, mipsel, mips64 and mips64el guests. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
