On Tue, Dec 21, 2021 at 02:29:13PM +0100, Philippe Mathieu-Daudé wrote:
> On 12/21/21 13:52, Juan Quintela wrote:
> > The goto is not needed at all.
> >
> > Signed-off-by: Juan Quintela
> > ---
> > migration/ram.c | 11 +++
> > 1 file changed, 3 insertions(+), 8 deletions(-)
> >
> > dif
On Tue, Dec 21, 2021 at 01:52:32PM +0100, Juan Quintela wrote:
> -static void ram_release_pages(const char *rbname, uint64_t offset, int pages)
> +static void ram_release_page(const char *rbname, uint64_t offset)
> {
> if (!migrate_release_ram() || !migration_in_postcopy()) {
> retur
On Tue, Dec 21, 2021 at 01:52:35PM +0100, Juan Quintela wrote:
> We always need to call it when we find a zero page, so put it in a
> single place.
>
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
When using JSON syntax for -device, -set option can not find device
specified in JSON by id field. The following commandline is an example:
$ qemu-system-x86_64 -device '{"id":"foo"}' -set device.foo.bar=1
qemu-system-x86_64: -set device.foo.bar=1: there is no device "foo" defined
The patch fixes
On Tue, Dec 21, 2021 at 01:52:31PM +0100, Juan Quintela wrote:
> We only need last_stage in two places and we are passing it all
> around. Just add a field to RAMState that passes it.
>
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
On Tue, Dec 21, 2021 at 01:52:30PM +0100, Juan Quintela wrote:
> So printing it as %d is wrong. Notice that for the channel id, that
> is an uint8_t, but I changed it anyways for consistency.
Just curious: uint_8 can always correctly converted to a int, so the patch
shouldn't have a functional ch
The enablement of postcopy listening has a few steps, add a few tracepoints to
be there ready for some basic measurements for them.
Signed-off-by: Peter Xu
---
migration/savevm.c | 9 -
migration/trace-events | 2 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/migr
I planned to add "#ifdef DEBUG_POSTCOPY" around the function too because
otherwise it'll be compiled into qemu binary even if it'll never be used. Then
I found that maybe it's easier to just drop it for good..
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c | 39
It will just never fail. Drop those return values where they're constantly
zeros.
A tiny touch-up on the tracepoint so trace_ram_postcopy_send_discard_bitmap()
is called after the logic itself (which sounds more reasonable).
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migr
Remove the old two tracepoints and they're even near each other:
trace_loadvm_postcopy_handle_run_cpu_sync()
trace_loadvm_postcopy_handle_run_vmstart()
Add trace_loadvm_postcopy_handle_run_bh() with a finer granule trace.
Signed-off-by: Peter Xu
---
migration/savevm.c | 12
It'll be easier to read the name rather than index of sub-cmd when debugging.
Signed-off-by: Peter Xu
---
migration/savevm.c | 3 ++-
migration/trace-events | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/migration/savevm.c b/migration/savevm.c
index 0bef031acb..7f7af6
This function calls three functions:
- postcopy_discard_send_init(ms, block->idstr);
- postcopy_chunk_hostpages_pass(ms, block);
- postcopy_discard_send_finish(ms);
However only the 2nd function call is meaningful. It's major role is to make
sure dirty bits are applied in host-page-size gr
Right now we loop ramblocks for twice, the 1st time chunk the dirty bits with
huge page information; the 2nd time we send the discard ranges. That's not
necessary - we can do them in a single loop.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c | 20 ++-
v3:
- s/disgard/discard/, s/exit/return/ [DavidE]
v2:
- add r-bs for Dave
- move mig_cmd_args reference later than index bound check [Dave]
- use chars in tracepoints instead of number of steps [Dave]
- add one patch for postcopy-run tracing
Some queued patches for ram disgard cleanup, and some d
It always return zero, because it just can't go wrong so far. Simplify the
code with no functional change.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/migration/ram.c b/migration
On Tue, Dec 14, 2021 at 07:07:31PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> v10:
> - rebase on master
> - make the following modifications on patch [1/3]:
> 1. Make "dirtylimit-calc" thread joinable and join it after quitting.
>
> 2. Add finalize function to free di
On Thu, Dec 16, 2021 at 11:23:37AM +0100, Markus Armbruster wrote:
> Hyman Huang writes:
>
> [...]
>
> > So the final format of qmp we conclude are:
> >
> > case 1: setup vcpu 0 dirty page limit 100MB/s
> > set-vcpu-dirty-limit cpu-index=0 dirty-rate=100
> >
> > case 2: setup all vcpu dirty page
On Tue, Dec 14, 2021 at 07:07:34PM +0800, huang...@chinatelecom.cn wrote:
> +void qmp_vcpu_dirty_limit(bool enable,
> + bool has_cpu_index,
> + uint64_t cpu_index,
> + bool has_dirty_rate,
> + uint64
On Tue, Dec 14, 2021 at 07:07:33PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> Setup a negative feedback system when vCPU thread
> handling KVM_EXIT_DIRTY_RING_FULL exit by introducing
> throttle_us_per_full field in struct CPUState. Sleep
> throttle_us_per_full microsecond
On Fri, Dec 24, 2021 at 12:09:47AM +0100, Paolo Bonzini wrote:
> On 12/23/21 19:34, Sean Christopherson wrote:
> > > select HAVE_KVM_PM_NOTIFIER if PM
> > > + select MEMFD_OPS
> > MEMFD_OPS is a weird Kconfig name given that it's not just memfd() that can
> > implement the ops.
> >
>
>
On Thu, Dec 23, 2021 at 06:34:22PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> >
> > -kvm-y := $(KVM)/kvm_main.o $(KVM)/eventfd.o $(KVM)/binary_stats.o
> > +kvm-y := $(KVM)/kvm_main.o $(KVM)/eventfd.o $(KVM)/binary_stats.o
> > $(KVM)/memfd.o
>
> This should be
>
On Thu, Dec 23, 2021 at 06:06:19PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > This new function establishes the mapping in KVM page tables for a
> > given gfn range. It can be used in the memory fallocate callback for
> > memfd based memory to establish the mappi
On Thu, Dec 23, 2021 at 06:34:22PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
> > index 03b2ce34e7f4..86655cd660ca 100644
> > --- a/arch/x86/kvm/Kconfig
> > +++ b/arch/x86/kvm/Kconfig
> > @@ -46,6 +46,7 @@
We didn't read the fp flags early enough, so we got whatever
came out of the guest printf. With careful review of the
hexagon output, we would have seen this long ago.
r~
Richard Henderson (2):
tests/tcg/multiarch: Read fp flags before printf
test/tcg/ppc64le: Add float reference files
t
We need to read the floating-point flags before printf may do
other floating-point operations which may affect the flags.
Hexagon reference files regenerated by Taylor Simpson.
Signed-off-by: Taylor Simpson
Signed-off-by: Richard Henderson
Message-Id: <1639510781-3790-1-git-send-email-tsimp...@
On Thu, Dec 23, 2021 at 06:02:33PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > Similar to hva_tree for hva range, maintain interval tree ofs_tree for
> > offset range of a fd-based memslot so the lookup by offset range can be
> > faster when memslot count is high.
https://gitlab.com/rth7680/qemu.git tags/pull-pa-20211223
for you to fetch changes up to 05bfd4db08608bc4c22de729780c1f74612fbc0e:
target/hppa: Fix deposit assert from trans_shrpw_imm (2021-12-23 17:47:01
-0800)
Fix target
Generated on Power9, PowerNV 9006-22P.
Signed-off-by: Richard Henderson
---
tests/tcg/ppc64le/float_convs.ref | 748 +
tests/tcg/ppc64le/float_madds.ref | 768 ++
2 files changed, 1516 insertions(+)
create mode 100644 tests/tcg/ppc64le/flo
-- update extension check REQUIRE_ZDINX_OR_D
-- update double float point register read/write
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/insn_trans/trans_rvd.c.inc | 252
1 file changed, 174 insertions(+), 78 deletio
- update extension check REQUIRE_ZFINX_OR_F
- update single float point register read/write
- disable nanbox_s check
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/fpu_helper.c | 60 ++---
target/riscv/helper.h
This patchset implements RISC-V Float-Point in Integer Registers
extensions(Version 1.0.0-rc), which includes Zfinx, Zdinx, Zhinx and Zhinxmin
extension.
Specification:
https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf
The port is available here:
https://github.com/plctlab/plct
On Thu, 2021-12-23 at 20:29 +0800, Chao Peng wrote:
> From: "Kirill A. Shutemov"
>
> The patch introduces new MEMFD_OPS facility around file created by
> memfd_create() to allow a third kernel component to make use of
> memory
> bookmarked in a memfd and gets notifier when the memory in the file
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/translate.c | 169 +++
1 file changed, 169 insertions(+)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 8b1cdacf50..bac42e60bd 100644
--- a/ta
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a5fa14f2ac..dbd15693be 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -657,6 +657,
- update extension check REQUIRE_ZHINX_OR_ZFH and
REQUIRE_ZFH_OR_ZFHMIN_OR_ZHINX_OR_ZHINXMIN
- update half float point register read/write
- disable nanbox_h check
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/fpu_helper.c | 60 ++--
target/riscv/h
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
roms/SLOF| 2 +-
target/riscv/cpu.c | 12
target/riscv/cpu.h | 4
target/riscv/translate.c | 8
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git a
This patch is to improve the logic of QEMU main thread sleep code in
qemu_chr_write_buffer() where it can be blocked and can't run other
coroutines during COLO IO stress test.
Our approach is to put filter_send() in a coroutine. In this way,
filter_send() will call qemu_coroutine_yield() in qemu_c
Because sa may be 0,
tcg_gen_deposit_reg(dest, t0, cpu_gr[a->r1], 32 - sa, sa);
may attempt a zero-width deposit at bit 32, which will assert
for TARGET_REGISTER_BITS == 32.
Use the newer extract2 when possible, which itself includes the
rotri special case; otherwise mirror the code from tra
The following changes since commit f18155a207dbc6a23f06a4af667280743819c31e:
Merge tag 'for-upstream-mtest' of https://gitlab.com/bonzini/qemu into
staging (2021-12-23 11:35:48 -0800)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-pa-2021122
On Mon, Dec 20, 2021 at 03:18:52PM -0300, Fabiano Rosas wrote:
> There are currently only two interrupts that use alternate SRRs, so
> let them write to them directly during the setup code.
>
> No functional change intented.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
> ---
>
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
Now that 'vector' is known before calling the interrupt-specific setup
code, we can move all of the scv setup into one place.
No functional change intended.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 13 +
1 file changed
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
We can just access it directly in powerpc_excp.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 43
1 file changed, 21 insertions(+), 22 deletions(-)
Reviewed-by: Richard Henderson
r~
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
None of the interrupt setup code touches 'vector', so we can move it
earlier in the function. This will allow us to later move the System
Call Vectored setup that is on the top level into the
POWERPC_EXCP_SYSCALL_VECTORED code block.
This patch also mov
On 12/23/21 3:51 AM, Paolo Bonzini wrote:
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used by both
bsd-user/ and linux-user/.
Reviewed-by:
On 12/23/21 2:17 AM, Paolo Bonzini wrote:
The following changes since commit 2bf40d0841b942e7ba12953d515e62a436f0af84:
Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into
staging (2021-12-20 13:20:07 -0800)
are available in the Git repository at:
https://gitlab.com/bo
On 12/23/21 19:34, Sean Christopherson wrote:
select HAVE_KVM_PM_NOTIFIER if PM
+ select MEMFD_OPS
MEMFD_OPS is a weird Kconfig name given that it's not just memfd() that can
implement the ops.
Or, it's kvm that implements them to talk to memfd?
Paolo
On Thu, Dec 23, 2021 at 1:03 PM Laurent Vivier wrote:
>
> Le 23/12/2021 à 07:47, Tonis Tiigi a écrit :
>
> Please copy here what you explain in PATCH 0 regarding this patch.
> (do the same for PATCH 1)
>
> > Signed-off-by: Tonis Tiigi
> > ---
> > linux-user/syscall.c | 94 +
On 12/23/21 18:19, Richard Henderson wrote:
On 12/23/21 12:36 PM, Daniel Henrique Barboza wrote:
This reorg is breaking PMU-EBB tests, unfortunately. These tests are run from
the kernel
tree [1] and I test them inside a pSeries TCG guest. You'll need to apply
patches 9 and
10 of [2] beforeh
Hi everyone,
I am pleased to announce that the QEMU v6.1.1 stable release is now
available.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
v6.1.1 is now tagged in the official qemu.git repository, and the
stable-6.1 branch has been updated accordin
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 9ef9a1a5ddd5..8f6a58e82483 100644
--- a/target/ppc/cpu_init.c
+++ b/targ
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
The PID SPR of the 405 CPU contains the translation ID of the TLB
which is a 8-bit field. Enforce the mask with a store helper.
Cc: Christophe Leroy
Signed-off-by: Cédric Le Goater
---
target/ppc/spr_tcg.h | 1 +
target/ppc/cpu_init.c | 2 +-
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
Timers are already initialized in ppc4xx_init(). No need to do it a
second time with a wrong set.
Fixes: d715ea961254 ("PPC: 405: Fix ppc405ep initialization")
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_uc.c | 2 --
1 file changed, 2 deleti
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
This is a small cleanup to ease reading.
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc.c | 42 +++---
1 file changed, 19 insertions(+), 23 deletions(-)
You should mention dropping the comparison vs null as im
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
The 405 timers were broken when booke support was added. Assumption
was made that the register numbers were the same but it's not :
SPR_BOOKE_TSR (0x150)
SPR_BOOKE_TCR (0x154)
SPR_40x_TSR (0x3D8)
SPR_40x_
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
There is no need to deactivate MMU logging at compile time.
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu_common.c | 4 ++--
target/ppc/mmu_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
There's also no need to use #defi
On 12/23/21 1:22 PM, Laurent Vivier wrote:
+#define UNALIGN(C) (ctx->tbflags & TB_FLAG_UNALIGN ? MO_UNALN : 0)
Why isn't it like the other targets: "ctx->tb_flags & TB_FLAG_UNALIGN ? MO_UNALN :
MO_ALIGN)"?
It should be; not using 0 was a late revision and I missed this one.
r~
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
+static inline const char *powerpc_excp_name(int excp)
Drop the inline. It's not performance critical; let the compiler decide.
Otherwise,
Reviewed-by: Richard Henderson
r~
Signed-off-by: Hongren (Zenithal) Zheng
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5456536805..522b0e5687 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2295,6 +2295,14 @@ F: hw/timer/mips_gictimer.c
F: include/hw/intc/mips_gic.h
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/qdev-device-use.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/qdev-device-use.txt b/docs/qdev-device-use.txt
index 2408889334..278fb66c0a 100644
--- a/docs/qdev-device-use.txt
+++ b/docs/qdev-device-use.txt
@@ -342,6 +342,7 @@ The ne
- One sentense
With this patch series, QEMU would fully emulate an open-source secure key,
CanoKey, with supports of various features listed below:
* U2F / FIDO2 with Ed25519 and HMAC-secret
* OpenPGP Card V3.4 with RSA4096, Ed25519 and more
* PIV (NIST SP 800-73-4)
* HOTP / TOTP
- What's Ne
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/canokey.txt | 133 +++
1 file changed, 133 insertions(+)
create mode 100644 docs/canokey.txt
diff --git a/docs/canokey.txt b/docs/canokey.txt
new file mode 100644
index 00..69262194c4
--- /dev/n
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/system/devices/usb.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/system/devices/usb.rst b/docs/system/devices/usb.rst
index afb7d6c226..341694403a 100644
--- a/docs/system/devices/usb.rst
+++ b/docs/system/devices/usb.rst
@@ -199,
Signed-off-by: Hongren (Zenithal) Zheng
---
hw/usb/Kconfig| 5 +
hw/usb/meson.build| 3 +++
meson.build | 6 ++
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 3 +++
5 files changed, 19 insertions(+)
diff --git a/hw/usb
This commit added a new emulated device called CanoKey to QEMU.
CanoKey implements platform independent features in canokey-core
https://github.com/canokeys/canokey-core, and leaves the USB implementation
to the platform.
In this commit the USB part was implemented in QEMU using QEMU's USB APIs,
Le 20/12/2021 à 22:41, Richard Henderson a écrit :
Leave TARGET_ALIGNED_ONLY set, but use the new CPUState
flag to set MO_UNALN for the instructions that the kernel
handles in the unaligned trap.
The Linux kernel does not handle all memory operations: no
floating-point and no MAC.
Signed-off-by
On 12/23/21 12:36 PM, Daniel Henrique Barboza wrote:
This reorg is breaking PMU-EBB tests, unfortunately. These tests are run from
the kernel
tree [1] and I test them inside a pSeries TCG guest. You'll need to apply
patches 9 and
10 of [2] beforehand (they apply cleanly in current master) becau
On 12/23/21 12:18 PM, Daniel Henrique Barboza wrote:
The code that increments a PMC is repetitive: check if a given register
has a bit/mask set or cleared and increment the counter.
inc_spr_if_cond() will help deal with this repetition. This patch also
gives a sample of how the function works by
Le 23/12/2021 à 07:47, Tonis Tiigi a écrit :
Please copy here what you explain in PATCH 0 regarding this patch.
(do the same for PATCH 1)
Signed-off-by: Tonis Tiigi
---
linux-user/syscall.c | 94 +++
linux-user/syscall_defs.h | 14 ++
2 files ch
On Thu, Dec 23, 2021 at 2:43 PM Michael S. Tsirkin wrote:
>
> On Thu, Dec 23, 2021 at 10:58:14AM +0100, Mauro Matteo Cascella wrote:
> > Hi,
> >
> > On Wed, Dec 22, 2021 at 9:52 PM Michael S. Tsirkin wrote:
> > >
> > > On Wed, Dec 22, 2021 at 09:27:51PM +0100, Philippe Mathieu-Daudé wrote:
> > >
Le 23/12/2021 à 07:47, Tonis Tiigi a écrit :
There seems to be difference in syscall and libc definition of these
methods and therefore musl does not implement them (1e21e78bf7). Call
syscall directly to ensure the behavior of the libc of user application,
not the libc that was used to build QEMU
On 12/23/21 00:01, Richard Henderson wrote:
In contrast to Daniel's version, the code stays in power8-pmu.c,
but is better organized to not take so much overhead.
Before:
32.97% qemu-system-ppc qemu-system-ppc64 [.] pmc_get_event
20.22% qemu-system-ppc qemu-system-ppc64 [.]
After moving all the instruction counting to TCG Ops code
this helper is not needed anymore.
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 1 -
target/ppc/power8-pmu-insn-cnt.c.inc | 4 --
target/ppc/power8-pmu.c | 60 ---
Hi,
In this version the tedious repetition was taken away from the
code by using a helper that increments the PMCs based on specified
conditions.
As far as Avocado test goes, the performance is the same as the previous
version. All PMU-EBB kernel selftests are also passing. Basically we have
the
pmu_check_overflow() will verify for overflow in the PMC1-5 counters,
firing a performance monitor alert if an overflow happened with the
proper MMCR0 bits set.
The alert is fired by using helper_pmu_overflow().
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h |
The code that increments a PMC is repetitive: check if a given register
has a bit/mask set or cleared and increment the counter.
inc_spr_if_cond() will help deal with this repetition. This patch also
gives a sample of how the function works by incrementing PMC5, which is
supposed to be incremented
Use inc_spr_if_cond() to count instructions of all other PMCs that are
capable of counting instructions (all PMCs but PMC6).
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/power8-pmu-insn-cnt.c.inc | 62
1 file changed, 62 insertions(+)
diff --git a/target/pp
We're going to add a significant amount of TCG ops code for
instruction counting, eventually getting rid of the 'helper_insn_inc'
helper entirely.
Create a new file to avoid putting even more stuff on the already
crowded target/ppc/translate.c.
Signed-off-by: Daniel Henrique Barboza
---
target/
On 12/23/21 12:53 AM, Vladimir Sementsov-Ogievskiy wrote:
The following changes since commit 2bf40d0841b942e7ba12953d515e62a436f0af84:
Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into
staging (2021-12-20 13:20:07 -0800)
are available in the Git repository at:
https
On 12/23/21 1:51 AM, Jasper Ruehl wrote:
Dear QEMU Community,
after chatting a bit in the IRC channel, "stefanha" advised me to contact you via EMail
about my problem.
My advisor and me from the DSE chair at the TU Munich had the idea to improve the
emulation of the x86 cmpxchg instruction on
This improves performance of running iotests during "make -jN check".
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/check-block.sh | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/tests/check-block.sh b/tests/check-block.sh
index f86cb863de..d98d49ad63 100755
-
On Thu, Dec 23, 2021, Chao Peng wrote:
> diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
> index 03b2ce34e7f4..86655cd660ca 100644
> --- a/arch/x86/kvm/Kconfig
> +++ b/arch/x86/kvm/Kconfig
> @@ -46,6 +46,7 @@ config KVM
> select SRCU
> select INTERVAL_TREE
> select HAVE_K
On Thu, Dec 23, 2021, Chao Peng wrote:
> This new exit allows user space to handle memory-related errors.
> Currently it supports two types (KVM_EXIT_MEM_MAP_SHARED/PRIVATE) of
> errors which are used for shared memory <-> private memory conversion
> in memory encryption usage.
>
> After private m
> -Original Message-
> From: Anton Johansson
> Sent: Friday, December 17, 2021 2:01 AM
> To: qemu-devel@nongnu.org
> Cc: a...@rev.ng; Taylor Simpson ; Brian Cain
> ; bab...@rev.ng; ni...@rev.ng;
> richard.hender...@linaro.org
> Subject: [PATCH v7 12/13] target/hexagon: import additional t
On Thu, Dec 23, 2021, Chao Peng wrote:
> This new function establishes the mapping in KVM page tables for a
> given gfn range. It can be used in the memory fallocate callback for
> memfd based memory to establish the mapping for KVM secondary MMU when
> the pages are allocated in the memory backend
On Thu, Dec 23, 2021, Chao Peng wrote:
> Similar to hva_tree for hva range, maintain interval tree ofs_tree for
> offset range of a fd-based memslot so the lookup by offset range can be
> faster when memslot count is high.
This won't work. The hva_tree relies on there being exactly one virtual ad
23.12.2021 20:50, Vladimir Sementsov-Ogievskiy wrote:
Hmm, relying on flush requests sequence doesn't seem reliable..
Maybe, it's better to insert blockdev-add filter after JOB_READY? blockdev-reopen should
work now for "file" link changing.
s/blockdev-add/blkdebug/ :)
--
Best regards,
Vladi
23.12.2021 19:53, Hanna Reitz wrote:
This test assumes that mirror flushes the source when entering the READY
state, and that the format level will pass that flush on to the protocol
level (where we intercept it with blkdebug).
However, apparently that does not happen when using a VMDK image wit
Le 23/12/2021 à 07:47, Tonis Tiigi a écrit :
There seems to be difference in syscall and libc definition of these
methods and therefore musl does not implement them (1e21e78bf7). Call
syscall directly to ensure the behavior of the libc of user application,
not the libc that was used to build QEMU
On Thu, Dec 23, 2021, Chao Peng wrote:
> Extend the memslot definition to provide fd-based private memory support
> by adding two new fields(fd/ofs). The memslot then can maintain memory
> for both shared and private pages in a single memslot. Shared pages are
> provided in the existing way by usin
On 20.12.21 16:47, Emanuele Giuseppe Esposito wrote:
On 17/12/2021 13:29, Hanna Reitz wrote:
On 24.11.21 07:44, Emanuele Giuseppe Esposito wrote:
block_crypto_amend_options_generic_luks uses the block layer
permission API, therefore it should be called with the BQL held.
However, the same fu
On 20.12.21 13:20, Emanuele Giuseppe Esposito wrote:
On 17/12/2021 17:38, Emanuele Giuseppe Esposito wrote:
On 17/12/2021 12:04, Hanna Reitz wrote:
On 24.11.21 07:44, Emanuele Giuseppe Esposito wrote:
bdrv_co_invalidate_cache is special: it is an I/O function,
I still don’t believe it is
This test assumes that mirror flushes the source when entering the READY
state, and that the format level will pass that flush on to the protocol
level (where we intercept it with blkdebug).
However, apparently that does not happen when using a VMDK image with
zeroed_grain=on, which actually is th
12.01.2021 07:53, Jason Wang wrote:
On 2020/12/22 上午3:06, Vladimir Sementsov-Ogievskiy wrote:
net_tap_fd_init() allocates new NetClientState through
qemu_new_net_client(). We should free it on failure path.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Attention: it's an intuitive patch.
On 12/22/21 8:50 AM, Oleg Vasilev wrote:
From: Oleg Vasilev
Using a physical pc requires to translate address every time next block
needs to be found and executed. This also contaminates TLB with code-related
records.
Instead, I suggest we introduce an architecture-specific address space
ident
On 12/21/21 11:10 PM, Cédric Le Goater wrote:
+static bool __ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
Don't do the double-underscore thing.
It's technically a reserved namespace.
Use e.g. ppc_radix_xlate_impl.
Otherwise
Reviewed-by: Richard Henderson
r~
We are going to add filtering in _qcow2_dump_header and want all tests
use it.
The patch is generated by commands:
cd tests/qemu-iotests
sed -ie 's/$PYTHON qcow2.py "$TEST_IMG" dump-header\($\|
\)/_qcow2_dump_header\1/' ??? tests/*
(the difficulty is to avoid converting dump-header-exts)
Si
_qcow2_dump_header has filter for compression type, so this change
makes test pass with IMGOPTS='compression_type=zstd'.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
tests/qemu-iotests/039 | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qemu-i
We want iotests pass with both the default zlib compression and with
IMGOPTS='compression_type=zstd'.
Actually the only test that is interested in real compression type in
test output is 287 (test for qcow2 compression type), so implement
specific option for it.
Signed-off-by: Vladimir Sementsov-
We'll use it in tests instead of explicit qcow2.py. Then we are going
to add some filtering in _qcow2_dump_header.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
tests/qemu-iotests/common.rc | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tests/qemu-iotes
Don't touch other incompatible bits, like compression-type. This makes
the test pass with IMGOPTS='compression_type=zstd'.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
tests/qemu-iotests/060 | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qemu
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