On 12/22/21 8:50 AM, Oleg Vasilev wrote:
From: Oleg Vasilev <vasilev.o...@huawei.com>
Using a physical pc requires to translate address every time next block
needs to be found and executed. This also contaminates TLB with code-related
records.
Instead, I suggest we introduce an architecture-specific address space
identifier, and use it to distinguish between different AS's
translation blocks.
Why do you believe that asid is sufficient here? You're not invalidating any more TBs
that I can see. What happens when the kernel re-uses an asid?
I believe this patch to be fundamentally flawed.
All that said,
+/* Returns the identifier for a current address space. */
+static uint64_t arm_get_asid(CPUState *cs)
+{
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+ ARMMMUIdx mmu_idx = arm_mmu_idx(env);
+ uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
+
+#define TCR_A1 (1U << 22)
+ return regime_ttbr(env, mmu_idx, (tcr&TCR_A1)>0);
+}
Why are you returning the entire ttbr, and not the asid in the top 16 bits?
r~
