[Qemu-devel] [PATCH v2 08/11] net: smc91c111: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Signed-off-by: Cédric Le Goater --- hw/net/smc91c111.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index d2fd2040e81c..99da2d92973e 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -766,9 +766,9 @@ static NetClient

[Qemu-devel] [PATCH v2 07/11] net: opencores_eth: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Max Filippov Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/opencores_eth.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index d42b79c08c6a..d6f54f8d820

[Qemu-devel] [PATCH v2 03/11] net: lan9118: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Signed-off-by: Cédric Le Goater --- hw/net/lan9118.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index b9032dac595f..a6269d9463b1 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -1320,9 +1320,9 @@ static NetClientInfo ne

[Qemu-devel] [PATCH v2 09/11] net: stellaris_enet: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Peter Maydell Cc: qemu-...@nongnu.org Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/stellaris_enet.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c ind

[Qemu-devel] [PATCH v2 06/11] net: mipsnet: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Aleksandar Markovic Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/mipsnet.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 5a63df7ccb91..03b310427860 100644 -

[Qemu-devel] [PATCH v2 11/11] net: xgmac: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Peter Maydell Cc: qemu-...@nongnu.org Cc: Rob Herring Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/xgmac.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index fa0015

[Qemu-devel] [PATCH v2 01/11] net: etraxfs_eth: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Edgar E. Iglesias Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell --- hw/net/etraxfs_eth.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index a6932432b164..64ab3df1ae38 100644 --- a/hw/net/etraxfs_et

[Qemu-devel] [PATCH v2 05/11] net: milkymist_minimac2: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Cc: Michael Walle Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/milkymist-minimac2.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index 3eaa19df

[Qemu-devel] [PATCH v2 10/11] net: stellaris_enet: add a reset method

2018-09-30 Thread Cédric Le Goater
Cc: Peter Maydell Cc: qemu-...@nongnu.org Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/stellaris_enet.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c inde

[Qemu-devel] [PATCH v2 04/11] net: lance: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/lance.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/net/lance.c b/hw/net/lance.c index a08d5ac6a848..f987b2fd180f 100644 --- a/hw/net/lance.c +++ b/hw/net

[Qemu-devel] [PATCH v2 00/11] net: convert SysBus init method to a realize method

2018-09-30 Thread Cédric Le Goater
Hello, Here is my take to the SysBus init to realize method conversion. I picked the /net directory and did them all. Also added a couple of reset methods in separate patches. make check tested Thanks, C. Changes since v1: - dropped changes in lan9118_init() and smc91c111_init() - fix align

[Qemu-devel] [PATCH v2 02/11] net: etraxfs_eth: add a reset method

2018-09-30 Thread Cédric Le Goater
Cc: Edgar E. Iglesias Signed-off-by: Cédric Le Goater --- hw/net/etraxfs_eth.c | 31 +-- 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 64ab3df1ae38..36855804dba0 100644 --- a/hw/net/etraxfs_eth.c +++ b

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Philippe Mathieu-Daudé
On 10/1/18 12:20 AM, Maciej W. Rozycki wrote: > On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > >>> TX79 do not implement DMULT or DMULTU, the Tx49 does and they do support >>> the extra `rd' operand there[1]. Still no DMADD or DMADDU though. >> >> As does the TX39. > > Umm, the TX39 is 3

[Qemu-devel] [PATCH v2 0/3] tests/vm: Improvements when KVM is not available

2018-09-30 Thread Philippe Mathieu-Daudé
Hi Fam, Since v1: http://lists.nongnu.org/archive/html/qemu-devel/2018-07/msg03411.html - rebased on master - added get_default_jobs (Fam) - dropped 'When using TCG, wait longer for a VM to start' Few patches I added while testing the VM tests without KVM access. I doubt many people want to suffe

[Qemu-devel] [PATCH v2 2/3] tests/vm: Do not abuse parallelism when KVM is not available

2018-09-30 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- v2: Add get_default_jobs (Fam suggestion) --- tests/vm/basevm.py | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index 5a5fa09752..fc203e9f53 100755 --- a/tests/vm/basevm.py +++ b/

Re: [Qemu-devel] [PATCH v2 0/3] tests/vm: Improvements when KVM is not available

2018-09-30 Thread Philippe Mathieu-Daudé
> Also this could be a useful TCG stress test...? For example, I get this serial output when running 'make vm-build-ubuntu.i386' with TCG: [0.00] Initializing cgroup subsys cpuset [0.00] Initializing cgroup subsys cpu [0.00] Initializing cgroup subsys cpuacct [0.000

[Qemu-devel] [PATCH v2 1/3] tests/vm: Extract the kvm_available() handy function

2018-09-30 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- tests/vm/basevm.py | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index 7e58d9e0ca..5a5fa09752 100755 --- a/tests/vm/basevm.py +++ b/tests/vm/basevm.py @@ -33,6 +33,11 @@ SSH_KEY = open(os

[Qemu-devel] [PATCH v2 3/3] tests/vm: Display remaining seconds to wait for a VM to start

2018-09-30 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- tests/vm/basevm.py | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index fc203e9f53..98d254baec 100755 --- a/tests/vm/basevm.py +++ b/tests/vm/basevm.py @@ -183,12 +183,15 @@ class BaseVM(obj

[Qemu-devel] [Bug 1791796] Re: [RFC PATCH 2/4] docker: add buildroot-nios2-cross image

2018-09-30 Thread Philippe Mathieu-Daudé
Hi Alex, On 9/11/18 4:06 PM, Alex Bennée wrote: > Build a buildroot toolchain for the nios2 target. > > Signed-off-by: Alex Bennée > --- > tests/docker/Makefile.include | 4 > tests/docker/dockerfiles/buildroot-nios2-cross.docker | 10 ++ > 2 files changed,

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Maciej W. Rozycki
On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > > TX79 do not implement DMULT or DMULTU, the Tx49 does and they do support > > the extra `rd' operand there[1]. Still no DMADD or DMADDU though. > > As does the TX39. Umm, the TX39 is 32-bit and does not have 64-bit instructions, so it can

Re: [Qemu-devel] [RFC PATCH 1/4] docker: add debian-buildroot-base

2018-09-30 Thread Philippe Mathieu-Daudé
Hi Alex, On 9/11/18 4:06 PM, Alex Bennée wrote: > We can build some more cross-compilers using buildroot. This base > system contains simply the minimum number of tools required for > buildroot to work. We also download and unpack the buildroot source > tree as that will be common for all system d

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 8:43 PM, Maciej W. Rozycki wrote: > On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > I'd use: MIPS_INVAL("mul/div Toshiba"); >>> >>> But just like `gen_mul_vr54xx' this function doesn't handle division! >> >> Per the commit message, I understood this funct

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 8:43 PM, Maciej W. Rozycki wrote: > On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > I'd use: MIPS_INVAL("mul/div Toshiba"); >>> >>> But just like `gen_mul_vr54xx' this function doesn't handle division! >> >> Per the commit message, I understood this funct

Re: [Qemu-devel] [PATCH v2 0/4] mips: Allow more 'Chip specific instructions' flags

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 10:27 PM, Aleksandar Markovic wrote: > Hi, Philippe! > >> From: Philippe Mathieu-Daudé > >> After noticing Fredrik patch [1] clashes with an ongoing work, I shared my > concerns after the current limitations of CPUMIPSState::insn_flags, having > 1 bit left to store more 'Chip specific

[Qemu-devel] [PATCH v3 1/4] target/mips: Increase the 'supported instructions' flags holder size

2018-09-30 Thread Philippe Mathieu-Daudé
Currently this holder is limited to at most 32 flags on a 32-bit architecture, which lets an unique bit available for another 'chip specific instructions' flag. Relax this limit using a 64-bit integer. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.h | 2 +- target/mips/interna

[Qemu-devel] [PATCH v3 0/4] mips: Increase the insn_flags holder size and clean mips-defs.h

2018-09-30 Thread Philippe Mathieu-Daudé
After noticing Fredrik patch [1] clashes with an ongoing work, I shared my concerns after the current limitations of CPUMIPSState::insn_flags, having 1 bit left to store more 'Chip specific instructions'. Since v2: https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg04064.html - rebased on u

[Qemu-devel] [PATCH v3 3/4] target/mips: Clean the 'insn_flags' namespace

2018-09-30 Thread Philippe Mathieu-Daudé
Let space available for the ASE_DSPR3 entry. Suggested-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- target/mips/mips-defs.h | 85 - 1 file changed, 51 insertions(+), 34 deletions(-) diff --git a/target/mips/mips-defs.h b/target/mips/

[Qemu-devel] [PATCH v3 2/4] target/mips: Remove definitions that are only used once

2018-09-30 Thread Philippe Mathieu-Daudé
There is no gain in adding cpu definition which is used only once. Use the chip specific flags directly in place. This also clears the 'MIPS CPU defines' namespace. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/mips-defs.h | 4 target/mips/translate_init.inc.c | 6 +++--- 2

[Qemu-devel] [PATCH v3 4/4] MAINTAINERS: Voluntary to review hobbyist MIPS contributions

2018-09-30 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ce7c351afa..2708745bf7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -188,6 +188,7 @@ F: disas/microblaze.c MIPS M: Aurelien Jarno M: Aleksandar Markovic

Re: [Qemu-devel] [PATCH v2 0/4] mips: Allow more 'Chip specific instructions' flags

2018-09-30 Thread Aleksandar Markovic
Hi, Philippe! > From: Philippe Mathieu-Daudé on behalf of > Philippe Mathieu-Daudé > After noticing Fredrik patch [1] clashes with an ongoing work, I shared my concerns after the current limitations of CPUMIPSState::insn_flags, having 1 bit left to store more 'Chip specific instructions'. Thi

[Qemu-devel] [PATCH v2 4/4] MAINTAINERS: Voluntary to review hobbyist MIPS contributions

2018-09-30 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ce7c351afa..2708745bf7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -188,6 +188,7 @@ F: disas/microblaze.c MIPS M: Aurelien Jarno M: Aleksandar Markovic

[Qemu-devel] [PATCH v2 1/4] target/mips: Increase the 'supported instructions' flags holder size

2018-09-30 Thread Philippe Mathieu-Daudé
Currently this holder is limited to at most 32 flags on a 32-bit architecture, which lets an unique bit available for another 'chip specific instructions' flag. Relax this limit using a 64-bit integer. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.h | 2 +- target/mips/interna

[Qemu-devel] [PATCH v2 0/4] mips: Allow more 'Chip specific instructions' flags

2018-09-30 Thread Philippe Mathieu-Daudé
After noticing Fredrik patch [1] clashes with an ongoing work, I shared my concerns after the current limitations of CPUMIPSState::insn_flags, having 1 bit left to store more 'Chip specific instructions'. Since v1: https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg00933.html - update "int

[Qemu-devel] [PATCH v2 2/4] target/mips: Remove definitions that are only used once

2018-09-30 Thread Philippe Mathieu-Daudé
There is no gain in adding cpu definition which is used only once. Use the chip specific flags directly in place. This also clears the 'MIPS CPU defines' namespace. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/mips-defs.h | 5 - target/mips/translate_init.inc.c | 8

[Qemu-devel] [PATCH v2 3/4] target/mips: Clean the 'insn_flags' namespace

2018-09-30 Thread Philippe Mathieu-Daudé
Let space available for ASE_DSPR3 and INSN_R3900 entries. Suggested-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- target/mips/mips-defs.h | 87 - 1 file changed, 52 insertions(+), 35 deletions(-) diff --git a/target/mips/mips-defs.h b

Re: [Qemu-devel] [PATCH v2 9/9] target/arm: Convert v8.2-fp16 from feature bit to pfr0 test

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 9:29 PM, Richard Henderson wrote: > On 9/28/18 11:34 AM, Philippe Mathieu-Daudé wrote: >> On 27/09/2018 23:13, Richard Henderson wrote: >>> Signed-off-by: Richard Henderson >>> --- >>> target/arm/cpu.h | 17 +++- >>> target/arm/translate-a64.h | 1 + >>> target/a

Re: [Qemu-devel] [PATCH v2 9/9] target/arm: Convert v8.2-fp16 from feature bit to pfr0 test

2018-09-30 Thread Richard Henderson
On 9/28/18 11:34 AM, Philippe Mathieu-Daudé wrote: > On 27/09/2018 23:13, Richard Henderson wrote: >> Signed-off-by: Richard Henderson >> --- >> target/arm/cpu.h | 17 +++- >> target/arm/translate-a64.h | 1 + >> target/arm/translate.h | 1 + >> linux-user/elfload.c

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Maciej W. Rozycki
On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > >> I'd use: > >> > >>MIPS_INVAL("mul/div Toshiba"); > > > > But just like `gen_mul_vr54xx' this function doesn't handle division! > > Per the commit message, I understood this function would eventually > handle "the R5900 specific

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 6:14 PM, Maciej W. Rozycki wrote: > On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > >>> +MIPS_INVAL("mul R5900"); >> >> I'd use: >> >>MIPS_INVAL("mul/div Toshiba"); > > But just like `gen_mul_vr54xx' this function doesn't handle division! Per the commit messa

Re: [Qemu-devel] [PULL 00/79] Misc QEMU patches for 2018-09-30

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/30/18 4:58 PM, Peter Maydell wrote: > On 30 September 2018 at 15:54, Philippe Mathieu-Daudé wrote: >> Paolo, thanks for queuing all of this, however I note some UTF-8 issues. >> >> Alex got lucky: >> >> Signed-off-by: Alex Bennée >> >> But Marc-André and myself have: >> >> Signed-off-by: P

Re: [Qemu-devel] [PATCH v4 17/24] memory-device: add class function get_device_id()

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > When reporting the id of virtio-based memory devices, we always have to > take the one of the proxy device (parent), not the one of the memory > device directly. > > Let's generalize this by allowing memory devices to specify an optional >

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Maciej W. Rozycki
On Sun, 30 Sep 2018, Philippe Mathieu-Daudé wrote: > > +MIPS_INVAL("mul R5900"); > > I'd use: > >MIPS_INVAL("mul/div Toshiba"); But just like `gen_mul_vr54xx' this function doesn't handle division! > > @@ -22378,6 +22449,8 @@ static void decode_opc_special_legacy(CPUMIPSSt

Re: [Qemu-devel] [PATCH v4 16/24] memory-device: trace when pre_assigning/assigning/unassigning addresses

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > Let's trace the address when pre_pluggin/plugging/unplugging a memory device. > > Trace it when pre_plugging as well as when plugging, so we really know > when a specific address is actually used. > > Reviewed-by: David Gibson > Reviewed

Re: [Qemu-devel] [PATCH v6 5/7] target/mips: Define the R5900 CPU

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/15/18 11:50 AM, Fredrik Noring wrote: > The primary purpose of this change is to support programs compiled by > GCC for the R5900 target and thereby run R5900 Linux distributions, for > example Gentoo. > > GCC in version 7.3, by itself, by inspection of the GCC source code > and inspection of

Re: [Qemu-devel] [PATCH v4 15/24] memory-device: complete factoring out unplug handling

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > With the new memory device functions in place, we can factor out > unplugging of memory devices completely. > > Reviewed-by: David Gibson > Reviewed-by: Igor Mammedov > Signed-off-by: David Hildenbrand > --- > hw/mem/memory-device.c

Re: [Qemu-devel] [PATCH v4 14/24] memory-device: complete factoring out plug handling

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > With the new memory device functions in place, we can factor out > plugging of memory devices completely. > > Reviewed-by: David Gibson > Reviewed-by: Igor Mammedov > Signed-off-by: David Hildenbrand > --- > hw/mem/memory-device.c

Re: [Qemu-devel] [PATCH v6 2/7] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/15/18 11:25 AM, Fredrik Noring wrote: > The three-operand MULT and MULTU are the only R5900 specific > instructions emitted by GCC 7.3. The R5900 also implements the three- > operand MADD and MADDU instructions, but they are omitted in QEMU for > now since they are absent in programs compiled

Re: [Qemu-devel] [PATCH v4 12/24] memory-device: add device class function set_addr()

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > To be able to factor out address asignment of memory devices, we will s/asignment/assignment > have to read (get_addr()) and write (set_addr()) the address. > > We can't use properties for this purpose, as properties are device > specific.

Re: [Qemu-devel] [PATCH v6 1/7] target/mips: Define R5900 instructions and CPU preprocessor constants

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/7/18 7:43 PM, Fredrik Noring wrote: > The R5900 implements the 64-bit MIPS III instruction set except DMULT, > DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN, > MOVZ and PREF are implemented. It has the R5900 specific three-operand > instructions MADD, MADDU, MULT and

Re: [Qemu-devel] [PATCH v6 3/7] target/mips: Support R5900 instructions MOVN, MOVZ and PREF from MIPS IV

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/15/18 10:43 AM, Fredrik Noring wrote: > The R5900 is taken to be MIPS III with certain modifications. From > MIPS IV it implements the instructions MOVN, MOVZ and PREF. Again, you can keep R-b tag for simple rewording. > > Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé

Re: [Qemu-devel] [PATCH v6 6/7] linux-user/mips: Recognise the R5900 CPU model

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/15/18 11:08 AM, Fredrik Noring wrote: > This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU. > The R5900 FPU hardware is noncompliant and it is therefore emulated in > software by the Linux kernel. QEMU emulates a compliant FPU accordingly. > > Signed-off-by: Fredrik Norin

Re: [Qemu-devel] [PATCH v6 4/7] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/16/18 5:13 PM, Fredrik Noring wrote: > The Linux kernel traps certain reserved instruction exceptions to > emulate the corresponding instructions. QEMU is the kernel in user > mode, so those traps are emulated by accepting the instructions. > > This change adds the function check_insn_opc_use

Re: [Qemu-devel] [PATCH v6 7/7] elf: Toshiba/Sony rather than MIPS are the implementors of the R5900

2018-09-30 Thread Philippe Mathieu-Daudé
On 9/15/18 12:28 PM, Fredrik Noring wrote: > Sources [1][2] indicate that the Emotion Engine was designed by Toshiba > and licensed to Sony. Others [3][4][5] claim it was a joint effort. It > therefore makes sense to refer to the CPU as "Toshiba/Sony R5900". > > [1] > http://cs.nyu.edu/courses/sp

Re: [Qemu-devel] [PULL 00/79] Misc QEMU patches for 2018-09-30

2018-09-30 Thread Peter Maydell
On 30 September 2018 at 15:54, Philippe Mathieu-Daudé wrote: > Paolo, thanks for queuing all of this, however I note some UTF-8 issues. > > Alex got lucky: > > Signed-off-by: Alex Bennée > > But Marc-André and myself have: > > Signed-off-by: Philippe Mathieu-Daudé > Signed-off-by: Marc-AndrÃ

Re: [Qemu-devel] [PULL 00/79] Misc QEMU patches for 2018-09-30

2018-09-30 Thread Philippe Mathieu-Daudé
Hi Paolo, Peter. On 9/30/18 10:11 AM, Paolo Bonzini wrote: > The following changes since commit 042938f46e1c477419d1931381fdadffaa49d45e: > > Merge remote-tracking branch > 'remotes/dgilbert/tags/pull-migration-20180926a' into staging (2018-09-28 > 17:07:23 +0100) > > are available in the gi

Re: [Qemu-devel] [PATCH v4 08/24] memory-device: document MemoryDeviceClass

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > Document the functions and when to not expect errors. > > Reviewed-by: David Gibson > Signed-off-by: David Hildenbrand > --- > include/hw/mem/memory-device.h | 16 > 1 file changed, 16 insertions(+) > > diff --git a/i

Re: [Qemu-devel] [PATCH v4 07/24] memory-device: forward errors in get_region_size()/get_plugged_size()

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:42 AM, David Hildenbrand wrote: > Let's properly forward the errors, so errors from get_region_size() / > get_plugged_size() can be handled. > > Users right now call both functions after the device has been realized, > which is will never fail, so it is fine to continue usi

Re: [Qemu-devel] [PATCH v4 03/24] pc-dimm: pass PCDIMMDevice to pc_dimm_.*plug

2018-09-30 Thread Auger Eric
Hi David, On 9/26/18 11:41 AM, David Hildenbrand wrote: > We're plugging/unplugging a PCDIMMDevice, so directly pass this type > instead of a more generic DeviceState. > > Signed-off-by: David Hildenbrand Reviewed-by: Eric Auger Thanks Eric > --- > hw/i386/pc.c | 6 +++--- > hw/

Re: [Qemu-devel] [Query] Live Migration between machines with different processor ids

2018-09-30 Thread Jaggi, Manish
> On 05-Sep-2018, at 6:11 PM, Jaggi, Manish wrote: > > > >> On 05-Sep-2018, at 5:50 PM, Andrew Jones wrote: >> >> External Email >> >> On Wed, Sep 05, 2018 at 11:46:11AM +, Jaggi, Manish wrote: >>> (a) Changes in KVM: >>> >>> - Introducing a specific error code (KVM_EINVARIANT) in cas

[Qemu-devel] [PATCH v6 00/25] Fixing record/replay and adding reverse debugging

2018-09-30 Thread Artem Pisarenko
Feature still broken :( Brief description of my tests. Guest image is Linux, which just powers off after kernel boots (instead of proceeding to user-space /init or /sbin/init). Base cmdline: qemu-system-x86_64 -nodefaults -machine pc,accel=tcg -m 2048 -cpu qemu64 -rtc clock=vm,base=2000-01-01T00:

[Qemu-devel] [PULL 79/79] hw/scsi/mptendian: Avoid taking address of fields in packed structs

2018-09-30 Thread Paolo Bonzini
From: Peter Maydell Taking the address of a field in a packed struct is a bad idea, because it might not be actually aligned enough for that pointer type (and thus cause a crash on dereference on some host architectures). Newer versions of clang warn about this. Avoid the bug by not using the "mo

[Qemu-devel] [PULL 68/79] target/i386: fix translation for icount mode

2018-09-30 Thread Paolo Bonzini
From: Pavel Dovgalyuk This patch fixes the checking of boundary crossing instructions. In icount mode only first instruction of the block may cross the page boundary to keep the translation deterministic. These conditions already existed, but compared the wrong variable. Signed-off-by: Pavel Dov

[Qemu-devel] [PULL 77/79] docs/devel/memory.txt: Document _with_attrs accessors

2018-09-30 Thread Paolo Bonzini
From: Peter Maydell When we added the _with_attrs accessors we forgot to mention them in the documentation. Signed-off-by: Peter Maydell Message-Id: <20180824170422.5783-4-peter.mayd...@linaro.org> Based-on: <20180802174042.29234-1-peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini --- do

[Qemu-devel] virtio-console downgrade the virtio-pci-blk performance

2018-09-30 Thread Feng Li
Hi, I found an obvious performance downgrade when virtio-console combined with virtio-pci-blk. This phenomenon exists in nearly all Qemu versions and all Linux (CentOS7, Fedora 28, Ubuntu 18.04) distros. This is a disk cmd: -drive file=iscsi://127.0.0.1:3260/iqn.2016-02.com.test:system:fl-iscsi/

[Qemu-devel] [PULL 55/79] target/i386: unify masking of interrupts

2018-09-30 Thread Paolo Bonzini
Interrupt handling depends on various flags in env->hflags or env->hflags2, and the exact detail were not exactly replicated between x86_cpu_has_work and x86_cpu_exec_interrupt. Create a new function that extracts the highest-priority non-masked interrupt, and use it in both functions. Signed-off

[Qemu-devel] [PULL 74/79] memory: Fix access_with_adjusted_size(small size) on big-endian memory regions

2018-09-30 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé Memory regions configured as DEVICE_BIG_ENDIAN (or DEVICE_NATIVE_ENDIAN on big-endian guest) behave incorrectly when the memory access 'size' is smaller than the implementation 'access_size'. In the following code segment from access_with_adjusted_size(): if (me

[Qemu-devel] [PULL 63/79] scsi-block: Deprecate rotation_rate

2018-09-30 Thread Paolo Bonzini
From: Fam Zheng This option is added together with scsi-disk but is never honoured, becuase we don't emulate the VPD page for scsi-block. We could intercept and inject the user specified value like for max xfer len, but it's probably not helpful since the intent of 070f80095ad was for random entr

[Qemu-devel] [PULL 50/79] Revert "chardev: tcp: postpone TLS work until machine done"

2018-09-30 Thread Paolo Bonzini
From: Marc-André Lureau This reverts commit 99f2f54174a595e3ada6e4332fcd2b37ebb0d55d. See next commit reverting 25679e5d58e258e9950685ffbd0cae4cd40d9cc2 as well for rationale. Signed-off-by: Marc-André Lureau Message-Id: <20180817135224.22971-2-marcandre.lur...@redhat.com> Signed-off-by: Paol

[Qemu-devel] [PULL 64/79] lsi53c895a: convert to trace-events

2018-09-30 Thread Paolo Bonzini
From: Mark Cave-Ayland Signed-off-by: Mark Cave-Ayland Message-Id: <20180917053229.4853-1-mark.cave-ayl...@ilande.co.uk> Signed-off-by: Paolo Bonzini --- hw/scsi/lsi53c895a.c | 214 +-- hw/scsi/trace-events | 62 +++ 2 files changed,

[Qemu-devel] [PULL 56/79] target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK

2018-09-30 Thread Paolo Bonzini
This flag will be used for KVM's nested VMX migration; the HF_GUEST_MASK name is already used in KVM, adopt it in QEMU as well. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4 ++-- target/i386/excp_helper.c | 2 +- target/i386/seg_helper.c | 6 +++--- target/i386/svm_helper.c |

[Qemu-devel] [PULL 61/79] MAINTAINERS: add myself as elf2dmp maintainer

2018-09-30 Thread Paolo Bonzini
From: Viktor Prutyanov Add myself as contrib/elf2dmp maintainer and elf2dmp as maintained. Signed-off-by: Viktor Prutyanov Message-Id: <20180918095422.4468-1-viktor.prutya...@phystech.edu> Signed-off-by: Paolo Bonzini --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MA

[Qemu-devel] [PULL 53/79] test-char: add socket reconnect test

2018-09-30 Thread Paolo Bonzini
From: Marc-André Lureau This test exhibits a regression fixed by the previous reverts. Signed-off-by: Marc-André Lureau Message-Id: <20180817135224.22971-5-marcandre.lur...@redhat.com> Signed-off-by: Paolo Bonzini Signed-off-by: Marc-André Lureau --- tests/test-char.c | 18 ++---

[Qemu-devel] [PULL 78/79] cpus: fix TCG kick timer leak

2018-09-30 Thread Paolo Bonzini
From: Alex Bennée This is an alternative fix to Marc-André's original patch. Reported-by: Marc-André Lureau Suggested-by: Paolo Bonzini Signed-off-by: Alex Bennée Message-Id: <20180927171724.30128-1-alex.ben...@linaro.org> Signed-off-by: Paolo Bonzini --- cpus.c | 5 +++-- 1 file changed, 3

[Qemu-devel] [PULL 75/79] memory: Remove old_mmio accessors

2018-09-30 Thread Paolo Bonzini
From: Peter Maydell Now that all the users of old_mmio MemoryRegion accessors have been converted, we can remove the core code support. Signed-off-by: Peter Maydell Message-Id: <20180824170422.5783-2-peter.mayd...@linaro.org> Based-on: <20180802174042.29234-1-peter.mayd...@linaro.org> Reviewed-

[Qemu-devel] [PULL 59/79] dump: move Windows dump structures definitions

2018-09-30 Thread Paolo Bonzini
From: Viktor Prutyanov This patch moves definitions of Windows dump structures to include/qemu/win_dump_defs.h to keep create_win_dump() prototype separate. Signed-off-by: Viktor Prutyanov Message-Id: <1535546488-30208-2-git-send-email-viktor.prutya...@virtuozzo.com> Signed-off-by: Paolo Bonzin

[Qemu-devel] [PULL 76/79] hw/nvram/fw_cfg: Use memberwise copy of MemoryRegionOps struct

2018-09-30 Thread Paolo Bonzini
From: Peter Maydell We've now removed the 'old_mmio' member from MemoryRegionOps, so we can perform the copy as a simple struct copy rather than having to do it via a memberwise copy. Signed-off-by: Peter Maydell Message-Id: <20180824170422.5783-3-peter.mayd...@linaro.org> Based-on: <2018080217

[Qemu-devel] [PULL 49/79] memory: cleanup side effects of memory_region_init_foo() on failure

2018-09-30 Thread Paolo Bonzini
From: Igor Mammedov if MemoryRegion intialization fails it's left in semi-initialized state, where it's size is not 0 and attached as child to owner object. And this leds to crash in following use-case: (monitor) object_add memory-backend-file,id=mem1,size=9G,mem-path=/tmp/foo,discard-da

[Qemu-devel] [PULL 57/79] i386: Compile CPUX86State xsave_buf only when support KVM or HVF

2018-09-30 Thread Paolo Bonzini
From: Liran Alon While at it, also rename var to indicate it is not used only in KVM. Reviewed-by: Nikita Leshchenko Reviewed-by: Patrick Colp Signed-off-by: Liran Alon Message-Id: <20180914003827.124570-2-liran.a...@oracle.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4

[Qemu-devel] [PULL 52/79] char-socket: update all ioc handlers when changing context

2018-09-30 Thread Paolo Bonzini
From: Marc-André Lureau So far, tcp_chr_update_read_handler() only updated the read handler. Let's also update the hup handler. Factorize the code while at it. (note that s->ioc != NULL when s->connected) Signed-off-by: Marc-André Lureau Message-Id: <20180817135224.22971-4-marcandre.lur...@re

[Qemu-devel] [PULL 73/79] memory: Refactor common shifting code from accessors

2018-09-30 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20180927002416.1781-3-f4...@amsat.org> Signed-off-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daudé --- memory.c | 30 +- 1 file changed, 21 insertions(+), 9 deletions(-) diff -

[Qemu-devel] [PULL 72/79] memory: Use MAKE_64BIT_MASK()

2018-09-30 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé Suggested-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20180927002416.1781-2-f4...@amsat.org> Signed-off-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daudé --- memory.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --gi

[Qemu-devel] [PULL 45/79] fw_cfg_mem: add read memory region callback

2018-09-30 Thread Paolo Bonzini
From: Li Qiang Signed-off-by: Li Qiang Message-Id: <20180912160118.21158-2-liq...@163.com> Signed-off-by: Paolo Bonzini --- hw/nvram/fw_cfg.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index d79a568..6de7809 100644 --- a/hw/nvram/fw_cfg.c ++

[Qemu-devel] [PULL 71/79] virtio: do not take address of packed members

2018-09-30 Thread Paolo Bonzini
The address of a packed member is not packed, which may cause accesses to unaligned pointers. Avoid this by reading the packed value before passing it to another function. Cc: Jason Wang Cc: Peter Maydell Signed-off-by: Paolo Bonzini --- hw/char/virtio-serial-bus.c | 6 +++--- 1 file changed,

[Qemu-devel] [PULL 67/79] hvf: drop unused variable

2018-09-30 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini --- target/i386/hvf/hvf.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 5db167d..9f52bc4 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -72,7 +72,6 @@ #include "sysemu/sysemu.h" #include "ta

[Qemu-devel] [PULL 41/79] replay: allow loading any snapshots before recording

2018-09-30 Thread Paolo Bonzini
From: Pavel Dovgalyuk This patch enables using -loadvm in recording mode to allow starting the execution recording from any of the available snapshots. It also fixes loading of the record/replay state, therefore snapshots created in replay mode may also be used for starting the new recording. Si

[Qemu-devel] [PULL 69/79] hostmem-file: make available memory-backend-file on POSIX-based hosts

2018-09-30 Thread Paolo Bonzini
From: Hikaru Nishida Before this change, memory-backend-file object is valid for Linux hosts only because hostmem-file.c is compiled only on Linux hosts. However, other POSIX-based hosts (such as macOS) can support memory-backend-file object in the same way as on Linux hosts. This patch makes hos

[Qemu-devel] [PULL 51/79] Revert "chardev: tcp: postpone async connection setup"

2018-09-30 Thread Paolo Bonzini
From: Marc-André Lureau This reverts commit 25679e5d58e258e9950685ffbd0cae4cd40d9cc2. This commit broke "reconnect socket" chardev that are created after "machine_done": they no longer try to connect. It broke also vhost-user-test that uses chardev while there is no "machine_done" event. The go

[Qemu-devel] [PULL 39/79] replay: flush events when exiting

2018-09-30 Thread Paolo Bonzini
From: Pavel Dovgalyuk This patch adds events processing when emulation finishes instead of just cleaning the queue. Now the bdrv coroutines will be in consistent state when emulator closes. It allows correct polling of the block layer at exit. Signed-off-by: Pavel Dovgalyuk Message-Id: <2018091

[Qemu-devel] [PULL 58/79] hw: edu: replace device name with macro

2018-09-30 Thread Paolo Bonzini
From: Li Qiang Just as other devices do. Signed-off-by: Li Qiang Message-Id: <1536901871-2729-1-git-send-email-liq...@gmail.com> Signed-off-by: Paolo Bonzini --- hw/misc/edu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/misc/edu.c b/hw/misc/edu.c index df26a4d.

[Qemu-devel] [PULL 54/79] char-pty: remove unnecessary #ifdef

2018-09-30 Thread Paolo Bonzini
For some reason __APPLE__ was not checked in pty code. However, the #ifdef is redundant: this file is already compiled only if CONFIG_POSIX, same as util/qemu-openpty.c which it uses. Reported-by: Roman Bolshakov Signed-off-by: Paolo Bonzini --- chardev/char-pty.c | 6 -- 1 file changed, 6

[Qemu-devel] [PULL 62/79] kvmclock: run KVM_KVMCLOCK_CTRL ioctl in vcpu thread

2018-09-30 Thread Paolo Bonzini
From: Yongji Xie According to KVM API Documentation, we should only run vcpu ioctls from the same thread that was used to create the vcpu. This patch makes KVM_KVMCLOCK_CTRL ioctl consistent with the Documentation. No functional change. Signed-off-by: Yongji Xie Signed-off-by: Chai Wen Messag

[Qemu-devel] [PULL 35/79] target/i386: move cpu_tmp1_i64 to DisasContext

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 160 1 file changed, 80 insertions(+), 80 deletions(-) diff --git a/target/i386/translate.c b/target

[Qemu-devel] [PULL 43/79] slirp: fix ipv6 timers

2018-09-30 Thread Paolo Bonzini
From: Pavel Dovgalyuk ICMP implementation for IPv6 uses timers based on virtual clock. This is incorrect because this service is not related to the guest state, and its events should not be recorded and replayed. This patch changes using virtual clock to the new virtual_ext clock. Signed-off-by:

[Qemu-devel] [PULL 36/79] target/i386: move x86_64_hregs to DisasContext

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" And convert it to a bool to use an existing hole in the struct. Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 307 1 file changed, 154 insertions(

[Qemu-devel] [PULL 29/79] target/i386: move cpu_tmp0 to DisasContext

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 282 1 file changed, 144 insertions(+), 138 deletions(-) diff --git a/target/i386/translate.c b/targ

[Qemu-devel] [PULL 27/79] target/i386: move cpu_T0 to DisasContext

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 1174 --- 1 file changed, 594 insertions(+), 580 deletions(-) diff --git a/target/i386/translate.c b/targ

[Qemu-devel] [PULL 40/79] translator: fix breakpoint processing

2018-09-30 Thread Paolo Bonzini
From: Pavel Dovgalyuk QEMU cannot pass through the breakpoints when 'si' command is used in remote gdb. This patch disables inserting the breakpoints when we are already single stepping though the gdb remote protocol. This patch also fixes icount calculation for the blocks that include breakpoint

[Qemu-devel] [PULL 65/79] accel/tcg: Remove dead code

2018-09-30 Thread Paolo Bonzini
From: Thomas Huth The global cpu_single_env variable has been removed more than 5 years ago, so apparently nobody used this dead debug code in that timeframe anymore. Thus let's remove it completely now. Signed-off-by: Thomas Huth Message-Id: <1537204134-15905-1-git-send-email-th...@redhat.com>

[Qemu-devel] [PULL 25/79] target/i386: move cpu_cc_srcT to DisasContext

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/translate.c | 32 ++-- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c

[Qemu-devel] [PULL 37/79] configure: enable mttcg for i386 and x86_64

2018-09-30 Thread Paolo Bonzini
From: "Emilio G. Cota" Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Paolo Bonzini --- configure | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configure b/configure index 95462f8..3c33c9f 100755 --- a/configure +++ b/configure @@ -7024,12 +7024,14 @@ TARG

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