There is no gain in adding cpu definition which is used only once.
Use the chip specific flags directly in place.
This also clears the 'MIPS CPU defines' namespace.
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
target/mips/mips-defs.h | 4 ----
target/mips/translate_init.inc.c | 6 +++---
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index c8e99791ad..c0c5a98ef1 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -62,10 +62,6 @@
#define CPU_MIPS2 (CPU_MIPS1 | ISA_MIPS2)
#define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
#define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4)
-#define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
-#define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
-#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F)
-
#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
/* MIPS Technologies "Release 1" */
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index b3320b9dc7..96b7876ce2 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -527,7 +527,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 32,
- .insn_flags = CPU_VR54XX,
+ .insn_flags = CPU_MIPS4 | INSN_VR54XX,
.mmu_type = MMU_TYPE_R4000,
},
{
@@ -737,7 +737,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 40,
- .insn_flags = CPU_LOONGSON2E,
+ .insn_flags = CPU_MIPS3 | INSN_LOONGSON2E,
.mmu_type = MMU_TYPE_R4000,
},
{
@@ -757,7 +757,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 40,
- .insn_flags = CPU_LOONGSON2F,
+ .insn_flags = CPU_MIPS3 | INSN_LOONGSON2F,
.mmu_type = MMU_TYPE_R4000,
},
{
--
2.19.0
