From: Eduardo Habkost
All handling of defaults (default_* variables) is inside vl.c,
move default_net there too, so we can more easily refactor that
code later.
Reviewed-by: Paolo Bonzini
Signed-off-by: Eduardo Habkost
Signed-off-by: Jason Wang
---
include/net/net.h | 1 -
net/net.c
From: Dmitry Fleytman
These macros will be used by future commits introducing
e1000e device emulation and by vmxnet3 tracing code.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Jason Wang
---
include/net/net.h | 5 +
1 file cha
From: Dmitry Fleytman
This function will be used by e1000e device code.
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Jason Wang
---
hw/pci/msix.c | 2 +-
include/hw/pci/msix.h | 1 +
2 files changed, 2 insertions(+), 1 del
From: Zhou Jie
net_init_tap has a huge stack usage of 8192 bytes approx.
Moving large arrays to heap to reduce stack usage.
Signed-off-by: Zhou Jie
Signed-off-by: Jason Wang
---
net/tap.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/net/tap.c b/net/tap.c
index 740
From: Dmitry Fleytman
Signed-off-by: Dmitry Fleytman
Signed-off-by: Leonid Bloch
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Jason Wang
---
hw/net/vmxnet3.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 20f26b7..
From: Prasad J Pandit
When receiving packets over MIPSnet network device, it uses
receive buffer of size 1514 bytes. In case the controller
accepts large(MTU) packets, it could lead to memory corruption.
Add check to avoid it.
Reported by: Oleksandr Bazhaniuk
Signed-off-by: Prasad J Pandit
Sig
The following changes since commit 287db79df8af8e31f18e262feb5e05103a09e4d4:
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into
staging (2016-05-24 13:06:33 +0100)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pull-request
for
right. no reason. I can make it just a C file.
when I started I was not sure what was the best way to do it as I generate
some come code.
thanks, I will fix it.
On Thu, Jun 2, 2016 at 9:44 AM, Richard Henderson wrote:
> On 05/29/2016 06:23 PM, Michael Rolnik wrote:
>
>> Signed-off-by: Michael Ro
From: Prasad J Pandit
When processing MIPSnet I/O port write operation, it uses a
transmit buffer tx_buffer[MAX_ETH_FRAME_SIZE=1514]. Two indices
's->tx_written' and 's->tx_count' are used to control data written
to this buffer. If the two were to be equal before writing, it'd
lead to an OOB writ
On 05/29/2016 06:23 PM, Michael Rolnik wrote:
Signed-off-by: Michael Rolnik
---
target-avr/translate.c.inc | 2546
1 file changed, 2546 insertions(+)
create mode 100644 target-avr/translate.c.inc
Is there any good reason for you to pull out these
I ran checkpatch.pl on my patches and it was ok.
I will fix it.
On Thu, Jun 2, 2016 at 9:39 AM, Richard Henderson wrote:
> On 05/29/2016 06:23 PM, Michael Rolnik wrote:
>
>> +static void avr_cpu_set_pc(
>> +CPUState *cs,
>> +
I disagree. it's non portable as long as you don't know what compiler you
are using.
if bitfields are not acceptable at all, I will regenerate my code.
thanks.
On Thu, Jun 2, 2016 at 9:32 AM, Richard Henderson wrote:
> On 05/29/2016 06:23 PM, Michael Rolnik wrote:
>
>> I am aware of bad por
On 05/29/2016 06:23 PM, Michael Rolnik wrote:
+static void avr_cpu_set_pc(
+CPUState *cs,
+vaddr value)
The formatting throughout all of these patches is wrong.
You need to follow the instructions in
On 05/29/2016 06:23 PM, Michael Rolnik wrote:
I am aware of bad portability of bit fields as compilers
for LE and BE hosts lists bit fields in different order
However they won't "parse" in target memory but a data prepared by me
What data prepared by you? You're assigning to an int
According to PS/2 Mouse/Keyboard Protocol, the keyboard output buffer
size is 16 bytes, but we only use 15 bytes actually, this causes some
problem, for example, if I submit "123456789" in a bunch through VNC,
the actual result will be "123456788...", because the 16th key
event which is "8"
By arranging for explicit writes to cpu_fsr after floating point
operations, we are able to mark the helpers as not writing to
tcg globals, which means that we don't need to invalidate the
integer register set across said calls.
Signed-off-by: Richard Henderson
---
target-sparc/fop_helper.c | 22
We've now implemented all fp asis inline, except for the no-fault
memory reads. The latter can be passed directly to helper_ld_asi.
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 2 -
target-sparc/ldst_helper.c | 148 -
target-spa
This avoids needing to save state before every FP operation.
Signed-off-by: Richard Henderson
---
target-sparc/fop_helper.c | 17 +
target-sparc/translate.c | 6 +-
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 115 ++-
1 file changed, 103 insertions(+), 12 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 7d10578..b2b3027 100644
--- a/target-sparc/translate.c
++
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index e9be680..a7f 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5400,17 +540
Signed-off-by: Richard Henderson
---
target-sparc/ldst_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 23840db..3700ca1 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -989,7 +98
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 45 +++--
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 4a6a554..2d3cda6 100644
--- a/target-sparc/translate.c
+++ b/
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 104 ---
1 file changed, 90 insertions(+), 14 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 1d8c880..0e870d8 100644
--- a/target-sparc/translate.c
+++
Signed-off-by: Richard Henderson
---
target-sparc/ldst_helper.c | 459 +++--
target-sparc/translate.c | 6 +-
2 files changed, 235 insertions(+), 230 deletions(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index f73cf6d..a6c4d
Reduces the argument count for helper_ld_asi; do helper_st_asi
for consistency.
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 4 +--
target-sparc/ldst_helper.c | 73 ++
target-sparc/translate.c | 58 --
This unifies quite a few duplicate code fragments.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 75 +---
1 file changed, 20 insertions(+), 55 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index fb3938
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 968564e..948869e 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/tran
Copied from tag v4.2, 64291f7db5bd8150a74ad2036f1037e6a0428df2.
Signed-off-by: Richard Henderson
---
target-sparc/asi.h | 297 +
1 file changed, 297 insertions(+)
create mode 100644 target-sparc/asi.h
diff --git a/target-sparc/asi.h b/target-
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 48 +---
1 file changed, 13 insertions(+), 35 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 0917486..7d10578 100644
--- a/target-sparc/translate.c
+++
Also implement a few more twinx asis.
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 2 +-
target-sparc/ldst_helper.c | 156 -
target-sparc/translate.c | 12 +++-
3 files changed, 120 insertions(+), 50 deletions(-)
diff --git a
Signed-off-by: Richard Henderson
---
target-sparc/asi.h | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/target-sparc/asi.h b/target-sparc/asi.h
index aace6f3..c9a1849 100644
--- a/target-sparc/asi.h
+++ b/target-sparc/asi.h
@@ -144,24 +144,36 @@
* ASI
Quite a few helpers do not modify tcg globals but did not so indicate.
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 48
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
i
We now have a single copy of gen_ld_asi, gen_st_asi,
gen_swap_asi, and everything uses gen_get_asi.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 285 ++-
1 file changed, 131 insertions(+), 154 deletions(-)
diff --git a/target-sparc/
The global is only ever read for one insn; we can just as well
use a load from env instead and generate the same code. This
also allows us to indicate the the associated helpers do not
touch TCG globals.
Signed-off-by: Richard Henderson
---
target-sparc/helper.h| 6 +++---
target-sparc/tran
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 122 +++
1 file changed, 122 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 948869e..9151ab8 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/
Doing this instead of saving the raw PS_PRIV and TL. This means
that all nucleus mode TBs (TL > 0) can be shared. This fixes a
bug in that we didn't include HS_PRIV in the TB flags, and so could
produce incorrect TB matches for hypervisor state.
The LSU and DMMU states were unused by the transla
The primary focus of this patch set is to reduce the number of
helpers that modify TCG globals, and thus increase the lifetime
of those globals within each TB, and thus decrease the number
of times that tcg must spill and fill them from backing store.
As a byproduct, I also implement the bulk of t
Knowing the value of %asi at translation time means that we
can handle the common settings without a function call.
The steady state appears to be %asi == ASI_P, so that sparcv9
code can use offset forms of lda/sta. The %asi register gets
pushed and popped on entry to certain functions, but it ra
Replace gen_get_asi, and use it for both 32-bit and 64-bit.
For v8, do supervisor and immediate checks here.
Also, move save_state and TB ending into the respective
subroutines, out of disas_sparc_insn.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 505
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 8917a72..99a251c 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/
On 02/06/16 04:15, David Gibson wrote:
> On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote:
>> On 31/05/16 01:41, David Gibson wrote:
>>
>>> From: Benjamin Herrenschmidt
>>>
>>> We rework the way the MMU indices are calculated, providing separate
>>> indices for I and D side based
On Thu, Jun 02, 2016 at 10:42:23AM +1000, David Gibson wrote:
> On Wed, Jun 01, 2016 at 12:18:22PM +0200, Thomas Huth wrote:
> > On 01.06.2016 11:51, Bharata B Rao wrote:
> > > Recently the number of memory slots supported by KVM for PowerPC was
> > > changed
> > > from 32 to 512. QEMU was restric
On Wed, Jun 01, 2016 at 06:57:38PM +1000, Alexey Kardashevskiy wrote:
> This makes use of the new "memory registering" feature. The idea is
> to provide the userspace ability to notify the host kernel about pages
> which are going to be used for DMA. Having this information, the host
> kernel can p
On Wed, Jun 01, 2016 at 06:57:39PM +1000, Alexey Kardashevskiy wrote:
> This will be later used by the "ibm,reset-pe-dma-window" RTAS handler
> which resets the DMA configuration to the defaults.
>
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: David Gibson
Should be safe even without the
On Wed, Jun 01, 2016 at 02:56:38PM +0200, Igor Mammedov wrote:
[...]
> > @@ -2561,6 +2563,9 @@ build_dmar_q35(MachineState *ms, GArray *table_data,
> > GArray *linker)
> > AcpiTableDmar *dmar;
> > AcpiDmarHardwareUnit *drhd;
> > uint8_t dmar_flags = 0;
> > +AcpiDmarDeviceScope
On Tue, May 31, 2016 at 11:02:39AM -0700, Jianjun Duan wrote:
> To manage hotplug/unplug of dynamic resources such as PCI cards,
> memory, and CPU on sPAPR guests, a firmware abstraction known as
> a Dynamic Resource Connector (DRC) is used to assign a particular
> dynamic resource to the guest, an
On Tue, May 31, 2016 at 11:02:42AM -0700, Jianjun Duan wrote:
> Currently we cannot directly transfer a QTAILQ instance because of the
> limitation in the migration code. Here we introduce an approach to
> transfer such structures. In our approach such a structure is tagged
> with VMS_CSTM. We then
Support for ppc/ppc64 is official in libseccomp 2.3.0, so modify the
configuration script to allow qemuu to enable seccomp for those platforms.
Signed-off-by: Michael Strosaker
---
configure | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configure b/configure
index b5aab72..79b571d 10075
On 06/02/2016 11:15 AM, Wang, Wei W wrote:
On Wed 6/1/2016 4:15 PM, Xiao Guangrong wrote:
On 05/29/2016 04:11 PM, Wei Wang wrote:
Signed-off-by: Wei Wang
---
Details | 324
1 file changed, 324 insertions(+)
create mod
On Wed, Jun 01, 2016 at 06:57:31PM +1000, Alexey Kardashevskiy wrote:
> Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus
> where devices are allowed to do DMA. These ranges are called DMA windows.
> By default, there is a single DMA window, 1 or 2GB big, mapped at zero
>
On Thu, May 12, 2016 at 09:18:16AM +0530, Bharata B Rao wrote:
> Add an abstract CPU core type that could be used by machines that want
> to define and hotplug CPUs in core granularity.
>
> Signed-off-by: Bharata B Rao
> Signed-off-by: Igor Mammedov
>[Integer core property]
> Rev
On Wed, Jun 01, 2016 at 06:57:37PM +1000, Alexey Kardashevskiy wrote:
> Every IOMMU has some granularity which MemoryRegionIOMMUOps::translate
> uses when translating, however this information is not available outside
> the translate context for various checks.
>
> This adds a get_page_sizes callb
On Wed, Jun 01, 2016 at 08:03:08AM +0100, Mark Cave-Ayland wrote:
> On 01/06/16 03:15, David Gibson wrote:
>
> > On Tue, May 31, 2016 at 11:28:49PM +0100, Mark Cave-Ayland wrote:
> >> On 31/05/16 01:41, David Gibson wrote:
> >>
> >>> From: Benjamin Herrenschmidt
> >>>
> >>> Not that anything remo
On Wed 6/1/2016 4:15 PM, Xiao Guangrong wrote:
> On 05/29/2016 04:11 PM, Wei Wang wrote:
> > Signed-off-by: Wei Wang
> > ---
> > Details | 324
>
> > 1 file changed, 324 insertions(+)
> > create mode 100644 Details
> >
> > diff
On Thu, 06/02 03:04, Wei, Jiangang wrote:
> On Wed, 2016-06-01 at 15:23 +0800, Fam Zheng wrote:
> > On Wed, 06/01 15:08, Wei Jiangang wrote:
> > > Use a single error_printf to replace triple error_report.
> > >
> > > Signed-off-by: Wei Jiangang
> > > ---
> > > block/raw-posix.c | 10 +-
>
On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote:
> On 31/05/16 01:41, David Gibson wrote:
>
> > From: Benjamin Herrenschmidt
> >
> > We rework the way the MMU indices are calculated, providing separate
> > indices for I and D side based on MSR:IR and MSR:DR respectively,
> > and
On Wed, 2016-06-01 at 15:23 +0800, Fam Zheng wrote:
> On Wed, 06/01 15:08, Wei Jiangang wrote:
> > Use a single error_printf to replace triple error_report.
> >
> > Signed-off-by: Wei Jiangang
> > ---
> > block/raw-posix.c | 10 +-
> > 1 file changed, 5 insertions(+), 5 deletions(-)
> >
** Description changed:
I give a host usb device to guest in the way of using "virsh attach-device"
cmd. In guest os,use "lsusb" cmd I can see two devices have been added,one is
usb device and the other is usb-hub（0409:55aa NEC Corp. Hub）.
when I use "virsh detach-device" detach the usb devi
On 05/31/2016 10:29 PM, Alex Williamson wrote:
> On Tue, 31 May 2016 10:29:10 +0800
> Jike Song wrote:
>
>> On 05/28/2016 10:56 PM, Alex Williamson wrote:
>>> On Fri, 27 May 2016 22:43:54 +
>>> "Tian, Kevin" wrote:
>>>
My impression was that you don't like hypervisor specific th
On Thu, May 12, 2016 at 09:18:15AM +0530, Bharata B Rao wrote:
> From: Igor Mammedov
>
> pre_plug callback is to be called before device.realize() is executed.
> This would allow to check/set device's properties from HotplugHandler.
>
> Signed-off-by: Igor Mammedov
> Signed-off-by: Bharata B Ra
On Wed, 06/01 15:55, Paolo Bonzini wrote:
>
>
> On 01/06/2016 13:13, Laszlo Ersek wrote:
> > On 06/01/16 12:40, Gerd Hoffmann wrote:
> >> Hi,
> >>
> >>> + git describe 2>/dev/null | tr -d '\n'; \
> >>> + if ! git diff-index --quiet HEAD &>/dev/nul
On Wed, Jun 1, 2016 at 2:39 PM, Peter Maydell wrote:
> On 1 June 2016 at 22:34, Michael Rolnik wrote:
>> as I understand it's not possible right off the shelf as some functions
>> like gen_intermediate_code are global.
>> so, the question is *is it a complex task to make a heterogenous setup
>> p
On Wed, Jun 01, 2016 at 11:56:07AM +0200, Paolo Bonzini wrote:
>
>
> On 01/06/2016 11:51, Bharata B Rao wrote:
> > Introduce kvm_get_max_memslots() API that can be used to obtain the
> > maximum number of memslots supported by KVM.
> >
> > Signed-off-by: Bharata B Rao
> > ---
> > include/sysem
On Wed, Jun 01, 2016 at 10:11:05AM +0200, Paolo Bonzini wrote:
>
>
> On 01/06/2016 04:29, Alexey Kardashevskiy wrote:
> > On 27/05/16 17:54, Alexey Kardashevskiy wrote:
> >> On 04/05/16 16:52, Alexey Kardashevskiy wrote:
> >>> This allows dynamic allocation for migrating arrays.
> >>>
> >>> Alrea
On Wed, Jun 01, 2016 at 12:18:22PM +0200, Thomas Huth wrote:
> On 01.06.2016 11:51, Bharata B Rao wrote:
> > Recently the number of memory slots supported by KVM for PowerPC was changed
> > from 32 to 512. QEMU was restricting the user specifiable hot-pluggable
> > memory
> > slots to 32. This pat
In a similar vein to commit ee2bdc33c913b7d765baa5aa338c29fb30a05c9a
("throttle: refuse bps_max/iops_max without bps/iops") it is likely that
the user made a configuration error if iops-size has been set but no
iops limit has been set.
Print an error message so the user can check their throttling
> 在 2016年6月2日，03:44，Mark Cave-Ayland 写道：
>
>> On 01/06/16 08:58, xiaoqiang zhao wrote:
>>
>> The previous commit e7c9136977cb99c6eb52c9139f7b8d8b5fa87db9
>> (hw/char: QOM'ify escc.c) cause qemu-system-ppc/ppc64
>> OpenBIOS to freeze on startup, this commit fix it.
>>
>> Signed-off-by: xiaoqia
ping
On 05/11/2016 04:39 PM, Eric Blake wrote:
> Fix several corner-case bugs in our implementation of the NBD
> protocol, both as client and as server.
>
> Depends on Kevin's block-next branch:
> git://repo.or.cz/qemu/kevin.git block-next
>
> Also available as a tag at this location:
> git fetc
> * BICKFORD, JEFFREY E (jb6...@att.com) wrote:
> > > * Daniel P. Berrange (berra...@redhat.com) wrote:
> > > > On Wed, Jan 20, 2016 at 10:54:47AM -0500, Stefan Berger wrote:
> > > > > On 01/20/2016 10:46 AM, Daniel P. Berrange wrote:
> > > > > >On Wed, Jan 20, 2016 at 10:31:56AM -0500, Stefan Berg
On Fri, May 27, 2016 at 07:43:46AM +, Imran, Talha wrote:
>
> On 05/27/2016 06:37 AM, David Gibson wrote:
> > On Thu, May 19, 2016 at 05:11:35PM +0500, Talha Imran wrote:
> >> With specification at hand from the reference manual from Freescale
> >> http://cache.nxp.com/files/32bit/doc/ref_manu
On Wed, Jun 1, 2016 at 5:17 PM, Richard Henderson wrote:
>
> Because x86 has a strong memory model.
>
> It does not require barriers to keep normal loads and stores in order. The
> primary reason for the *fence instructions is to order the "non-temporal"
> memory operations that are part of the S
On 1 June 2016 at 22:34, Michael Rolnik wrote:
> as I understand it's not possible right off the shelf as some functions
> like gen_intermediate_code are global.
> so, the question is *is it a complex task to make a heterogenous setup
> possible*?
Yes, it's a complex task. It's not impossible, bu
On 06/01/2016 11:43 AM, Pranith Kumar wrote:
This is, IMO, confused. Either we should use the C++11 barrier types, or
the Linux barrier types, but not both.
This part of the design is still being fleshed out. The above listing
is all the kinds of barriers we can encounter during translation. M
as I understand it's not possible right off the shelf as some functions
like gen_intermediate_code are global.
so, the question is *is it a complex task to make a heterogenous setup
possible*?
On Thu, Jun 2, 2016 at 12:28 AM, Michael Rolnik wrote:
> Hi all,
>
> Is there a way to build a platform
Hi all,
Is there a way to build a platform with two or more different cores e.g.
PPC & ARM ?
--
Best Regards,
Michael Rolnik
On 06/01/2016 11:49 AM, Pranith Kumar wrote:
On Tue, May 31, 2016 at 4:27 PM, Richard Henderson wrote:
On 05/31/2016 11:39 AM, Pranith Kumar wrote:
+case INDEX_op_mb:
+tcg_out_mb(s);
You need to look at the barrier type and DTRT. In particular, the Linux
smp_rmb and smp_wmb ty
Rename to bdrv_pwrite_zeroes() to let the compiler ensure we
cater to the updated semantics. Do the same for
bdrv_aio_write_zeroes() and bdrv_co_write_zeroes(). Two of the
three places map to the byte-based counterparts; but for now,
since we have no byte-based aio write, we still require sector
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
Reviewed-by: Kevin Wolf
---
block/gluster.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/block/gluster.c b/block/gluster.c
index a8aaacf..d361d8e 100644
--- a
Another step on our continuing quest to switch to byte-based
interfaces.
Kill an abuse of the comma operator while at it (fortunately,
the semantics were still right). Also, the test for requests
not aligned to clusters should be applied always, not just
when a backing file is present.
Signed-of
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
Reviewed-by: Kevin Wolf
---
block/vmdk.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/block/vmdk.c b/block/vmdk.c
index 8494d63..fa5bc09 100644
--- a/block/vmdk
Now that all drivers have been converted to a byte interface,
we no longer need a sector interface.
Signed-off-by: Eric Blake
Reviewed-by: Kevin Wolf
---
include/block/block_int.h | 2 --
block/io.c| 15 ++-
2 files changed, 2 insertions(+), 15 deletions(-)
diff --
Another step on our continuing quest to switch to byte-based
interfaces.
As this is the first byte-based iscsi interface, convert
is_request_lun_aligned() into two versions, one for sectors
and one for bytes. Also, change from outright -EINVAL failure
on an unaligned request, to instead failing w
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
---
block/raw-posix.c | 34 +-
trace-events | 2 +-
2 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/block/raw-posix.c b/block/raw-posix.c
inde
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
Reviewed-by: Kevin Wolf
---
block/blkreplay.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/block/blkreplay.c b/block/blkreplay.c
index 1a721ad..525c2d5 100755
---
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
---
block/qcow2.c | 37 +++--
trace-events | 4 ++--
2 files changed, 21 insertions(+), 20 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index cc59efc..
Another step on our continuing quest to switch to byte-based
interfaces.
Signed-off-by: Eric Blake
Reviewed-by: Kevin Wolf
---
block/raw_bsd.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/block/raw_bsd.c b/block/raw_bsd.c
index d9adf90..b1d5237 100644
--- a/bl
Update bdrv_co_do_write_zeroes() to be byte-based, and select
between the new byte-based bdrv_co_pwrite_zeroes() or the old
bdrv_co_write_zeroes(). The next patches will convert drivers,
then remove the old interface.
Signed-off-by: Eric Blake
---
include/block/block_int.h | 4 ++-
block/io.c
If hardware does not advertise a minimum zero/discard
alignment, we still want to guarantee that the block layer
will align requests to our blocks, rather than the arbitrary
512-byte BDRV sector size.
Signed-off-by: Eric Blake
---
block/iscsi.c | 5 +
1 file changed, 5 insertions(+)
diff --
Another step towards removing sector-based interfaces: convert
the maximum write and minimum alignment values from sectors to
bytes. Rename the variables to let the compiler check that all
users are converted to the new semantics.
The maximum remains an int as long as BDRV_REQUEST_MAX_SECTORS
is
Kevin pointed out that my recent change to byte-based instead
of sector-based blk_write_zeroes() (commit 983a1600) makes life
harder as long as bdrv_write_zeroes is still sector-based, and
where the compiler doesn't flag any change in parameter types.
Complete the conversion, by making all write_ze
On 31/05/16 10:46, Alex Bennée wrote:
> Sergey Fedorov writes:
>
>> On 25/05/16 04:13, Emilio G. Cota wrote:
>>> diff --git a/include/qemu/qht.h b/include/qemu/qht.h
>>> new file mode 100644
>>> index 000..aec60aa
>>> --- /dev/null
>>> +++ b/include/qemu/qht.h
>>> @@ -0,0 +1,183 @@
>> (snip)
>
Could you add a debug printf before that assert statement in the code to
see which format is missing here? So that the default case looks like:
default:
printf("Surface format is: %x\n", surface_format(scon->surface));
g_assert_not_reached();
--
You received this bug notifica
On Wed, Jun 01, 2016 at 11:25:57AM +0200, Kevin Wolf wrote:
> Am 27.05.2016 um 19:33 hat Stefan Hajnoczi geschrieben:
> > On Sat, May 14, 2016 at 03:45:50PM +0300, Denis V. Lunev wrote:
> > > +qemu_co_mutex_lock(&s->lock);
> > > +cluster_offset = \
> > > +qcow2_alloc_compressed_clus
On Wed, Jun 01, 2016 at 03:15:09PM +0200, Paolo Bonzini wrote:
> Suggested-by: Stefan Hajnoczi
> Signed-off-by: Paolo Bonzini
> ---
> hw/scsi/scsi-disk.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Stefan Hajnoczi
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On Wed, Jun 01, 2016 at 09:52:23AM +0800, Fam Zheng wrote:
> Similar to the "!drv || !drv->bdrv_aio_ioctl" case above, here it is
> okay to set co.ret and return. As pointed out by Paolo, a BH will be
> created as necessary by the caller (bdrv_co_maybe_schedule_bh).
> Besides, as pointed out by Kev
On 01/06/16 08:58, xiaoqiang zhao wrote:
> The previous commit e7c9136977cb99c6eb52c9139f7b8d8b5fa87db9
> (hw/char: QOM'ify escc.c) cause qemu-system-ppc/ppc64
> OpenBIOS to freeze on startup, this commit fix it.
>
> Signed-off-by: xiaoqiang zhao
> ---
> hw/char/escc.c | 12 +++-
> 1 fi
On 31/05/16 01:41, David Gibson wrote:
> From: Benjamin Herrenschmidt
>
> We rework the way the MMU indices are calculated, providing separate
> indices for I and D side based on MSR:IR and MSR:DR respectively,
> and thus no longer need to flush the TLB on context changes. This also
> adds corre
On Wed, Jun 01, 2016 at 03:02:56PM +0200, Paolo Bonzini wrote:
> On 01/06/2016 14:28, Gerd Hoffmann wrote:
> > This patch extends the functionality of the max-ram-below-4g option
> > to also allow increasing lowmem. Use case: Give as much memory as
> > possible to legacy non-PAE guests.
> >
> > W
On 23/05/16 13:54, Paolo Bonzini wrote:
> These are replacements for blk_aio_preadv and blk_aio_pwritev that allow
> customization of the data path. They reuse the DMA helpers' DMAIOFunc
> callback type, so that the same function can be used in either the
> QEMUSGList or the bounce-buffered case.
On Wed, Jun 01, 2016 at 02:28:11PM +0200, Gerd Hoffmann wrote:
> This patch extends the functionality of the max-ram-below-4g option
> to also allow increasing lowmem. Use case: Give as much memory as
> possible to legacy non-PAE guests.
>
> While being at it also rework the lowmem calculation lo
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