"Daniel P. Berrange" writes:
> On Thu, Sep 03, 2015 at 07:21:07PM +0200, Andreas Färber wrote:
>> Am 03.09.2015 um 19:09 schrieb Daniel P. Berrange:
>> > On Thu, Sep 03, 2015 at 07:02:25PM +0200, Markus Armbruster wrote:
>> >> Andreas Färber writes:
>> >>
>> >>> Am 03.09.2015 um 18:37 schrieb Ma
Hello!
> > +
> > +#define kvm_gicd_access(s, offset, cpu, val, write) \
> > +kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_DIST_REGS, \
> > + KVM_VGIC_ATTR(offset, cpu), val, write)
> > +
> > +#define kvm_gicc_access(s, offset, cpu, val, write) \
> > +kvm_device_a
Hi! This message is mainly for Peter. I say you reviewed my major sets, but
looks like missed this
one. If it is OK, we could apply it, and i could successfully bring back the
missing part in
vGICv3-enabled hw/arm/virt.c which attaches irqchip to CPUs. This would make us
more ready for TCG
vers
Michael Roth writes:
> Quoting Markus Armbruster (2015-09-03 12:01:20)
>> Michael Roth writes:
>>
>> > Quoting Eric Blake (2015-09-03 09:31:01)
>> >> On 09/03/2015 03:26 AM, Markus Armbruster wrote:
>> >> >>
>> >> >> I think we need to be careful that these descriptions are not
>> >> >> interpr
On Thu, 3 Sep 2015 18:08:42 +0100
Stefan Hajnoczi wrote:
> On Wed, Aug 26, 2015 at 02:55:45PM +0200, Cornelia Huck wrote:
> > On Wed, 26 Aug 2015 13:50:52 +0100
> > Stefan Hajnoczi wrote:
> >
> > > On Tue, Aug 25, 2015 at 12:33:30PM +0200, Pierre Morel wrote:
> > > > -vring_init(&vring->vr,
On Thu, Aug 06, 2015 at 10:57:10AM +0530, Bharata B Rao wrote:
> This sync API will be used by the CPU hotplug code to wait for the CPU to
> completely get removed before flagging the failure to the device_add
> command.
>
> Sync version of this call is needed to correctly recover from CPU
> reali
On Thu, Aug 06, 2015 at 10:57:08AM +0530, Bharata B Rao wrote:
> cpu_exec_init() does vmstate_register and register_savevm for the CPU device.
> These need to be undone from cpu_exec_exit(). These changes are needed to
> support CPU hot removal and also to correctly fail hotplug attempts
> beyond m
On Thu, Aug 06, 2015 at 10:57:07AM +0530, Bharata B Rao wrote:
> CPUState *cpu gets added to the cpus list during cpu_exec_init(). It
> should be removed from cpu_exec_exit().
>
> cpu_exec_init() is called from generic CPU::instance_finalize and some
> archs like PowerPC call it from CPU unrealize
On Thu, Aug 06, 2015 at 10:57:09AM +0530, Bharata B Rao wrote:
> From: Gu Zheng
>
> In order to deal well with the kvm vcpus (which can not be removed without any
> protection), we do not close KVM vcpu fd, just record and mark it as stopped
> into a list, so that we can reuse it for the appendin
On Thu, Sep 03, 2015 at 04:22:22PM +1000, Sam Bobroff wrote:
> On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
>
> [snip]
>
> > Hm.. so why can't the hypervisor code do the retrying?
>
> Aravinda replied to this earlier in the thread:
>
> "Retrying cannot be done internally in h_r
On Fri, Sep 04, 2015 at 12:00:25AM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 03 September 2015 11:52 AM, Sam Bobroff wrote:
> > On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
> >
> > [snip]
> >
> >> Hm.. so why can't the hypervisor code do the retrying?
> >
> > Aravinda re
On Fri, Sep 04, 2015 at 02:51:39PM +1000, David Gibson wrote:
> The device tree presented to pseries machine type guests includes an
> ibm,chip-id property which gives essentially the socket number of each
> vcpu core (individual vcpu threads don't get a node in the device
> tree).
>
> To calculat
On Fri, Aug 28, 2015 at 05:15:20PM +1000, Gavin Shan wrote:
> The patch supports RTAS call "ibm,errinjct" to allow injecting
> EEH errors to VFIO PCI devices. The implementation is similiar
> to EEH support for VFIO PCI devices: The RTAS request is captured
> by QEMU and routed to sPAPRPHBClass::ee
At present, if guest numa nodes are requested, but the cpus in each node
are not specified, spapr just uses the default behaviour or assigning each
vcpu round-robin to nodes.
If smp_threads != 1, that will assign adjacent threads in a core to
different NUMA nodes. As well as being just weird, tha
On Wed, Sep 02, 2015 at 07:29:58PM +1000, Alexey Kardashevskiy wrote:
> For setting debug watchpoints, sPAPR guests use H_SET_MODE hypercall.
> The existing QEMU H_SET_MODE handler does not support this but
> the KVM handler in HV KVM does. However it is not enabled.
>
> This enables the in-kernel
As requested here's an augmented of the patch to stop guest sockets on
the pseries machine type from being split across NUMA nodes. This
adds a new patch to first clean up the socket ID calculation that
exists for creating the ibm,chip-id property.
David Gibson (2):
pseries: Fix incorrect calcu
The device tree presented to pseries machine type guests includes an
ibm,chip-id property which gives essentially the socket number of each
vcpu core (individual vcpu threads don't get a node in the device
tree).
To calculate this, it uses a vcpus_per_socket variable computed as
(smp_cpus / #socke
On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> Fixes flat unions to visit the base's base members (the previous
> commit merely added them to the struct). Same test case.
>
>
> Signed-off-by: Markus Armbruster
> Reviewed-by: Eric Blake
> ---
> scripts/qapi-visit.py | 26
On 09/03/2015 08:03 PM, Eric Blake wrote:
> On 09/03/2015 08:30 AM, Markus Armbruster wrote:
>> qapi/introspect.json defines the introspection schema. It's designed
>> for QMP introspection, but should do for similar uses, such as QGA.
>
> [review in this sub-thread; for comments on 'int' munging
On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> Fixes flat unions to get the base's base members. Test case is from
> commit 2fc0043, in qapi-schema-test.json:
>
>
> Signed-off-by: Markus Armbruster
> Reviewed-by: Eric Blake
> ---
> docs/qapi-code-gen.txt | 51 +++---
>
On 09/03/2015 08:29 AM, Markus Armbruster wrote:
> The QAPI code generators work with a syntax tree (nested dictionaries)
> plus a few symbol tables (also dictionaries) on the side.
>
> Signed-off-by: Markus Armbruster
> Reviewed-by: Eric Blake
> ---
> +class QAPISchemaObjectTypeVariants(objec
On Thu, Sep 03, 2015 at 03:10:52PM -0700, Alistair Francis wrote:
> Bit 15 of the PHY Specific Status Register is reserved and
> should remain 0. Fix the reset value to ensure that the 15th
> bit is not set.
>
> Signed-off-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
> ---
> http://www
On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> qapi/introspect.json defines the introspection schema. It's designed
> for QMP introspection, but should do for similar uses, such as QGA.
[review in this sub-thread; for comments on 'int' munging or other
followups, see other subthread]
There i
Quoting Eric Blake (2015-09-03 15:50:16)
> On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> > qapi/introspect.json defines the introspection schema. It's designed
> > for QMP introspection, but should do for similar uses, such as QGA.
>
> [review to follow in separate message; I'm using this me
Quoting Markus Armbruster (2015-09-03 09:30:21)
> qapi/introspect.json defines the introspection schema. It's designed
> for QMP introspection, but should do for similar uses, such as QGA.
>
> The introspection schema does not reflect all the rules and
> restrictions that apply to QAPI schemata.
On Thu, Sep 3, 2015 at 12:28 AM, Frederic Konrad
wrote:
> On 02/09/2015 23:39, Alistair Francis wrote:
>>
>> On Tue, Jul 21, 2015 at 10:17 AM, wrote:
>>>
>>> From: KONRAD Frederic
>>>
>>> This is the implementation of the DPDMA.
>>>
>>> Signed-off-by: KONRAD Frederic
>>> ---
>>> hw/dma/Makef
On Thu, Sep 3, 2015 at 1:14 PM, Edgar E. Iglesias
wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> target-arm/helper.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-a
We're supposed to abort on transfers like this, unless we fill
Word 125 of our IDENTIFY data with a default transfer size, which
we don't currently do.
This is an ATA error, not a SCSI/ATAPI one.
See ATA8-ACS3 sections 7.17.6.49 or 7.21.5.
If we don't do this, QEMU will loop forever trying to tra
When QEMU starts the RCU thread executes qemu_mutex_lock_thread
causing error "qemu:qemu_cpu_kick_thread: No such process" and exits.
This isn't occur frequently but in glibc the thread id can exist and
this not guarantee that the thread is on active/running state. If is
inserted a sleep(1) after
Thanks for looking into this. We started experimenting with live
migration on 14.04 and stumbled over this bug. As a workaround we've
installed qemu from the Ubuntu Cloud archive
(https://wiki.ubuntu.com/ServerTeam/CloudArchive). I can confirm this
bug is fixed in
qemu-kvm:amd64/trusty-updates
When QEMU starts the RCU thread executes qemu_mutex_lock_thread
causing error "qemu:qemu_cpu_kick_thread: No such process" and exits.
This isn't occur frequently but in glibc the thread id can exist and
this not guarantee that the thread is on active/running state. If is
inserted a sleep(1) after
On 09/03/15 23:25, j...@joshtriplett.org wrote:
> On Thu, Sep 03, 2015 at 07:19:40PM +0200, Laszlo Ersek wrote:
>> In any case, if what you need resembles a "general virtio filesystem",
>> then please just use that -- a virtio-block or virtio-scsi disk, with a
>> normal filesystem on it. The proto
On Thu, Sep 3, 2015 at 1:14 PM, Edgar E. Iglesias
wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> target-arm/helper.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/h
On Thu, Sep 3, 2015 at 1:14 PM, Edgar E. Iglesias
wrote:
> From: "Edgar E. Iglesias"
>
> Log the target EL when taking exceptions. This is useful when
> debugging guest SW or QEMU itself while transitioning through
> the various ELs.
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Fr
Bit 15 of the PHY Specific Status Register is reserved and
should remain 0. Fix the reset value to ensure that the 15th
bit is not set.
Signed-off-by: Alistair Francis
---
http://www.marvell.com/transceivers/assets/Marvell-88E3016-Fast-Ethernet.pdf
hw/net/cadence_gem.c |2 +-
1 files change
On Thu, Sep 03, 2015 at 07:19:40PM +0200, Laszlo Ersek wrote:
> On 09/03/15 18:41, j...@joshtriplett.org wrote:
> > On Thu, Sep 03, 2015 at 05:53:45PM +0200, Laszlo Ersek wrote:
> >> On 09/03/15 16:50, Josh Triplett wrote:
>
> >>> Do you virtualize those I/O ports by CPU, to make them thread-safe,
Long comment from the bug reporter in case anyone isn't following
that bug:
https://bugzilla.redhat.com/show_bug.cgi?id=1248758#c15
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
virt
On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> qapi/introspect.json defines the introspection schema. It's designed
> for QMP introspection, but should do for similar uses, such as QGA.
[review to follow in separate message; I'm using this message to focus
on one point for easier tracking of
On 09/03/2015 08:30 AM, Markus Armbruster wrote:
> 'gen': false needs to stay for now, because netdev_add is still using
> it.
>
> Signed-off-by: Markus Armbruster
> Reviewed-by: Eric Blake
> ---
> +++ b/tests/Makefile
> @@ -228,7 +228,7 @@ check-qapi-schema-y := $(addprefix tests/qapi-schema/,
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/cpu.h| 1 +
target-arm/helper.c | 20 ++--
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cdecfdf..1929a2f 100644
--- a/target-arm/cpu.h
+++
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/cpu.h| 1 +
target-arm/helper.c | 39 ++-
2 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 0ebdaf7..cdecfdf 100644
--- a/tar
From: "Edgar E. Iglesias"
Stage-2 translations, EL2 and EL3 regimes don't have the
EPD control.
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 66b3fed..a53d713 10
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7df1f06..4234e7c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2975,16
From: "Edgar E. Iglesias"
Stage-2 MMU translations do not use TTBR1.
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 9ea9719..66b3fed 100644
--- a/target-arm/helper.c
+++ b/target-
From: "Edgar E. Iglesias"
Stage-2 MMU translations do not have configurable TBI as
the top byte is always 0 (48-bit IPAs).
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
inde
From: "Edgar E. Iglesias"
Log the target EL when taking exceptions. This is useful when
debugging guest SW or QEMU itself while transitioning through
the various ELs.
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper-a64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --gi
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/cpu.h| 1 +
target-arm/helper.c | 34 --
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index ba22e12..0ebdaf7 100644
--- a/target-
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/cpu.h| 1 +
target-arm/helper.c | 28 ++--
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 31825d3..ba22e12 100644
--- a/target-arm/cp
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-arm/helper.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4234e7c..a057a70 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2993,6 +2993,12 @@ static
From: "Edgar E. Iglesias"
Hi,
This is another series with small steps towards EL2 emulation.
Patch 1 is just for debugging convinience.
Patch 2 is a bug-fix.
Patches 3 and on add regs and a few small steps towards 2-stage MMU.
Comments welcome!
Best regards,
Edgar
Edgar E. Iglesias (10):
t
Quoting Markus Armbruster (2015-09-03 12:01:20)
> Michael Roth writes:
>
> > Quoting Eric Blake (2015-09-03 09:31:01)
> >> On 09/03/2015 03:26 AM, Markus Armbruster wrote:
> >> >>
> >> >> I think we need to be careful that these descriptions are not
> >> >> interpreted by clients as an alternativ
On Thu, Sep 03, 2015 at 07:33:17PM +0300, Michael Tokarev wrote:
> 03.09.2015 18:37, Laszlo Ersek wrote:
> []
> > Actually, 6 + 4 + 4 = 14, so OemID and OemTableID. But, you are right, I
> > was working off the commit message & comments only, not the actual
> > amount of bytes copied.
> >
> > This
On Thu, Sep 03, 2015 at 05:37:15PM +0200, Laszlo Ersek wrote:
> On 09/03/15 17:17, Michael Tokarev wrote:
> > 03.09.2015 18:09, Laszlo Ersek wrote:
> >> On 09/02/15 23:32, Michael S. Tsirkin wrote:
> >>> On Wed, Sep 02, 2015 at 08:03:37PM +0100, Richard W.M. Jones wrote:
> When using qemu's in
On Thu, Sep 03, 2015 at 06:47:55PM +0100, Peter Maydell wrote:
> Our changelog for QEMU 2.4 (http://wiki.qemu.org/ChangeLog/2.4)
> currently has a line in it saying
>" * FIXME: virtio 1"
>
> Could somebody familiar with the level of our virtio-1 support
> in 2.4 please fix this, before everybo
On Tue, Aug 18, 2015 at 5:51 PM, Andrey Korolyov wrote:
> "Fixed" with cherry-pick of the
> 7a72f7a140bfd3a5dae73088947010bfdbcf6a40 and its predecessor
> 7103f60de8bed21a0ad5d15d2ad5b7a333dda201. Of course this is not a real
> fix as the only race precondition is shifted/disappeared by a clear
>
On 09/01/2015 10:28 PM, Bharata B Rao wrote:
> On Mon, Aug 24, 2015 at 09:01:51AM +0530, Bharata B Rao wrote:
>> The hash table size allocated to guest depends on the maxmem size.
>> If the host isn't able to allocate the required hash table size but
>> instead allocates less than the optimal reque
On Thu 03 Sep 2015 08:12:27 PM CEST, Peter Maydell
wrote:
> There are two lines in 2.4's changelog (http://wiki.qemu.org/ChangeLog/2.4)
> in the "Block devices in system emulation" section which read:
>
> * FIXME: Throttle groups
Hmm, why is that twice? There was a line about that already earl
On Thursday 03 September 2015 11:52 AM, Sam Bobroff wrote:
> On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
>
> [snip]
>
>> Hm.. so why can't the hypervisor code do the retrying?
>
> Aravinda replied to this earlier in the thread:
>
> "Retrying cannot be done internally in h_re
On 09/03/2015 02:12 PM, Peter Maydell wrote:
> There are two lines in 2.4's changelog (http://wiki.qemu.org/ChangeLog/2.4)
> in the "Block devices in system emulation" section which read:
>
> * FIXME: Throttle groups
>
> and
>
> * FIXME: incremental backup?
>
^ Done.
> Could somebody fill
There are two lines in 2.4's changelog (http://wiki.qemu.org/ChangeLog/2.4)
in the "Block devices in system emulation" section which read:
* FIXME: Throttle groups
and
* FIXME: incremental backup?
Could somebody fill these in with real content before we all forget
what was and wasn't in 2.4?
On Thu, 3 Sep 2015 17:12:29 +0100
Stefan Hajnoczi wrote:
> On Mon, Aug 17, 2015 at 10:09:33AM +0200, Marc Marí wrote:
> > The current module infrastructure has been improved to enable
> > dynamic module loading.
> >
> > This reduces the load time for very simple guests. For the following
> > con
On 24 August 2015 at 08:31, Pavel Fedin wrote:
> This large region is necessary for some devices like ivshmem and video cards
> 32-bit kernels can be built without LPAE support. In this case such a kernel
> will not be able to use PCI controller which has windows in high addresses.
> In order to w
On Thu, 3 Sep 2015 17:33:16 +0100
Stefan Hajnoczi wrote:
> On Mon, Aug 17, 2015 at 10:09:34AM +0200, Marc Marí wrote:
> > +static const struct {
> > +const char *format_name;
> > +const char *protocol_name;
> > +const char *library_name;
> > +bool has_probe;
> > +bool has_prob
On Thursday 03 September 2015 07:32 AM, Paul Mackerras wrote:
> On Sun, Aug 09, 2015 at 03:53:02PM +0200, Alexander Graf wrote:
>>
>>
>> On 07.08.15 05:37, Sam Bobroff wrote:
>>> The RTAS call being discussed in this thread actually has two vectors to
>>> patch
>>> (System Reset and Machine Chec
Our changelog for QEMU 2.4 (http://wiki.qemu.org/ChangeLog/2.4)
currently has a line in it saying
" * FIXME: virtio 1"
Could somebody familiar with the level of our virtio-1 support
in 2.4 please fix this, before everybody forgets exactly what
2.4 did and didn't support?
thanks
-- PMM
The file memory.c directly calls the function pointers provided in
the MemoryRegionOps to handle read and write operations for memory regions.
The function pointers are called without checking if the function
pointers are initialised, therefore, causing QEMU to SIGSEGV when
accessing a memory addre
Am 01.09.2015 um 22:07 schrieb Richard Henderson:
> In ffc6372851d8631a9f9fa56ec613b3244dc635b9, we swapped the guest
> base to the address base register from the address index register.
> Except that 31 in the base slot is SP not XZR, so we need to be
> more intelligent about which reg gets placed
On 2 September 2015 at 02:38, Stefan Brüns wrote:
> Instead of creating a temporary copy for the whole environment and
> the arguments, directly copy everything to the target stack.
>
> For this to work, we have to change the order of stack creation and
> copying the arguments.
>
> Signed-off-by:
On Thu, Sep 03, 2015 at 07:21:07PM +0200, Andreas Färber wrote:
> Am 03.09.2015 um 19:09 schrieb Daniel P. Berrange:
> > On Thu, Sep 03, 2015 at 07:02:25PM +0200, Markus Armbruster wrote:
> >> Andreas Färber writes:
> >>
> >>> Am 03.09.2015 um 18:37 schrieb Markus Armbruster:
> "Daniel P. Ber
On 2 September 2015 at 02:38, Stefan Brüns wrote:
> Signed-off-by: Stefan Brüns
Reviewed-by: Peter Maydell
By the way, for future submissions of patch series with more than
one patch in them, please can you include a cover letter? (ie
what git produces for git format-patch --cover-letter). Som
Am 03.09.2015 um 19:09 schrieb Daniel P. Berrange:
> On Thu, Sep 03, 2015 at 07:02:25PM +0200, Markus Armbruster wrote:
>> Andreas Färber writes:
>>
>>> Am 03.09.2015 um 18:37 schrieb Markus Armbruster:
"Daniel P. Berrange" writes:
> On Wed, Sep 02, 2015 at 06:18:28PM +0200, Andreas Färb
On 09/03/15 18:41, j...@joshtriplett.org wrote:
> On Thu, Sep 03, 2015 at 05:53:45PM +0200, Laszlo Ersek wrote:
>> On 09/03/15 16:50, Josh Triplett wrote:
>>> Do you virtualize those I/O ports by CPU, to make them thread-safe, or
>>> does the last address written to 0x510 get saved system-wide, ma
On 26 August 2015 at 11:28, Pavel Fedin wrote:
> Add gic_version to VirtMachineState, set it to value of the option
> and pass it around where necessary. Instantiate devices and fdt
> nodes according to the choice.
>
> max_cpus for virt machine increased to 126 (calculated from redistributor
> spa
On Thu, Sep 03, 2015 at 07:02:25PM +0200, Markus Armbruster wrote:
> Andreas Färber writes:
>
> > Am 03.09.2015 um 18:37 schrieb Markus Armbruster:
> >> "Daniel P. Berrange" writes:
> >>> On Wed, Sep 02, 2015 at 06:18:28PM +0200, Andreas Färber wrote:
> I had suggested exactly this looong t
On Wed, Aug 26, 2015 at 02:55:45PM +0200, Cornelia Huck wrote:
> On Wed, 26 Aug 2015 13:50:52 +0100
> Stefan Hajnoczi wrote:
>
> > On Tue, Aug 25, 2015 at 12:33:30PM +0200, Pierre Morel wrote:
> > > -vring_init(&vring->vr, virtio_queue_get_num(vdev, n), vring_ptr,
> > > 4096);
> >
> > vring
On Wed, Aug 26, 2015 at 03:14:41PM -0400, Jeff Cody wrote:
> On Wed, Aug 26, 2015 at 08:49:06PM +0200, Peter Lieven wrote:
> > Am 26.08.2015 um 17:31 schrieb Jeff Cody:
> > > On Mon, Aug 24, 2015 at 10:13:16PM +0200, Max Reitz wrote:
> > >> On 24.08.2015 21:34, Peter Lieven wrote:
> > >>> Am 24.08.
Andreas Färber writes:
> Am 03.09.2015 um 18:37 schrieb Markus Armbruster:
>> "Daniel P. Berrange" writes:
>>> On Wed, Sep 02, 2015 at 06:18:28PM +0200, Andreas Färber wrote:
I had suggested exactly this looong time ago, but Anthony opposed it. I
don't quite remember why...
>>>
>>> It
Michael Roth writes:
> Quoting Eric Blake (2015-09-03 09:31:01)
>> On 09/03/2015 03:26 AM, Markus Armbruster wrote:
>> >>
>> >> I think we need to be careful that these descriptions are not
>> >> interpreted by clients as an alternative to the more-specific
>> >> constraints in the QAPI schema th
On 02/09/2015 23:50, Richard Henderson wrote:
> @@ -8821,102 +8840,126 @@ static void gen_cp1 (DisasContext *ctx, uint32_t
> opc, int rt, int fs)
> tcg_temp_free(t0);
> }
>
> -static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
> +static void gen_movci(DisasContext *c
On Thu, Aug 20, 2015 at 10:14:08AM +0200, Peter Lieven wrote:
> the blk_drain_all() that is executed if the guest issues a DMA cancel
> leads to a stuck main loop if the storage backend (e.g. a NFS share)
> is unresponsive.
>
> This scenario is a common case for CDROM images mounted from an
> NFS
Hi Mike,
On Thu, Sep 3, 2015 at 2:27 AM, GitNoviceMikeH
wrote:
> From: GitNoviceMikeH
>
> Most ARM cores switch unconditionally to ARM mode when an exception occurs;
> a few (Cortex) variants have a "Thumb-exception enable" bit in the system
> control register that allows an unconditional switch
On Sep 3, 2015, at 12:26 PM, Markus Armbruster wrote:
> Programmingkid writes:
>
>> On Sep 3, 2015, at 5:46 AM, Markus Armbruster wrote:
>>
>>> Programmingkid writes:
>>>
On Sep 2, 2015, at 10:31 AM, Max Reitz wrote:
> On 31.08.2015 22:33, Programmingkid wrote:
>>
>>
On Wed, Aug 19, 2015 at 03:39:20PM +0800, Jaze Lee wrote:
> Hello,
>
> qemu-img convert -f qcow2 Trove---mysql-5.6---2015-07-16.qcow2 -O raw
> rbd:openstack-00/8205d01a-874c-44c0-b114-1c03821fcc24:conf=/etc/ceph/ceph.conf
>
>How can i specify the object size that rbd uses? I found that t
On Tue, Aug 18, 2015 at 12:45:55PM +0300, Shmulik Ladkani wrote:
> From: Dana Rubin
>
> Validation of l2 header length assumed minimal packet size as
> eth_header + 2 * vlan_header regardless of the actual protocol.
>
> This caused crash for valid non-IP packets shorter than 22 bytes, as
> 'tx_p
On 09/03/15 18:33, Michael Tokarev wrote:
> 03.09.2015 18:37, Laszlo Ersek wrote:
> []
>> Actually, 6 + 4 + 4 = 14, so OemID and OemTableID. But, you are right, I
>> was working off the commit message & comments only, not the actual
>> amount of bytes copied.
>>
>> This ties down both OemID and Oem
On Thu, Sep 03, 2015 at 05:53:45PM +0200, Laszlo Ersek wrote:
> On 09/03/15 16:50, Josh Triplett wrote:
> > On Thu, Sep 03, 2015 at 11:16:40AM +0200, Laszlo Ersek wrote:
> >> Then this payload is passed to the guest firmware (SeaBIOS or OVMF) over
> >> "fw_cfg" (which is a simple protocol, comprisi
Am 03.09.2015 um 18:37 schrieb Markus Armbruster:
> "Daniel P. Berrange" writes:
>> On Wed, Sep 02, 2015 at 06:18:28PM +0200, Andreas Färber wrote:
>>> I had suggested exactly this looong time ago, but Anthony opposed it. I
>>> don't quite remember why...
>>
>> It is a while back now so I don't re
Adding Paolo for additional QOM smarts.
"Daniel P. Berrange" writes:
> On Wed, Sep 02, 2015 at 06:18:28PM +0200, Andreas Färber wrote:
>> Am 26.08.2015 um 14:03 schrieb Daniel P. Berrange:
>> > When there are many instances of a given class, registering
>> > properties against the instance is wa
03.09.2015 18:37, Laszlo Ersek wrote:
[]
> Actually, 6 + 4 + 4 = 14, so OemID and OemTableID. But, you are right, I
> was working off the commit message & comments only, not the actual
> amount of bytes copied.
>
> This ties down both OemID and OemTableId, between all of RSDT, SLIC, and
> FADT. Si
On Mon, Aug 17, 2015 at 10:09:34AM +0200, Marc Marí wrote:
> +static const struct {
> +const char *format_name;
> +const char *protocol_name;
> +const char *library_name;
> +bool has_probe;
> +bool has_probe_device;
> +} block_driver_module[] = {
Why is this list incomplete? I
Programmingkid writes:
> On Sep 3, 2015, at 5:46 AM, Markus Armbruster wrote:
>
>> Programmingkid writes:
>>
>>> On Sep 2, 2015, at 10:31 AM, Max Reitz wrote:
>>>
On 31.08.2015 22:33, Programmingkid wrote:
>
> On Aug 31, 2015, at 4:26 PM, Max Reitz wrote:
[snip]
On 3 September 2015 at 15:46, Stefan Hajnoczi wrote:
> The following changes since commit 561578c2a82292ddf55737791d2838b797f49f35:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150902' into
> staging (2015-09-03 13:05:45 +0100)
>
> are available in the git repository at:
>
>
On Thu, 3 Sep 2015 11:41:57 +0200 Laszlo Ersek wrote:
> Side point:
>
> On 09/03/15 11:16, Laszlo Ersek wrote:
> >
> > I just found the LWN.net article with the title in the subject:
> >
> > http://lwn.net/SubscriberLink/655992/04701db2bbb7e716/
> >
> > ("Thank you LWN", of course. :))
>
> I
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, September 03, 2015 8:54 AM
> To: Josh Triplett
> Cc: edk2-devel-01; qemu devel list; Michael Tsirkin; Igor Mammedov; Marcel
> Apfelbaum; Paolo Bonzini; Shannon Zhao; Moore, Robert; Smith, Jonathan D;
>
Dear All,
As a result of fixing the bug [1] I discovered that QEMU in pure emulation
(TCG) sometimes misses page dirtying on the migration. This is happens at
least in the version 2.0.0 and should, according to the code, be the same
in the master as well.
The reason for that is that only pages mi
On Sun, Aug 09, 2015 at 03:53:02PM +0200, Alexander Graf wrote:
>
>
> On 07.08.15 05:37, Sam Bobroff wrote:
> > The RTAS call being discussed in this thread actually has two vectors to
> > patch
> > (System Reset and Machine Check), and the patches so far only address the
> > Machine Check part.
On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
> On Thu, Sep 03, 2015 at 01:24:21PM +1000, Sam Bobroff wrote:
> > PAPR only says SPRGs 0 to 3 are for software use, but the kernel (see
> > arch/powerpc/include/asm/reg.h) defines SPRG2 as an exception scratch
> > register
> > so it sh
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, September 03, 2015 9:17 AM
> To: Moore, Robert; Josh Triplett
> Cc: edk2-devel-01; qemu devel list; Michael Tsirkin; Igor Mammedov; Marcel
> Apfelbaum; Paolo Bonzini; Shannon Zhao; Smith, Jonathan D; Ja
From: GitNoviceMikeH
Most ARM cores switch unconditionally to ARM mode when an exception occurs;
a few (Cortex) variants have a "Thumb-exception enable" bit in the system
control register that allows an unconditional switch to Thumb mode instead
when handling exceptions. The presence of this bit
On 09/03/2015 08:29 AM, Markus Armbruster wrote:
> The old code prints the result of parsing (list of expression
> dictionaries), and partial results of semantic analysis (list of enum
> dictionaries, list of struct dictionaries).
>
> The new code prints a trace of a schema visit, i.e. what the ba
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