Type error, change smp_cores to nr_cores and change smp_threads to
nr_threads. But using smp_cores can work well. As it is not the same with
explanatory note, so change it.
Signed-off-by: Jun Li
---
target-i386/topology.h | 20
1 file changed, 20 insertions(+)
diff --git a/
On Fri, Dec 13, 2013 at 12:14:31PM +0100, Antonios Motakis wrote:
> This option complements -mem-path. It implies -mem-prealloc. If specified,
> the guest RAM is allocated as a shared memory object. If both -mem-path
> and -mem-share are provided, the memory is allocated from the HugeTLBFS
> suppli
Andreas Färber writes:
> Am 28.11.2013 17:27, schrieb arm...@redhat.com:
>> From: Markus Armbruster
>>
>> Such devices have always been unavailable and omitted from the list of
>> available devices shown by device_add help. Until commit 18b6dad
>> silently broke the former, setting up nasty tr
On 2013年12月16日 14:45, Fam Zheng wrote:
Qemu-iotest 030 was broken.
When the coroutine runs and finishes, it will remove itself from the req
list, so let's use safe version of foreach to avoid use after free.
Signed-off-by: Fam Zheng
---
This one is already applied to Kevin's tree, please ski
commit_active_start is implemented in block/mirror.c, It will create a
job with "commit" type and designated base in block-commit command. This
will be used for committing active layer of device.
Sync mode is removed from MirrorBlockJob because there's no proper type
for commit. The used informati
Factor out commit test common logic into super class, and update test
of committing the active image.
Signed-off-by: Fam Zheng
---
tests/qemu-iotests/040 | 74 ++
1 file changed, 32 insertions(+), 42 deletions(-)
diff --git a/tests/qemu-iotests/04
We support top == active for commit now, remove the check and add an
assertion here.
Signed-off-by: Fam Zheng
Reviewed-by: Kevin Wolf
---
block/commit.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/block/commit.c b/block/commit.c
index d4090cb..acec4ac 100644
--- a
If active is top, it will be mirrored to base, (with block/mirror.c
code), then the image is switched when user completes the block job.
QMP documentation is updated.
Signed-off-by: Fam Zheng
---
block/mirror.c | 11 +++
blockdev.c | 9 +++--
qapi-schema.json | 5 +++--
3
This allows setting the base before entering mirror_run, commit will
make use of it.
Signed-off-by: Fam Zheng
Reviewed-by: Kevin Wolf
---
block/mirror.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/block/mirror.c b/block/mirror.c
index 5b2c119..605dda6 10064
Qemu-iotest 030 was broken.
When the coroutine runs and finishes, it will remove itself from the req
list, so let's use safe version of foreach to avoid use after free.
Signed-off-by: Fam Zheng
---
block/blkdebug.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/bloc
Let reference count manage target and don't call bdrv_close here.
Signed-off-by: Fam Zheng
Reviewed-by: Kevin Wolf
---
block/mirror.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/block/mirror.c b/block/mirror.c
index 6dc27ad..5b2c119 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -48
Previously live commit of active block device is not supported, this series
implements it and updates corresponding qemu-iotests cases.
This series is based on BlockJobType enum QAPI series.
v7: Fix "Since 1.8" to "Since 2.0".
Rebase patch 05 to master.
v6: Address comments from Stefan:
On Mon, 16 Dec 2013 00:04:18 +0100
Andreas Färber wrote:
> Hi,
>
> Am 13.12.2013 22:42, schrieb Antony Pavlov:
> > Also this patch adds initial support for Canon
> > PowerShot A1100 IS compact camera.
> >
> > Signed-off-by: Antony Pavlov
> > ---
> > hw/arm/Makefile.objs | 1 +
> > hw/arm/di
On 2013年12月16日 14:28, Fam Zheng wrote:
On 2013年12月14日 11:10, Eric Blake wrote:
On 11/25/2013 10:45 PM, Fam Zheng wrote:
If active is top, it will be mirrored to base, (with block/mirror.c
code), then the image is switched when user completes the block job.
QMP documentation is updated.
Signed
On 2013年12月14日 11:10, Eric Blake wrote:
On 11/25/2013 10:45 PM, Fam Zheng wrote:
If active is top, it will be mirrored to base, (with block/mirror.c
code), then the image is switched when user completes the block job.
QMP documentation is updated.
Signed-off-by: Fam Zheng
---
+++ b/qapi-sc
On 2013年12月14日 02:26, Kevin Wolf wrote:
Am 26.11.2013 um 06:45 hat Fam Zheng geschrieben:
If active is top, it will be mirrored to base, (with block/mirror.c
code), then the image is switched when user completes the block job.
QMP documentation is updated.
Signed-off-by: Fam Zheng
---
block
As Peter's suggestion, mv this patch to file target-i386/topology.h. If
someone has any good idea, please give me a commit in the followings.
Thanks.
---
target-i386/topology.h | 20
1 file changed, 20 insertions(+)
diff --git a/target-i386/topology.h b/target-i386/topology.h
On 12/06/2013 09:33 AM, Michael Roth wrote:
> From: Tyrel Datwyler
>
> This uses extension of existing EPOW interrupt/event mechanism
> to notify userspace tools like librtas/drmgr to handle
> in-guest configuration/cleanup operations in response to
> device_add/device_del.
>
> Userspace tools t
On 12/06/2013 09:33 AM, Michael Roth wrote:
> From: Nathan Fontenot
>
> This extends the data structures currently used to report EPOW events to
> gets via the check-exception RTAS interfaces to also include event types
> for hotplug/unplug events.
>
> This is currently undocumented and being fi
On 12/06/2013 09:33 AM, Michael Roth wrote:
> From: Tyrel Datwyler
>
> We don't actually rely on this interface to surface hotplug events, and
> instead rely on the similar-but-interrupt-driven check-exception RTAS
> interface used for EPOW events. However, the existence of this interface
> is ne
On 12/16/2013 01:59 PM, Alexey Kardashevskiy wrote:
> On 12/06/2013 09:32 AM, Michael Roth wrote:
>> From: Nathan Fontenot
>>
>> This add entries to the root OF node to advertise our PHBs as being
>> DR-capable in according with PAPR specification.
>>
>> Each PHB is given a name of PHB, advertised
the first bad commit is:
commit 6887581728c9eddf858e7458b6eacbfe3ac68302
Author: Gerd Hoffmann
Date: Fri Sep 20 15:34:27 2013 +0200
roms: add 'make clean'
Signed-off-by: Gerd Hoffmann
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscrib
Public bug reported:
Environment:
Host OS (ia32/ia32e/IA64):ia32e
Guest OS (ia32/ia32e/IA64):ia32e
Guest OS Type (Linux/Windows):linux
kvm.git Commit:d6d63b51fe3bfea0cf596993afa480b0b3b02c32
qemu.git Commit:8f84271da83c0e9f92aa7c1c2d0d3875bf0a5cb8
Host Kernel Version:3.13.0-rc1
Hardwa
On 12/06/2013 09:33 AM, Michael Roth wrote:
> From: Mike Day
>
> This enables hotplug for PHB bridges. Upon hotplug we generate the
> OF-nodes required by PAPR specification and IEEE 1275-1994
> "PCI Bus Binding to Open Firmware" for the device.
>
> We associate the corresponding FDT for these n
Public bug reported:
Environment:
Host OS (ia32/ia32e/IA64):ia32e
Guest OS (ia32/ia32e/IA64):ia32e
Guest OS Type (Linux/Windows):windows
kvm.git Commit:d6d63b51fe3bfea0cf596993afa480b0b3b02c32
qemu.git Commit:a1d22a367d5780c9553b2cd5a24f665534ce6ed6
Host Kernel Version:3.13.0-rc1
Hard
the first bad commit is:
commit 6eefccc0bb9c34051b1e21880fc3a1c1c8686edd
Author: Gerd Hoffmann
Date: Mon Dec 2 13:01:20 2013 +0100
roms: update vgabios binaries
This also switches from lgplvgabios to seavgabios.
Signed-off-by: Gerd Hoffmann
--
You received this bug notification
On 12/06/2013 09:32 AM, Michael Roth wrote:
> From: Mike Day
>
> Signed-off-by: Mike Day
> Signed-off-by: Michael Roth
> ---
> hw/ppc/spapr_pci.c | 93
>
> include/hw/ppc/spapr.h | 28 +++
> 2 files changed, 121 insertions(+
Peter Crosthwaite writes:
> On Mon, Dec 16, 2013 at 7:02 AM, Anthony Green wrote:
>> Andreas Färber writes:
>>
The Marin SoC currently runs on two boards: the Nexys3 (Xilinx) and DE-2
(Altera). They are pretty much identical from the software side of
things.
>
> Ok but do they h
于 2013/12/16 10:55, Wenchao Xia 写道:
于 2013/12/13 21:36, Eric Blake 写道:
On 11/12/2013 06:44 PM, Wenchao Xia wrote:
Signed-off-by: Wenchao Xia
---
+++ b/tests/qapi-schema/qapi-schema-test.json
@@ -93,3 +93,15 @@
'*u16' : [ 'uint16' ],
'*i64x': 'int' ,
'*u64x': 'uint6
On 12/06/2013 09:32 AM, Michael Roth wrote:
> From: Nathan Fontenot
>
> Signed-off-by: Nathan Fontenot
> Signed-off-by: Michael Roth
> ---
> hw/ppc/spapr_pci.c | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 10
On 12/06/2013 09:32 AM, Michael Roth wrote:
> From: Nathan Fontenot
>
> This add entries to the root OF node to advertise our PHBs as being
> DR-capable in according with PAPR specification.
>
> Each PHB is given a name of PHB, advertised as a PHB type,
> and associated with a power domain of -1
于 2013/12/13 21:36, Eric Blake 写道:
On 11/12/2013 06:44 PM, Wenchao Xia wrote:
Signed-off-by: Wenchao Xia
---
+++ b/tests/qapi-schema/qapi-schema-test.json
@@ -93,3 +93,15 @@
'*u16' : [ 'uint16' ],
'*i64x': 'int' ,
'*u64x': 'uint64' } }
+
+# testing event
+{ 'type':
于 2013/12/13 21:31, Eric Blake 写道:
On 11/12/2013 06:44 PM, Wenchao Xia wrote:
Nested structure is not supported now, so following define is not valid:
{ 'event': 'EVENT_C',
'data': { 'a': { 'a_a', 'str', 'a_b', 'str' }, 'b': 'int' }
But what IS valid? You need to document this in docs/qapi
于 2013/12/13 21:43, Kevin Wolf 写道:
Am 13.12.2013 um 14:31 hat Eric Blake geschrieben:
On 11/12/2013 06:44 PM, Wenchao Xia wrote:
+++ b/scripts/qapi-event.py
@@ -0,0 +1,355 @@
+#
+# QAPI event generator
+#
+# Copyright IBM, Corp. 2013
+#
+# Authors:
+# Wenchao Xia
+#
+# This work is licensed u
于 2013/12/13 21:44, Eric Blake 写道:
On 12/08/2013 08:43 PM, Wenchao Xia wrote:
convert -s snapshot.name=name1
Previous I planned to use -l for internal snapshot in all possible
program, since -s is taken as external snapshot in qemu, qemu-nbd.
Consistency in command line options between
于 2013/12/14 7:50, Eric Blake 写道:
On 12/10/2013 10:48 PM, Wenchao Xia wrote:
After this patch, hidden enum type BlockdevOptionsKind will not
be generated, and other API can use enum BlockdevDriver.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
qapi-schema.json | 14 +-
On Mon, Dec 16, 2013 at 4:07 AM, Michael S. Tsirkin wrote:
> On Sun, Dec 15, 2013 at 06:56:48PM +0100, Andreas Färber wrote:
>> Am 15.12.2013 06:59, schrieb Peter Crosthwaite:
>> > Ping!
>> >
>> > I'm trying to figure out what way I want to go here.
>> >
>> > On Sat, Dec 7, 2013 at 12:49 AM, Peter
On Mon, Dec 16, 2013 at 3:56 AM, Andreas Färber wrote:
> Am 15.12.2013 06:59, schrieb Peter Crosthwaite:
>> Ping!
>>
>> I'm trying to figure out what way I want to go here.
>>
>> On Sat, Dec 7, 2013 at 12:49 AM, Peter Maydell
>> wrote:
>>> On 3 December 2013 13:19, Andreas Färber wrote:
Am
From: Antony Pavlov
If hivecs are being used on reset, the CPU should come out of reset at
the hivecs reset vector (0x)
Signed-off-by: Antony Pavlov
[ PC Changes:
* Fixed Grammar error in commit message
* Elaborated commit message.
]
Signed-off-by: Peter Crosthwaite
---
target-arm/
From: Antony Pavlov
Add an ARM CPU property for the reset value of hivecs as it is a
board/SoC configurable setting.
The existence of the property is conditional on the ARM CPU not being M
class.
Signed-off-by: Antony Pavlov
[ PC Changes:
* Elaborated commit message
* refactored to use qdev_
GIC_BASE_ADDR is not the base address of the GIC. Its clear from the
code that this is the base address of the MPCore. Rename to
MPCORE_PERIPHBASE accordingly.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v2: Fixed broken comment (PMM review)
hw/arm/highbank.c
Fix the CBAR initialisation by using the newly defined static property.
Zynq will now correctly init the CBAR to the SCU base address.
Needed to boot Linux on the xilinx_zynq machine model.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error report rather
Fix the CBAR initialisation by using the newly defined static property.
CBAR is now set before realization, so the intended value is now
actually used.
So I have kind of tested this. I booted an ARM kernel on Highbank with
the stock Highbank DTB. It doesn't boot (and I will be doing something
wron
To allow the machine model to set device properties before CPU
realization.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error report rather than fprintf(stderr
hw/arm/xilinx_zynq.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
dif
The reset value of the CP15 CBAR is a vendor (machine) configurable
property. If ARM_FEATURE_CBAR is set, add it as a property at
post_init time.
Signed-off-by: Peter Crosthwaite
---
Changed since v4:
Re-implemented as qdev property.
Removed PMM reviewed-by (major implementation changes)
Changed
To allow the machine model to set device properties before CPU
realization.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error_report rather than fprintf(stderr
hw/arm/highbank.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff -
Some processors (notably A9 within Highbank) define and use the
CP15 configuration base address (CBAR). This is vendor specific
so its best implemented as a CPU property (otherwise we would need
vendor specific child classes for every ARM implementation).
This patch prepares support for converting
The cp15.c15 space is implementation defined. Currently there is a
dummy placeholder register RAZing it. Allow overriding of this RAZ
so implementations of specific registers can take precedence.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
target-arm/helper.c | 3 ++-
1 fil
Hi All,
This patch series adds support for two board configurable ARM CPU
properties - Configuration Base Address Register and the
hivecs-on-reset.
The CBAR is needed to fix Zynq and Highbank which both were broken for
linux boot. This series provides the fixes.
I have added these properties as
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
default-configs/arm-softmmu.mak |2 +
hw/timer/Makefile.objs |2 +
hw/timer/allwinner-a10-pit.c | 254 ++
include/hw/timer/allwinner-a10-pit.h | 58
4 files ch
lay a foundation for allwinner A10 SoC with a cortex-a8
processor, and will add more devices later.
v2: split timer and interrupt controller emulation into
their corresponding files.
v3:
1. change loader_start address
2. add 64-bit counter
3. fixup fail to clear interrup status i
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
default-configs/arm-softmmu.mak |1 +
hw/arm/Makefile.objs|1 +
hw/arm/allwinner-a10.c | 103 +++
include/hw/arm/allwinner-a10.h | 35 +
4 files changed, 140
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
default-configs/arm-softmmu.mak |1 +
hw/intc/Makefile.objs |1 +
hw/intc/allwinner-a10-pic.c | 200 +++
include/hw/intc/allwinner-a10-pic.h |
Signed-off-by: liguang
---
MAINTAINERS |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3e61ac8..73bb943 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,13 @@ F: *win32*
ARM Machines
+Allwinner-a10
+M: Li Gua
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
hw/arm/Makefile.objs |2 +-
hw/arm/cubieboard.c | 69 ++
tests/qom-test.c |1 +
3 files changed, 71 insertions(+), 1 deletions(-)
create mode 100644 hw/arm/cubieboard.c
diff
From: Peter Maydell
Add support for defining a vmstate field which is an array
of pointers to structures, and use this to define a
VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state*
to be used by devices.
Signed-off-by: Peter Maydell
Signed-off-by: liguang
---
include/hw/ptimer.h
Antony Pavlov wrote:
On Fri, 13 Dec 2013 09:19:08 +0800
liguang wrote:
Signed-off-by: liguang
Reviewed-by: Peter Crosthwaite
---
default-configs/arm-softmmu.mak |2 +
hw/timer/Makefile.objs |2 +
hw/timer/allwinner-a10-pit.c | 254 +++
On Sat, Dec 7, 2013 at 12:41 AM, Peter Maydell wrote:
> On 3 December 2013 07:01, Peter Crosthwaite
> wrote:
>> The reset Value of the CP15 CBAR is a vendor (machine) configurable
>
> no need to capitalize "value" here.
>
>> property. If ARM_FEATURE_CBAR is set, add it as a property at
>> post_in
+Andreas
On Mon, Dec 16, 2013 at 10:48 AM, Peter Crosthwaite
wrote:
> On Mon, Dec 16, 2013 at 12:59 AM, Anthony Green wrote:
>>
>> This patch adds the Marin UART device.
>>
>> Signed-off-by: Anthony Green
>> ---
>> default-configs/moxie-softmmu.mak | 1 +
>> hw/char/Makefile.objs
On Mon, Dec 16, 2013 at 12:59 AM, Anthony Green wrote:
>
> This patch adds the Marin UART device.
>
> Signed-off-by: Anthony Green
> ---
> default-configs/moxie-softmmu.mak | 1 +
> hw/char/Makefile.objs | 1 +
> hw/char/marin-uart.c | 200
>
On Mon, Dec 16, 2013 at 7:02 AM, Anthony Green wrote:
> Andreas Färber writes:
>
>>> The Marin SoC currently runs on two boards: the Nexys3 (Xilinx) and DE-2
>>> (Altera). They are pretty much identical from the software side of
>>> things.
Ok but do they have the same peripheral set? We had th
On Mon, Dec 16, 2013 at 5:26 AM, Anthony Green wrote:
> Peter Maydell writes:
>
>> On 15 December 2013 18:51, Andreas Färber wrote:
>>> And since this is purely in target-moxie I would suggest to simply send
>>> a pull as target maintainer once you have someone trustworthy's
>>> Reviewed-by and
Hi,
Am 13.12.2013 22:42, schrieb Antony Pavlov:
> Also this patch adds initial support for Canon
> PowerShot A1100 IS compact camera.
>
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/Makefile.objs | 1 +
> hw/arm/digic_boards.c | 84
> +++
> 2 f
Am 27.11.2013 23:28, schrieb Igor Mammedov:
> Igor Mammedov (16):
> target-i386: cleanup 'foo' feature handling'
> target-i386: cleanup 'foo=val' feature handling
Thanks, I've queued these on qom-cpu-next:
https://github.com/afaerber/qemu-cpu/commits/qom-cpu-next
> target-i386: cpu: convert
On Sat, 14 Dec 2013 16:41:44 +1000
Peter Crosthwaite wrote:
> On Sat, Dec 14, 2013 at 7:42 AM, Antony Pavlov
> wrote:
> > Signed-off-by: Antony Pavlov
> > ---
> > hw/arm/digic.c | 28 +
> > hw/timer/Makefile.objs | 1 +
> > hw/timer/digic-timer.c | 168
> >
Am 16.07.2013 00:25, schrieb Igor Mammedov:
> Igor Mammedov (20):
> target-i386: Move hyperv_* static globals to X86CPU
This one had been applied in modified form separately.
> target-i386: convert 'hv_spinlocks' to static property
> target-i386: convert 'hv_relaxed' to static property
>
Am 03.12.2013 16:41, schrieb Paolo Bonzini:
> Hervé Poussineau (1):
> qom: detect bad reentrance during object_class_foreach
>
> Paolo Bonzini (1):
> qom: do not register interface "types" in the type table
Thanks, applied to qom-next:
https://github.com/afaerber/qemu-cpu/commits/qom-next
An
Am 04.12.2013 06:51, schrieb Peter Crosthwaite:
> On Wed, Dec 4, 2013 at 1:42 AM, Paolo Bonzini wrote:
>> From: Hervé Poussineau
>>
>> We should not modify the type hash table while it is being iterated on.
>> Assert that it does not happen.
>>
>> Signed-off-by: Hervé Poussineau
>> Signed-off-by
On 15 December 2013 20:55, Andreas Färber wrote:
> Since you're mentioned by name, should I wait for you to review the
> three OMAP parts?
There's nothing particularly omap-specific in them.
I kind of think this whole thing is backwards anyway:
we should really say "the user can only instantiate
Am 29.11.2013 10:43, schrieb arm...@redhat.com:
> From: Markus Armbruster
>
> Pointer properties can be set only by code, not by device_add. A
> device with a pointer property can't work with device_add only unless
> the property may remain null. cannot_instantiate_with_device_add_yet
> needs t
Andreas Färber writes:
>> The Marin SoC currently runs on two boards: the Nexys3 (Xilinx) and DE-2
>> (Altera). They are pretty much identical from the software side of
>> things. Marin currently provides the UART, PIC, 7 segment display and
>> timer devices, as well as various memory controlle
Peter,
Am 29.11.2013 10:43, schrieb arm...@redhat.com:
> From: Markus Armbruster
>
> Pointer properties can be set only by code, not by device_add. A
> device with a pointer property can work with device_add only when the
> property may remain null.
>
> This is the case for property "interrupt
Am 02.12.2013 09:52, schrieb Marcel Apfelbaum:
> On Sun, 2013-12-01 at 16:14 +0100, Andreas Färber wrote:
>> The alternative BTW is dropping all those pointer properties and
>> replacing them with link<> properties. Paolo tried that for the OMAP
>> timers once but I fear that series was never picke
Am 28.11.2013 17:26, schrieb arm...@redhat.com:
> Markus Armbruster (10):
> qdev: Replace no_user by cannot_instantiate_with_device_add_yet
> sysbus: Set cannot_instantiate_with_device_add_yet
> cpu: Document why cannot_instantiate_with_device_add_yet
> apic: Document why cannot_instantiate
Am 28.11.2013 17:27, schrieb arm...@redhat.com:
> From: Markus Armbruster
>
> Such devices have always been unavailable and omitted from the list of
> available devices shown by device_add help. Until commit 18b6dad
> silently broke the former, setting up nasty traps for unwary users,
> like thi
Am 28.11.2013 17:26, schrieb arm...@redhat.com:
> diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
> index 146f50a..ed0477b 100644
> --- a/hw/core/sysbus.c
> +++ b/hw/core/sysbus.c
> @@ -257,6 +257,13 @@ static void sysbus_device_class_init(ObjectClass *klass,
> void *data)
> DeviceClass *k =
Am 13.12.2013 02:36, schrieb Edgar E. Iglesias:
> On Wed, Nov 27, 2013 at 08:27:33PM -0800, Peter Crosthwaite wrote:
>> The object-cast and class-cast caches cannot be shared because class
>> caching is conditional on the target type not being an interface and
>> object caching is unconditional. Le
Hi,
Am 15.12.2013 13:48, schrieb Anthony Green:
> Peter Crosthwaite writes:
>> On Sun, Dec 15, 2013 at 1:59 PM, Anthony Green wrote:
>>> diff --git a/hw/moxie/marin.c b/hw/moxie/marin.c
>>> new file mode 100644
>>> index 000..0a998e4
>>> --- /dev/null
>>> +++ b/hw/moxie/marin.c
>>> @@ -0,0 +
Am 15.12.2013 13:48, schrieb Anthony Green:
> Peter Crosthwaite writes:
>> On Sun, Dec 15, 2013 at 1:59 PM, Anthony Green wrote:
>>> diff --git a/hw/moxie/marin.c b/hw/moxie/marin.c
>>> new file mode 100644
>>> index 000..0a998e4
>>> --- /dev/null
>>> +++ b/hw/moxie/marin.c
[...]
>>> +static
Peter Maydell writes:
> On 15 December 2013 18:51, Andreas Färber wrote:
>> And since this is purely in target-moxie I would suggest to simply send
>> a pull as target maintainer once you have someone trustworthy's
>> Reviewed-by and it doesn't break `make check`, similar to how it's done
>> for
On 15 December 2013 18:51, Andreas Färber wrote:
> Am 15.12.2013 05:10, schrieb Anthony Green:
>> This patch still needs to be applied. There was some follow-up
>> discussion on this patch back in May, but none of it negates the fact
>> that this patch needs to be applied.
>
> It introduces a tab
Hi,
Am 15.12.2013 05:10, schrieb Anthony Green:
>
> This patch still needs to be applied. There was some follow-up
> discussion on this patch back in May, but none of it negates the fact
> that this patch needs to be applied.
It introduces a tab, please fix.
Apart from that I believe I reporte
On Sun, Dec 15, 2013 at 06:56:48PM +0100, Andreas Färber wrote:
> Am 15.12.2013 06:59, schrieb Peter Crosthwaite:
> > Ping!
> >
> > I'm trying to figure out what way I want to go here.
> >
> > On Sat, Dec 7, 2013 at 12:49 AM, Peter Maydell
> > wrote:
> >> On 3 December 2013 13:19, Andreas Färbe
Am 15.12.2013 06:59, schrieb Peter Crosthwaite:
> Ping!
>
> I'm trying to figure out what way I want to go here.
>
> On Sat, Dec 7, 2013 at 12:49 AM, Peter Maydell
> wrote:
>> On 3 December 2013 13:19, Andreas Färber wrote:
>>> Am 03.12.2013 07:59, schrieb Peter Crosthwaite:
Currently the
Am 14.12.2013 07:53, schrieb Peter Crosthwaite:
> On Fri, Dec 13, 2013 at 10:44 PM, Igor Mammedov wrote:
>> From: Hervé Poussineau
>>
>> We should not modify the type hash table while it is being iterated on.
>> Assert that it does not happen.
>>
>> Signed-off-by: Hervé Poussineau
>> Signed-off-
Signed-off-by: Antony Pavlov
---
hw/arm/digic_boards.c | 70 +++
1 file changed, 70 insertions(+)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 87a9c4b..217c506 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -2
Signed-off-by: Antony Pavlov
Reviewed-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
---
hw/arm/digic.c | 16
hw/char/Makefile.objs| 1 +
hw/char/digic-uart.c | 195 +++
include/hw/arm/digic.h | 2 +
include
Signed-off-by: Antony Pavlov
Reviewed-by: Peter Crosthwaite
---
hw/arm/digic.c | 28 +++
hw/timer/Makefile.objs | 1 +
hw/timer/digic-timer.c | 163 +
include/hw/arm/digic.h | 6 ++
include/hw/timer/digic-ti
Also this patch adds initial support for Canon
PowerShot A1100 IS compact camera.
Signed-off-by: Antony Pavlov
---
hw/arm/Makefile.objs | 1 +
hw/arm/digic_boards.c | 84 +++
2 files changed, 85 insertions(+)
create mode 100644 hw/arm/digic_boar
DIGIC is Canon Inc.'s name for a family of SoC
for digital cameras and camcorders.
There is no publicly available specification for
DIGIC chips. All information about DIGIC chip
internals is based on reverse engineering efforts
made by CHDK (http://chdk.wikia.com) and
Magic Lantern (http://www.mag
Signed-off-by: Antony Pavlov
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7f45d1d..1fce9a5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -233,6 +233,12 @@ S: Supported
F: hw/arm/highbank.c
F: hw/net/xgmac.c
+Canon DIGIC
+M: Antony P
[PATCH v9 1/6] hw/arm: add very initial support for Canon DIGIC SoC
[PATCH v9 2/6] hw/arm/digic: prepare DIGIC-based boards support
[PATCH v9 3/6] hw/arm/digic: add timer support
[PATCH v9 4/6] hw/arm/digic: add UART support
[PATCH v9 5/6] hw/arm/digic: add NOR ROM support
[PATCH v9 6/6] MAINTAINER
On 12/14/13 15:21, Don Slutz wrote:
On 12/09/13 08:22, Paolo Bonzini wrote:
Il 09/12/2013 13:47, Don Slutz ha scritto:
On 12/05/13 22:20, Don Slutz wrote:
On 12/05/13 16:24, Richard Henderson wrote:
On 12/06/2013 04:18 AM, Paolo Bonzini wrote:
$ gcc -shared -o f.so f.c -fPIE -fPIC
/usr/bin/l
And here is the base SoC support...
Signed-off-by: Anthony Green
---
hw/moxie/Makefile.objs | 2 +-
hw/moxie/marin.c | 166 +
2 files changed, 167 insertions(+), 1 deletion(-)
create mode 100644 hw/moxie/marin.c
diff --git a/hw/moxie/Mak
This patch adds the Marin UART device.
Signed-off-by: Anthony Green
---
default-configs/moxie-softmmu.mak | 1 +
hw/char/Makefile.objs | 1 +
hw/char/marin-uart.c | 200 ++
3 files changed, 202 insertions(+)
create mode 100644 hw
I've broken my recent submission into two patches and incorporated
feedback from Peter's review. Here they come...
Anthony Green (2):
Add UART for Moxie Marin SoC
Add Marin SoC support
default-configs/moxie-softmmu.mak | 1 +
hw/char/Makefile.objs | 1 +
hw/char/marin-uart.
Why not add "protected" then for the fields that are only
meant to be accessible by the implementation but not
public ?
On Sun, Dec 15, 2013 at 1:51 AM, Peter Crosthwaite <
peter.crosthwa...@xilinx.com> wrote:
> On Sun, Dec 15, 2013 at 9:42 AM, Peter Maydell
> wrote:
> > On 14 December 2013 23:
Peter - thank you for taking the time to review my patch. Comments
below.
Peter Crosthwaite writes:
> Hi Anthony,
>
> On Sun, Dec 15, 2013 at 1:59 PM, Anthony Green wrote:
>>
>> This adds initial support for the Marin SoC, including the SoC's uart
>> interface.
>>
>>
>> Signed-off-by: Anthony
Richard Henderson writes:
> Strict search-and-replace, since the moxie port does nothing complicated.
>
> Cc: Anthony Green
> Signed-off-by: Richard Henderson
> ---
> target-moxie/translate.c | 52
>
> 1 file changed, 26 insertions(+), 26 delet
On Sun, 15 Dec 2013 09:06:30 +1000
Peter Crosthwaite wrote:
> On Sat, Dec 14, 2013 at 6:26 AM, Antony Pavlov
> wrote:
> > Hi, Andreas!
> >
> > Here is a quote from http://wiki.qemu.org/QOMConventions
> >
> >> a FooClass structure definition containing at least the parent class
> >> field:
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