On Mon, Sep 19, 2011 at 09:41:41AM -0500, Michael Roth wrote:
> OVERVIEW
>
> This patch series implements a QEMUFile Visitor class that's intended to
> abstract away direct calls to qemu_put_*/qemu_get_* for save/load functions.
> Currently this is done by always creating a
> QEMUFileInputVisit
On 2 October 2011 19:56, Andreas Färber wrote:
> I've been looking into adding support for Cortex-R4F.
Ooh, that will be the first R profile core. In particular the only
other non-M-profile PMSA core we support is the 946 which was a v5
core, so you'll need to check that we actually implement v7
On 02/10/11 5:28 PM, Brad wrote:
On 26/09/11 2:57 PM, Brad wrote:
configure: Detect predefined compiler symbols for ARM and HPPA
To be able to detect some ARM / HPPA based architectures such as with
OpenBSD/(armish / zaurus) or OpenBSD/hppa.
Signed-off-by: Brad Smith
ping.
nm. looking now
On 26/09/11 2:57 PM, Brad wrote:
configure: Detect predefined compiler symbols for ARM and HPPA
To be able to detect some ARM / HPPA based architectures such as with
OpenBSD/(armish / zaurus) or OpenBSD/hppa.
Signed-off-by: Brad Smith
ping.
---
configure |8 +++-
1 files changed,
Thanks, pulled.
On Sun, Oct 2, 2011 at 2:32 PM, Avi Kivity wrote:
> Please pull from
>
> git://github.com/avikivity/qemu memory/core
>
> to get the new 'info mtree' command, which is a great debugging aid.
>
> Blue Swirl (1):
> memory: simple memory tree printer
>
> Jan Kiszka (3):
> memory: P
On Sun, Oct 02, 2011 at 04:21:47PM -0400, Stefan Berger wrote:
>
> >4) Implement the BERVisitor and make this the default migration protocol.
> >
> >Most of the work will be in 1), though with the implementation in this
> >series we should be able to do it incrementally. I'm not sure if the best
On Sun, Oct 02, 2011 at 04:12:14PM -0400, Stefan Berger wrote:
> On 10/02/2011 07:38 AM, Michael S. Tsirkin wrote:
> >On Wed, Sep 28, 2011 at 09:22:55AM -0400, Stefan Berger wrote:
> >>The following series of patches adds TPM (Trusted Platform Module) support
> >>to Qemu. An emulator for the TIS (T
On Sun, Oct 2, 2011 at 8:41 PM, Avi Kivity wrote:
>> >
>> >
>> > Would not this corruption also happen on real hardware? If reset
>> > to the disk controller is delayed by a slow gate or extra
>> > capacitance on a line?
>>
>> Maybe, but the delays are probably too short on real HW before any
>>
On Sun, Oct 2, 2011 at 8:39 PM, Avi Kivity wrote:
>
>
> - Original Message -
>> On Sun, Oct 2, 2011 at 8:21 PM, Avi Kivity wrote:
>> >> >
>> >> > What I'm saying is that RESET order isn't defined on real
>> >> > hardware
>> >> > either, due to signal propagation effects.
>> >>
>> >> Yes,
On 2 October 2011 17:35, Andreas Färber wrote:
> The command line option is called -kernel, not -kenrel.
>
> Cc: Paul Brook
> Signed-off-by: Andreas Färber
Reviewed-by: Peter Maydell
-- PMM
> >
> >
> > Would not this corruption also happen on real hardware? If reset
> > to the disk controller is delayed by a slow gate or extra
> > capacitance on a line?
>
> Maybe, but the delays are probably too short on real HW before any
> packets are sent or disk gets written. On QEMU, I/O can be
- Original Message -
> On Sun, Oct 2, 2011 at 8:21 PM, Avi Kivity wrote:
> >> >
> >> > What I'm saying is that RESET order isn't defined on real
> >> > hardware
> >> > either, due to signal propagation effects.
> >>
> >> Yes, but there the millions of reset cycles help immensely to
> >>
On Sun, Oct 2, 2011 at 8:31 PM, Avi Kivity wrote:
>
>> >
>> > In fact these aren't problems. The packet may be sent or data
>> > written, as long as they aren't corrupted. A device is allowed to
>> > "delay" a reset (but not indefinitely).
>>
>> Oh, but corruption could easily happen. Consider f
> >
> > In fact these aren't problems. The packet may be sent or data
> > written, as long as they aren't corrupted. A device is allowed to
> > "delay" a reset (but not indefinitely).
>
> Oh, but corruption could easily happen. Consider for example a disk
> controller waiting for DMA ready signa
On Sun, Oct 2, 2011 at 8:21 PM, Avi Kivity wrote:
>> >
>> > What I'm saying is that RESET order isn't defined on real hardware
>> > either, due to signal propagation effects.
>>
>> Yes, but there the millions of reset cycles help immensely to
>> suppress
>> the effects.
>>
>
> That's modeled corre
On Sun, Oct 2, 2011 at 8:17 PM, Avi Kivity wrote:
>> >
>> > It doesn't help. There is propagation delay there as well. If the
>> > input wins the race against reset, the launch sequence is started.
>>
>> To bring the example back to QEMU, a disk write could be issued or
>> network packet could b
4) Implement the BERVisitor and make this the default migration protocol.
Most of the work will be in 1), though with the implementation in this series
we should be able to do it incrementally. I'm not sure if the best approach is
doing the mechanical phase 1 conversion, then doing phase 2 so
> >
> > What I'm saying is that RESET order isn't defined on real hardware
> > either, due to signal propagation effects.
>
> Yes, but there the millions of reset cycles help immensely to
> suppress
> the effects.
>
That's modeled correctly. After the end of phase 1, everything is settled.
Du
On Sun, Oct 2, 2011 at 8:14 PM, Avi Kivity wrote:
>> >
>> > Say the target device's output has an AND connecting #RESET and an
>> > input, to the output. When #RESET is asserted, the input is
>> > driven low. The output is connected to a counter.
>> >
>> > When #RESET is asserted, the source dev
> >
> > It doesn't help. There is propagation delay there as well. If the
> > input wins the race against reset, the launch sequence is started.
>
> To bring the example back to QEMU, a disk write could be issued or
> network packet could be sent. But still, this only confirms that
> during the i
> >
> > Say the target device's output has an AND connecting #RESET and an
> > input, to the output. When #RESET is asserted, the input is
> > driven low. The output is connected to a counter.
> >
> > When #RESET is asserted, the source device's A and B are raised
> > high, with delay Da and Db.
On 10/02/2011 07:38 AM, Michael S. Tsirkin wrote:
On Wed, Sep 28, 2011 at 09:22:55AM -0400, Stefan Berger wrote:
The following series of patches adds TPM (Trusted Platform Module) support
to Qemu. An emulator for the TIS (TPM Interface Spec) interface is
added that provides the basis for accessi
On Sun, Oct 2, 2011 at 8:03 PM, Avi Kivity wrote:
>> >
>> > It still has propagation delay. If your XNOR gate connects to the
>> > NORAD master launch controller, your design may have side effects.
>>
>> Hopefully the reset signal would control also the edge triggered
>> launch controller.
>
> It
On Sun, Oct 2, 2011 at 7:58 PM, Avi Kivity wrote:
>> >
>> > There is no way to guarantee this. If A is driven high before the
>> > target device detects RESET, it will see the edge.
>>
>> That case is not what we have here, it would be equivalent of pulsing
>> qemu_irq reset lines for each device
> >
> > It still has propagation delay. If your XNOR gate connects to the
> > NORAD master launch controller, your design may have side effects.
>
> Hopefully the reset signal would control also the edge triggered
> launch controller.
It doesn't help. There is propagation delay there as well. I
On Sun, Oct 2, 2011 at 7:52 PM, Avi Kivity wrote:
>
>
> - Original Message -
>> On Sun, Oct 2, 2011 at 7:44 PM, Avi Kivity wrote:
>> >> >
>> >> > A real device also ignores inputs during reset (or if it
>> >> > doesn't,
>> >> > we can just emulate that).
>> >>
>> >> Maybe this could work:
> >
> > There is no way to guarantee this. If A is driven high before the
> > target device detects RESET, it will see the edge.
>
> That case is not what we have here, it would be equivalent of pulsing
> qemu_irq reset lines for each device in order. This would be even
> worse than what we have n
- Original Message -
> On Sun, Oct 2, 2011 at 7:44 PM, Avi Kivity wrote:
> >> >
> >> > A real device also ignores inputs during reset (or if it
> >> > doesn't,
> >> > we can just emulate that).
> >>
> >> Maybe this could work:
> >> 1 - issue start of reset cycle (raise qemu_irq, unrealiz
On Sun, Oct 2, 2011 at 7:47 PM, Avi Kivity wrote:
>> >> For example, outputs A and B should both be driven high by reset.
>> >> They
>> >> are connected to a XNOR gate, whose output is fed to edge
>> >> triggered
>> >> device. The device should not see any edges outside of the reset
>> >> cycle, d
> >
> > Why not use an ordinary qemu_irq? It reresents a pin; 0->1 edge
> > (assert) enters phase 1, 1->0 edge (deassert) enters phase 2.
> > Exactly like real hardware.
>
> QEMU makes no difference between power-on reset and system reset
> right
> now. At least I am not aware of any device mod
On Sun, Oct 2, 2011 at 7:44 PM, Avi Kivity wrote:
>> >
>> > A real device also ignores inputs during reset (or if it doesn't,
>> > we can just emulate that).
>>
>> Maybe this could work:
>> 1 - issue start of reset cycle (raise qemu_irq, unrealize): internal
>> states reset, no I/O.
>> 2 - issue s
On 2011-10-02 21:07, Avi Kivity wrote:
>>>
>>> The way to fix it is two-phase reset:
>>>
>>> phase 1: reset internal state (-> move all outputs to reset
>>> values),
>>> don't sample inputs yet
>>> phase 2: allow sampling inputs
>>
>> As far as I understood Anthony's QOM plans, phase 1 will corresp
> >> For example, outputs A and B should both be driven high by reset.
> >> They
> >> are connected to a XNOR gate, whose output is fed to edge
> >> triggered
> >> device. The device should not see any edges outside of the reset
> >> cycle, during reset cycle they are ignored.
> >>
> >
> > I don't
Chris Webb writes:
> I'm trying to get bridge-mode communication between a macvtap and a host
> macvlan working correctly, but I think I must be doing something wrong as
> the host macvlan and guest macvtap apparently can't communicate. I'm aware
> that the underlying eth0 interface can't communi
> >
> > A real device also ignores inputs during reset (or if it doesn't,
> > we can just emulate that).
>
> Maybe this could work:
> 1 - issue start of reset cycle (raise qemu_irq, unrealize): internal
> states reset, no I/O.
> 2 - issue start of I/O, reset held (new phase): evaluate inputs and
>
On Sun, Oct 2, 2011 at 7:35 PM, Avi Kivity wrote:
>> >
>> > Can you give an example? Can be theoretical, doesn't have to refer
>> > to real hardware.
>>
>> For example, outputs A and B should both be driven high by reset.
>> They
>> are connected to a XNOR gate, whose output is fed to edge trigge
On Sun, Oct 2, 2011 at 7:20 PM, Avi Kivity wrote:
>
>
> - Original Message -
>> On Sun, Oct 2, 2011 at 4:56 PM, Avi Kivity wrote:
>> > On 10/01/2011 10:31 AM, Blue Swirl wrote:
>> >>
>> >> Therefore it is incorrect to perform any qemu_irq activities
>> >> during
>> >> reset (also VM resto
> >
> > Can you give an example? Can be theoretical, doesn't have to refer
> > to real hardware.
>
> For example, outputs A and B should both be driven high by reset.
> They
> are connected to a XNOR gate, whose output is fed to edge triggered
> device. The device should not see any edges outside
On Sun, Oct 2, 2011 at 7:08 PM, Avi Kivity wrote:
>> > phase 1: reset internal state (-> move all outputs to reset
>> > values), don't
>> > sample inputs yet
>>
>> This solves the problem of old state accidentally interfering with
>> reset state.
>>
>> > phase 2: allow sampling inputs
>>
>> This c
- Original Message -
> On Sun, Oct 2, 2011 at 4:56 PM, Avi Kivity wrote:
> > On 10/01/2011 10:31 AM, Blue Swirl wrote:
> >>
> >> Therefore it is incorrect to perform any qemu_irq activities
> >> during
> >> reset (also VM restore like the original example), don't you
> >> agree?
> >
> >
On Sun, Oct 2, 2011 at 7:07 PM, Avi Kivity wrote:
>> >
>> > The way to fix it is two-phase reset:
>> >
>> > phase 1: reset internal state (-> move all outputs to reset
>> > values),
>> > don't sample inputs yet
>> > phase 2: allow sampling inputs
>>
>> As far as I understood Anthony's QOM plans, p
On Sun, Oct 2, 2011 at 4:56 PM, Avi Kivity wrote:
> On 10/01/2011 10:31 AM, Blue Swirl wrote:
>>
>> Therefore it is incorrect to perform any qemu_irq activities during
>> reset (also VM restore like the original example), don't you agree?
>
> It is not incorrect. Real hardware updates outputs on
> > phase 1: reset internal state (-> move all outputs to reset
> > values), don't
> > sample inputs yet
>
> This solves the problem of old state accidentally interfering with
> reset state.
>
> > phase 2: allow sampling inputs
>
> This could lead to incorrect state for complex networks. It woul
> >
> > The way to fix it is two-phase reset:
> >
> > phase 1: reset internal state (-> move all outputs to reset
> > values),
> > don't sample inputs yet
> > phase 2: allow sampling inputs
>
> As far as I understood Anthony's QOM plans, phase 1 will correspond
> to
> "unrealize", phase 2 to "re
On Sun, Oct 2, 2011 at 4:39 PM, Avi Kivity wrote:
> On 09/28/2011 09:01 PM, Blue Swirl wrote:
>>
>> On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka
>> wrote:
>> > As we clearly modify the PIC state on pic_reset, we also have to update
>> > the IRQ output. This only happened on init so far. Apply t
On Sun, Oct 2, 2011 at 4:27 PM, Jan Kiszka wrote:
> On 2011-10-01 09:31, Blue Swirl wrote:
>> On Sat, Oct 1, 2011 at 6:47 AM, Jan Kiszka wrote:
>>> On 2011-09-30 22:47, Blue Swirl wrote:
That part of the discussion is obsolete (or at least uninteresting
here). For example this message h
Glue "cortex-r4" to r1p4, the latest available TRM.
Cc: Peter Maydell
Signed-off-by: Andreas Färber
---
target-arm/cpu.h|1 +
target-arm/helper.c | 14 ++
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 6ab780d..f0a
Hello Peter,
I've been looking into adding support for Cortex-R4F.
1) Currently, -cpu is used to look up a Main ID Register value and to base
feature decisions on that. This doesn't work for Cortex-R4 and Cortex-R4F,
which have an identical MIDR but only -R4F has the FPU.
Re-checking the model st
All CPU-dependent initializations are currently done based on MIDR.
Cortex-R4F shares the MIDR with Cortex-R4 though. Therefore consider the
CPU model string, too (which is not cleared on reset).
Cc: Peter Maydell
Signed-off-by: Andreas Färber
---
target-arm/helper.c | 35
Am 02.10.2011 20:06, schrieb TusharK:
> I tried executing QEMU (realview-smp ARM11MPCore) with Linux kernel
> 2.6.39.3, but it failed. Kernel itself is not getting decompressed.
Which command line? Any output?
Andreas
On Sun, Oct 2, 2011 at 2:20 PM, Avi Kivity wrote:
> 3917149 gives me this:
>
> [root@westmere-ep arm-test]# gdb --args qemu-system-arm -kernel
> zImage.integrator -initrd arm_root.img
> GNU gdb (GDB) Fedora (7.3-41.fc15)
> Copyright (C) 2011 Free Software Foundation, Inc.
> License GPLv3+: GNU GPL
Hello,
I tried executing QEMU (realview-smp ARM11MPCore) with Linux kernel 2.6.39.3,
but it failed. Kernel itself is not getting decompressed. I compiled the kernel
with realview-smp_config and build was successful. Can you please let me know
how can test QEMU + ARM11MPcore combination.
Th
On 2011-10-02 18:39, Avi Kivity wrote:
> On 09/28/2011 09:01 PM, Blue Swirl wrote:
>> On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka
>> wrote:
>> > As we clearly modify the PIC state on pic_reset, we also have to
>> update
>> > the IRQ output. This only happened on init so far. Apply this
>> > co
Hi :)
Don't forget to cc qemu-devel too next time :)
On Sun, Oct 2, 2011 at 21:43, Maurizio Caloro wrote:
> After "git" the new source i don't realy found any solution, but changing the
> lines now Qmue0.15.0 running also in me Netbsd G4 Mac. Proparly this change
> are only "*BSD" conform and
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index ecc5375..cdfed29 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -151,11 +151,12 @@ ISADevice *isa_create(ISABus *bus, const char *
On 10/02/2011 04:31 PM, Alon Levy wrote:
On Sun, Oct 02, 2011 at 03:24:36PM +0200, Alon Levy wrote:
> Hi,
>
Converting qemu's ram allocation to a mmap and using remap_file_pages seems
like it could work. Any ideas why it wouldn't?
It's linux-specific. Also, does it work on anonymous memory?
Signed-off-by: Hervé Poussineau
---
hw/cs4231a.c |2 +-
hw/fdc.h |4 ++--
hw/gus.c |2 +-
hw/ide.h |2 +-
hw/ide/isa.c |4 ++--
hw/isa-bus.c |8
hw/isa.h |6 +++---
hw/m48t59.c|5 +++--
hw/
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 4a95834..2f9ad24 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -60,10 +60,11 @@ void isa_bus_new(ISABus *bus, ISABusOps *ops, Dev
On 10/02/2011 06:42 PM, Jan Kiszka wrote:
From: Jan Kiszka
There is a circular dependency between memory.h and ioport.h /wrt type
definitions now. Resolve it by pushing MemoryRegion and
MemoryRegionPortio typedefs into qemu-common.h.
Yuck. I'll just change PortioList to say 'struct MemoryRe
Use ISA bus from given device instead of global ISA bus
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 2f9ad24..ab8dbe9 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -117,18
On 10/01/2011 10:31 AM, Blue Swirl wrote:
Therefore it is incorrect to perform any qemu_irq activities during
reset (also VM restore like the original example), don't you agree?
It is not incorrect. Real hardware updates outputs on RESET assertion,
and real hardware deals with devices enterin
This method can be used later to remove the isa_mem_base variable.
Signed-off-by: Hervé Poussineau
---
hw/isa-bridge.c |7 +++
hw/isa-bus.c| 13 -
hw/isa.h|6 ++
3 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/hw/isa-bridge.c b/hw/isa-bri
This error was reported by cppcheck.
Signed-off-by: Stefan Weil
---
console.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/console.c b/console.c
index 6dfcc47..e43de92 100644
--- a/console.c
+++ b/console.c
@@ -1538,7 +1538,7 @@ int text_console_init(QemuOpts *opts,
Remove code which is now dead
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c | 60 +++
hw/isa.h |2 +-
hw/mips_jazz.c |2 +-
hw/mips_r4k.c |2 +-
hw/pc_piix.c |2 +-
hw/ppc_prep.c |2 +-
6 files changed, 13 i
Signed-off-by: Hervé Poussineau
---
hw/i8254.c |2 +-
hw/ide.h | 12
hw/ide/piix.c | 30 ++
hw/ide/via.c | 18 ++
hw/isa-bus.c |6 +++---
hw/isa.h |4 ++--
hw/mips_fulong2e.c |
From: Jan Kiszka
There is a circular dependency between memory.h and ioport.h /wrt type
definitions now. Resolve it by pushing MemoryRegion and
MemoryRegionPortio typedefs into qemu-common.h.
Signed-off-by: Jan Kiszka
---
ioport.h |3 ---
memory.h |2 --
qemu-common.h |2
This patch should be reverted once i8259 is qdevified
Signed-off-by: Hervé Poussineau
---
hw/i8259.c | 29 +++--
1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/hw/i8259.c b/hw/i8259.c
index e5323ff..9af2bbb 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -4
Signed-off-by: Hervé Poussineau
---
hw/mips_malta.c |4 +---
hw/pc.h |2 +-
hw/piix4.c | 37 +++--
3 files changed, 37 insertions(+), 6 deletions(-)
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 1ec1228..67e666d 100644
--- a/hw/mips_
Signed-off-by: Hervé Poussineau
---
hw/sun4u.c | 37 +++--
1 files changed, 31 insertions(+), 6 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index cdf15ff..d8b8054 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -38,6 +38,7 @@
#include "loader.h"
#include "e
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index ab8dbe9..f01dfb2 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -22,7 +22,6 @@
#include "isa.h"
#include "exec-memory.h"
-sta
On 09/28/2011 09:01 PM, Blue Swirl wrote:
On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka wrote:
> As we clearly modify the PIC state on pic_reset, we also have to update
> the IRQ output. This only happened on init so far. Apply this
> consistently.
Nack, IRQ lines shouldn't be touched on rese
The command line option is called -kernel, not -kenrel.
Cc: Paul Brook
Signed-off-by: Andreas Färber
---
target-arm/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index cc1a3d2..2273492 100644
--- a/target-arm/helper.
Signed-off-by: Hervé Poussineau
---
hw/mips_fulong2e.c |9 ++---
hw/vt82c686.c | 31 +--
hw/vt82c686.h |2 +-
3 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index 04921c1..3034a9c 100644
Signed-off-by: Hervé Poussineau
---
arch_init.c| 10 +-
arch_init.h|2 +-
hw/adlib.c |2 +-
hw/audiodev.h |8
hw/cs4231a.c |2 +-
hw/gus.c |2 +-
hw/mips_jazz.c |5 +++--
hw/pc.h|2 +-
hw/pc_piix.c |4 ++--
hw/pcsp
This allows future implementations of real pci-isa bridges
Signed-off-by: Hervé Poussineau
---
Makefile.objs |2 +-
hw/isa-bridge.c | 85 ++
hw/isa-bus.c| 93 ---
hw/isa.h|
On 2011-10-01 09:31, Blue Swirl wrote:
> On Sat, Oct 1, 2011 at 6:47 AM, Jan Kiszka wrote:
>> On 2011-09-30 22:47, Blue Swirl wrote:
>>> That part of the discussion is obsolete (or at least uninteresting
>>> here). For example this message has a relevant example:
>>> http://lists.nongnu.org/archiv
Signed-off-by: Hervé Poussineau
---
hw/pc.h |2 +-
hw/pc_piix.c |3 ++-
hw/piix_pci.c | 45 -
3 files changed, 43 insertions(+), 7 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index c546037..746973f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@
Following patches aim to change ISA bus to a first-citizen class in Qemu.
They add ISA bus ops, like for scsi and usb buses.
Current ISA bridges (PIIX3, PIIX4, EBUS and VT82C686) are converted
to this new API, and a simple 'isabus-bridge' device is added.
isa_address_space() operation can probab
Signed-off-by: Hervé Poussineau
---
hw/isa-bus.c |2 +-
hw/isa.h |2 +-
hw/mips_jazz.c |2 +-
hw/mips_r4k.c |2 +-
hw/pc_piix.c |2 +-
hw/piix4.c |2 +-
hw/piix_pci.c |2 +-
hw/ppc_prep.c |2 +-
hw/sun4u.c |2 +-
hw/vt82c686.c |2 +-
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/serial.c | 145 +--
1 files changed, 31 insertions(+), 114 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index 2e6d212..310bfde 100644
--- a
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/ppc405.h| 22 --
hw/ppc405_boards.c |8
hw/ppc405_uc.c | 30 --
3 files changed, 32 insertions(+), 28 deletions(-)
diff --git
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_timer.c | 31 ---
1 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_timer.c b/hw/etraxfs_timer.c
index b08e574..57dc739 100644
--- a/hw/et
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_ser.c | 33 ++---
1 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_ser.c b/hw/etraxfs_ser.c
index 0036037..298b985 100644
--- a/hw/etraxf
From: Peter Maydell
Signed-off-by: Peter Maydell
Signed-off-by: Avi Kivity
---
hw/smc91c111.c | 29 +
1 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/hw/smc91c111.c b/hw/smc91c111.c
index 3a8a85c..fc8c498 100644
--- a/hw/smc91c111.c
+++ b/hw/smc91
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-uart.c | 33 +
1 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-uart.c b/hw/milkymist-uart.c
index e8e309d..128cd8c 100644
--- a/hw/milkymi
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/ppc440.c| 11 +--
hw/ppc440.h|6 +++---
hw/ppc440_bamboo.c |5 -
3 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 1d13
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_dma.c | 43 +++
1 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index d3082ac..94bfb70 100644
--- a
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-vgafb.c | 33 -
1 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/hw/milkymist-vgafb.c b/hw/milkymist-vgafb.c
index 2e55e42..be81abd 100644
--- a/hw/milk
From: Fabien Chouteau
This patch converts mpic to the new memory API (through old mmio).
Signed-off-by: Fabien Chouteau
Signed-off-by: Avi Kivity
---
hw/openpic.c | 207 ++--
hw/openpic.h |4 +-
hw/ppce500_mpc8544ds.c |2
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-memcard.c | 32
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-memcard.c b/hw/milkymist-memcard.c
index 22dc377..fb6e558 100644
--- a/hw
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-hpdmc.c | 32
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-hpdmc.c b/hw/milkymist-hpdmc.c
index c0962fb..17c840f 100644
--- a/hw/milky
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-pfpu.c | 33 -
1 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/hw/milkymist-pfpu.c b/hw/milkymist-pfpu.c
index 306d1ce..672f6e4 100644
--- a/hw/milkymi
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_eth.c | 30 --
1 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/hw/etraxfs_eth.c b/hw/etraxfs_eth.c
index 48de6dc..246a279 100644
--- a/hw/etraxfs_e
From: Michael Walle
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-sysctl.c | 32
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-sysctl.c b/hw/milkymist-sysctl.c
index 7b2d544..5783f08 100644
--- a/hw/mi
From: Richard Henderson
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in
many of the callers.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c | 14 --
hw/mips_malta.c |7 ++-
hw/musicpal.c| 14 ++--
From: Richard Henderson
All callers passed 1.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c |4 ++--
hw/mips_malta.c |2 +-
hw/musicpal.c|4 ++--
hw/omap_uart.c |4 ++--
hw/pc.h |3 +-
From: Michael Walle
Be consistent with other milkymist models.
Signed-off-by: Michael Walle
Signed-off-by: Avi Kivity
---
hw/milkymist-minimac2.c |4 ++--
hw/milkymist-softusb.c |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/milkymist-minimac2.c b/hw/milky
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/gumstix.c |7 +--
hw/mainstone.c |2 +-
hw/pxa.h |7 +--
hw/pxa2xx.c| 10 +-
hw/spitz.c |4 +++-
hw/tosa.c |4 +++-
hw/z2.c|4 +++-
7
On Sun, Oct 02, 2011 at 03:24:36PM +0200, Alon Levy wrote:
> Hi,
>
Converting qemu's ram allocation to a mmap and using remap_file_pages seems
like it could work. Any ideas why it wouldn't?
Alon
> I'm trying to acheive the $subject. Some background: currently spice relies
> on a preallocated
From: Jan Kiszka
Useful to discover eclipses.
Signed-off-by: Jan Kiszka
Signed-off-by: Avi Kivity
---
memory.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/memory.c b/memory.c
index a85d118..eae67be 100644
--- a/memory.c
+++ b/memory.c
@@ -1316,18 +1316,20 @@
1 - 100 of 137 matches
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