> > > > > > Would not this corruption also happen on real hardware? If reset > > to the disk controller is delayed by a slow gate or extra > > capacitance on a line? > > Maybe, but the delays are probably too short on real HW before any > packets are sent or disk gets written. On QEMU, I/O can be > instantaneous. >
Right, this is a real difference. If any hardware actually depends on this, we can model it by launching a timer instead of issuing the I/O. When the reset arrives to the disk controller, it will cancel the timer. This is expensive both to code and in run-time performance, but we can afford the expense since we don't have such a case, yes?
