[Mesa-dev] [wip 2/2] i965/gen7+ Remove tile_x and tile_y dependency in BLORP

From: Abdiel Janulgue GEN7+-specific hw-support. This can be copied over to GEN8/Broadwell with few modifications. v2 (Topi): I looked into the piglit failures and compared the surface setup logic into "gen7_update_texture/renderbuffer_surface()". Here are some of my findings: Use the 'is_rend

[Mesa-dev] [wip 1/2] i965/blorp: allow clear programs to use surface types other than 2D

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_blorp.h | 5 + src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 13 + 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers

[Mesa-dev] [PATCH 1/2] i965/blorp: patch jump counters also for endif

No known bugs fixed but this is now in line with fs-generator. No regresssions on IVB. CC: Paul Berry Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 ++ src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp | 6 +++--- 2 files changed, 5 insertions

[Mesa-dev] [PATCH 2/2] i965/blorp: use BRW_COMPRESSION_2NDHALF for second half LPR

No known bugs fixed but this is now in line with fs-generator. No regresssions on IVB. CC: Paul Berry Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 46 ++ .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 24 +-- 2 files

[Mesa-dev] Two small blorp fixes found during refactoring

These are not known to have caused any problems but they would get fixed when switching into fs-generator. Both fixes need corresponding patching of the unit tests and fixing them aforehand makes the switch possible without any changes in the tests. Topi Pohjolainen (2): i965/blorp: patch jump

[Mesa-dev] [v2 03/23] i965: rename tex_ms to tex_cms

Prepares for the introduction of non-compressed multi-sampled lookup used in the blorp programs. v2: now also taking into account gen8 Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry (v1) --- src/mesa/drivers/dri/i965/brw_defines.h | 2 +- src/mesa/drivers/dri/i965

[Mesa-dev] [v2 14/23] i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 24 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 06/23] i965/blorp: move emission of rt-write into eu-emitter

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 15 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 18 ++ src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 5 + 3 files changed, 28 insertions

[Mesa-dev] [v2 10/23] i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)

In addition, the two special cases requiring explicit execution size control are wrapped manually. Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 68 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 12

[Mesa-dev] [v2 12/23] i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)

In addition, the special case requiring explicit execution size control is wrapped manually. Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 34 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 16

[Mesa-dev] [v2 16/23] i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 18 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 17/23] i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src

[Mesa-dev] [v2 05/23] i965/blorp: move emission of texture lookup into eu-emitter

Resolving of the hardware message type is moved into the emitter also in preparation for switching to use fs_generator. The generator wants to translate the high level op-code into the message type and hence the emitter needs to know the original op-code. Signed-off-by: Topi Pohjolainen Reviewed

[Mesa-dev] [v2] Blorp blit compiler to use FS LIR

(earlier the gen8 generators were not upstreamed yet) and finally the fixes and improvements suggested by Paul. Topi Pohjolainen (23): i965/blorp: introduce separate eu-emitter for blit compiler i965/blorp: move emission of pixel kill into eu-emitter i965: rename tex_ms to tex_cms i965/fs

[Mesa-dev] [v2 13/23] i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 24 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 22/23] i965/fs: add support for BRW_OPCODE_AVG in fs_generator

Needed for compiling blorp blit programs. Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 11/23] i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 78 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 46 insertions(+), 39 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 19/23] i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitter

v2 (Paul): renamed emit_if() to emit_cmp_if() Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 18 ++ 2 files changed, 23 insertions(+), 9 deletions

[Mesa-dev] [v2 09/23] i965/blorp: wrap emission of if-equal-assignment

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 30 ++- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 12 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 04/23] i965/fs: introduce non-compressed equivalent of tex_cms

v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8 Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry (v1) --- src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 + src/mesa/drivers/dri/i965/brw_shader.cpp|

[Mesa-dev] [v2 02/23] i965/blorp: move emission of pixel kill into eu-emitter

The combination of four separate comparison operations and and the masked "and" require special treatment when moving to FS LIR. Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 28 +++-- src/mesa/driver

[Mesa-dev] [v2 07/23] i965/blorp: move emission of sample combining into eu-emitter

v2 (Paul): pass the combining opcode as an argument to emit_combine(). This keeps manual_blend_average() selfcontained documentation wise. Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry (v1) --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 14

[Mesa-dev] [v2 18/23] i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [v2 15/23] i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 48 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 2 files changed, 31 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 20/23] i965/fs: allow unit tests to dump the final patched assembly

)' is run (the default dump of the fs_generator does this before). v2 (Paul): dropped the redundant 'dump_enabled' argument Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_fs.h | 5 +++-- src/mesa/drivers/dri/i965/brw_f

[Mesa-dev] [v2 01/23] i965/blorp: introduce separate eu-emitter for blit compiler

Prepares for presenting blorp blit programs using FS IR that allows EU-assembly generation using i965 glsl-compiler backend (fs_generator). v2: rebased on top of endif-jump counter fix (moving the added brw_set_uip_jip() into the emitter) Signed-off-by: Topi Pohjolainen Reviewed-by: Paul

[Mesa-dev] [v2 08/23] i965/blorp: wrap emission of conditional assignment

Signed-off-by: Topi Pohjolainen Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 --- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 11 +++ 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 23/23] i965/blorp: switch eu-emitter to use FS IR and fs_generator

separate refactoring patch which is not really needed anymore as the lrp logic got refactored when the original lrp logic got fixed). - pass 'BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX' to the generator in fs_inst::target instead of hardcoding it CC: Paul Berry Signed-of

[Mesa-dev] [v2 21/23] i965/fs: introduce blorp specific rt-write for fs_generator

update the binding tables associated with the compiler bookkeeping (this in fact gets thrown away as the blorp compiler sets the program data in its own way). v2 (Paul): do not hardcode the binding table index but use fs_inst::target instead. Signed-off-by: Topi Pohjolainen --- src/mesa

[Mesa-dev] [PATCH] i965/blorp: do not use unnecessary hw-blending support

NOTE: This is a candidate for the 9.1 branch. CC: Ian Romanick CC: Kenneth Graunke CC: Martin Steigerwald Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 20 1 file changed, 20 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp

[Mesa-dev] Map W-tiled as linear instead of as Y-tiled for i965-blorp

dy experimented with the former using bits from my earlier series, and it passes the simple sampling tests we have in piglit just fine. No regression seen on IVB and SNB. Topi Pohjolainen (20): i965/blorp: Single sample stencil msaa i965/blorp: Use program to offset W-tiled into correct leve

[Mesa-dev] [PATCH 16/20] i965/fs: Add support for W-tiled to linear coordinate translation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 8 +++ src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 93 2 files changed, 101 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 03/20] i965/blorp: Drop unnecessary tile offset calculator

Now that blorp program offsets w-tiled internally, the surface setup support is not needed anymore. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 26 -- src/mesa/drivers/dri/i965/brw_blorp.h| 2 -- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 10/20] i965/fs: Split LIR emission ouf of ir-visitor

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_fs.cpp | 44 --- src/mesa/drivers/dri/i965/brw_fs.h | 53 - src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 110

[Mesa-dev] [PATCH 09/20] i965: Merge fail() for ir visitors

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 30 src/mesa/drivers/dri/i965/brw_fs.h | 2 -- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +- src/mesa/drivers/dri/i965/brw_shader.cpp | 38

[Mesa-dev] [PATCH 14/20] i965/fs: Add support for W-tiled coordinate swizzling

--- src/mesa/drivers/dri/i965/brw_fs.h | 4 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 23 +++ 2 files changed, 27 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 26e5545..a30351d 100644 --- a/src/me

[Mesa-dev] [PATCH 08/20] i965: Merge common members of visitors

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 19 --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 19 --- src/mesa/drivers/dri/i965/brw_shader.cpp | 18 +- src/mesa/drivers/dri/i965/brw_shader.h

[Mesa-dev] [PATCH 01/20] i965/blorp: Single sample stencil msaa

Instead of relying on the sampler engine, use the existing sample coordinate encoding scheme and fetch samples as if the surface is single sampled. One unit test gets dropped as it is not compatible anymore. --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 12 +- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 06/20] i965: Merge max_grf between stage compilers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h| 2 -- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 1 - src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 12/20] i965/blorp: Use fs_emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 340 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 28 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 110 +--- 3 files changed, 189 insertions(+), 289 deletions(-) diff

[Mesa-dev] [PATCH 19/20] i965: Expose the linear offset calculation of W-tiled stencil

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 20/20] i965/blorp: Translate w-tiling into linear instead of into Y-tiling

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 10 ++-- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 90 +++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 10 +--- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 10 +--- 4 files

[Mesa-dev] [PATCH 17/20] i965/blorp: Increase the scope for the coordinate accessors

These will be used in the main dispatcher of the compiler. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 34 ++-- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 02/20] i965/blorp: Use program to offset W-tiled into correct level/layer

fice as it could land anywhere within a W-tile. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 4 ++- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 41 +--- 2 files changed, 40 insertions(+), 5 deletions(-) diff --git a/src/mesa/driver

[Mesa-dev] [PATCH 07/20] i965/vec4: Use unsigned instead of signed for visitor uniform count

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 ++-- src/mesa/drivers/dri/i965/brw_vec4.h | 4 ++-- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_vec4_vp.cpp | 2 +- 4 files changed, 11

[Mesa-dev] [PATCH 11/20] i965/fs: Move emission of ALUs into fs_emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 89 src/mesa/drivers/dri/i965/brw_fs.h | 63 ++-- src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 88 +++ 3 files changed, 120

[Mesa-dev] [PATCH 15/20] i965/fs: Add support for linear to W-tiled coordinate translation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 8 +++ src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 86 2 files changed, 94 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 18/20] i965/blorp: Add source and destination strides into push constants

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 4 +++- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h

[Mesa-dev] [PATCH 05/20] i965: Merge memory context allocation for shader visitors

Such like fs_visitor the dynamic data generated by vec4_visitor does not have lifecycle longer than the visitor itself. Hence it can be taken cared of by the common base. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 -- src/mesa/drivers/dri

[Mesa-dev] [PATCH 13/20] i965/fs: Add generator support for simd16 math as 2x simd8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index e590bdf..27f49d2 100644 --- a

[Mesa-dev] [PATCH 04/20] i965: Split emitter out of backend_visitor

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_cfg.cpp| 8 src/mesa/drivers/dri/i965/brw_cfg.h | 4 ++-- src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp | 6 +++--- src/mesa/drivers/dri/i965/brw_dead_control_flow.h| 2

[Mesa-dev] [PATCH 09/13] meta: Refactor binding of renderbuffer as texture image

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.h | 7 src/mesa/drivers/common/meta_blit.c | 70 + 2 files changed, 47 insertions(+), 30 deletions(-) diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h

[Mesa-dev] Meta path for gen8 stencil

I have the corresponding bits also for gen6-7, but there is a little work left in that front. Passes all the relevant piglit tests on bdw. Topi Pohjolainen (13): i965: Allow stencil to be used for sampling and as render target i965/wm: Surface state overrides for configuring w-tiled as y

[Mesa-dev] [PATCH 06/13] i965: Extend brw_get_rb_for_first_slice() for specified level/layer

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 4 src/mesa/drivers/dri/i965/brw_meta_updownsample.c | 13 + 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 03/13] i965/gen8: Use helper variables for surface parameters

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 66b9879..cc55bd9 100644 --- a

[Mesa-dev] [PATCH 01/13] i965: Allow stencil to be used for sampling and as render target

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 5907dd9..7ffa5c4 100644 --- a

[Mesa-dev] [PATCH 10/13] meta: Refactor configuration of renderbuffer sampling

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.h | 5 + src/mesa/drivers/common/meta_blit.c | 38 - 2 files changed, 30 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h

[Mesa-dev] [PATCH 05/13] i965/gen8: Surface state overriding for stencil

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 32d1c33..6e6b88a 100644

[Mesa-dev] [PATCH 07/13] i965/blorp: Expose coordinate scissoring and mirroring

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 124 + src/mesa/drivers/dri/i965/brw_meta_util.c| 160 +++ src/mesa/drivers/dri/i965/brw_meta_util.h| 46

[Mesa-dev] [PATCH 02/13] i965/wm: Surface state overrides for configuring w-tiled as y-tiled

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h| 6 ++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 ++ 2 files changed, 28 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 04/13] i965/gen8: Allow stencil buffers to be configured as single sampled

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index cc55bd9..32d1c33 100644

[Mesa-dev] [PATCH 11/13] meta: Refactor state save/restore for framebuffer texture blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.h | 15 ++ src/mesa/drivers/common/meta_blit.c | 59 +++-- 2 files changed, 52 insertions(+), 22 deletions(-) diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common

[Mesa-dev] [PATCH 13/13] i965/fb: Use meta path for stencil blits

This is effective only on gen8 for now as previous generations still go through blorp. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 12/13] i965/meta: Stencil blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources| 1 + src/mesa/drivers/dri/i965/brw_context.h | 6 + src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 506 ++ 3 files changed, 513 insertions(+) create mode 100644 src

[Mesa-dev] [PATCH 08/13] meta: Merge compiling and linking of blit program

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.c | 45 - src/mesa/drivers/common/meta.h | 7 ++ src/mesa/drivers/common/meta_blit.c | 18 +++ 3 files changed, 39 insertions(+), 31 deletions(-) diff --git a/src/mesa

[Mesa-dev] [v2] Meta path for gen8 stencil

pport on IVB I was able to check that the new stencil updownsampling logic does not regress these tests. Topi Pohjolainen (8): i965/wm: Surface state overrides for configuring w-tiled as y-tiled i965/gen8: Surface state overriding for stencil i965: Extend brw_get_rb_for_first_slice() for spec

[Mesa-dev] [v2 1/8] i965/wm: Surface state overrides for configuring w-tiled as y-tiled

v2: Use intel_mipmap_tree::total_width in order to get correct alignment automatically. Also use "mt->total_height / mt->physical_depth0" as surface height allowing hardware to offset to correct slice. Cc: "10.2" Signed-off-by: Topi Pohjolainen Reviewe

[Mesa-dev] [v2 7/8] i965/meta: Stencil blit for miptree updownsampling

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 4 +++ src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 34 +++ 2 files changed, 38 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 3/8] i965: Extend brw_get_rb_for_first_slice() for specified level/layer

v2: Configure stencil directly for final dimensions instead of adjusting bit by bit for tiling, mip level and msaa. Cc: "10.2" Signed-off-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke (v1) --- src/mesa/drivers/dri/i965/brw_context.h | 4 +++ src/mesa/driver

[Mesa-dev] [v2 4/8] meta: Refactor state save/restore for framebuffer texture blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.h | 15 ++ src/mesa/drivers/common/meta_blit.c | 59 +++-- 2 files changed, 52 insertions(+), 22 deletions(-) diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common

[Mesa-dev] [v2 2/8] i965/gen8: Surface state overriding for stencil

t; still in place. I think it is clearer to remove it in a separate patch. Cc: "10.2" Signed-off-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke (v1) --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 34 -- 1 file changed, 21 insertions(+), 13 delet

[Mesa-dev] [v2 5/8] i965/meta: Stencil blits

updownsampling. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources| 1 + src/mesa/drivers/dri/i965/brw_context.h | 6 + src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 492 ++ 3 files changed, 499 insertions(+) create mode

[Mesa-dev] [v2 6/8] i965/fb: Use meta path for stencil blits

This is effective only on gen8 for now as previous generations still go through blorp. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 8/8] i965/fb: Use meta path for stencil up/downsampling

--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index b23fddf..88bd8f0 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tr

[Mesa-dev] [PATCH] i965/fbo: Only try stencil meta blits on gen >= 8

I don't have an ILK at hand but the fix should be trivial. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78872 Cc: "10.2" Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff -

[Mesa-dev] [PATCH 1/2] meta/blit: Add stencil texturing mode save and restore

Signed-off-by: Topi Pohjolainen Cc: "10.2" --- src/mesa/drivers/common/meta.h | 4 ++-- src/mesa/drivers/common/meta_blit.c | 15 ++- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h ind

[Mesa-dev] [PATCH 2/2] i965/meta: Store stencil texturing mode

fail framebuffer_blit_functionality_missing_buffers_blit.test: fail framebuffer_blit_functionality_negative_dimensions_blit.test: fail framebuffer_blit_functionality_minifying_blit.test: fail framebuffer_blit_functionality_magnifying_blit.test: fail Signed-off-by: Topi Pohjolainen Cc: "10.2"

[Mesa-dev] [v2 1/2] meta/blit: Add stencil texturing mode save and restore

Signed-off-by: Topi Pohjolainen Cc: "10.2" v2 (Ken): Only restore the mode if it has changed. --- src/mesa/drivers/common/meta.h | 4 ++-- src/mesa/drivers/common/meta_blit.c | 13 - 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/mesa/driv

[Mesa-dev] [PATCH] meta/blit: Use gl_FragColor also in the msaa blit shader

Fixes framebuffer_blit_functionality_multisampled_to_singlesampled_blit es3 cts test on bdw. Also fixes this on ivb when ivb is forced to use the meta path. No piglit regressions on IVB. Signed-off-by: Topi Pohjolainen Cc: Eric Anholt Cc: Matt Turner Cc: Kenneth Graunke Cc: Anuj Phogat Cc

[Mesa-dev] Splitting fs-instruction emission out of fs_visitor

sitor I saw no piglit regressions using IVB. Topi Pohjolainen (14): i965: Split emitter out of backend_visitor i965: Merge emission memory context setup for shader visitors i965: Merge max_grf between

[Mesa-dev] [PATCH 04/14] i965/vec4: Use unsigned instead of signed for visitor uniform count

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 ++-- src/mesa/drivers/dri/i965/brw_vec4.h | 4 ++-- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_vec4_vp.cpp | 2 +- 4 files changed, 11

[Mesa-dev] [PATCH 01/14] i965: Split emitter out of backend_visitor

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_cfg.cpp| 8 src/mesa/drivers/dri/i965/brw_cfg.h | 4 ++-- src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp | 6 +++--- src/mesa/drivers/dri/i965/brw_dead_control_flow.h| 2

[Mesa-dev] [PATCH 02/14] i965: Merge emission memory context setup for shader visitors

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +-- src/mesa/drivers/dri/i965/brw_shader.cpp | 5 +++-- src/mesa/drivers/dri/i965/brw_shader.h | 8 ++-- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 +-- 4 files changed, 11

[Mesa-dev] [PATCH 09/14] i965: Merge resolving of register size between fs and vec4

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 37 --- src/mesa/drivers/dri/i965/brw_fs.h | 1 - src/mesa/drivers/dri/i965/brw_shader.cpp | 51 + src/mesa/drivers/dri/i965/brw_shader.h | 3 ++ src

[Mesa-dev] [PATCH 11/14] i965/fs: Reduce scope for the visitor

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_fs.h | 4 +++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 90aca4f..c971480

[Mesa-dev] [PATCH 06/14] i965: Merge fail() for ir visitors

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 30 -- src/mesa/drivers/dri/i965/brw_fs.h | 4 --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +- src/mesa/drivers/dri/i965/brw_shader.cpp | 44

[Mesa-dev] [PATCH 12/14] i965/fs: Split declarations of fs_reg and fs_inst out of brw_fs.h

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 174 + src/mesa/drivers/dri/i965/brw_fs_emit.h | 220 2 files changed, 221 insertions(+), 173 deletions(-) create mode 100644 src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 08/14] i965: Refactor virtual register allocation between fs and vec4

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 15 - src/mesa/drivers/dri/i965/brw_fs.h | 4 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 --- src/mesa/drivers/dri/i965/brw_shader.cpp | 25

[Mesa-dev] [PATCH 05/14] i965: Merge variable hashtables of fs and vec4 visitors

Now empty destructors are dropped allowing compiler to generate the defaults (calling base class). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 2 -- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8 src/mesa/drivers/dri/i965/brw_shader.cpp

[Mesa-dev] [PATCH 07/14] i965/vec4: Move virtual register map into backend_emitter

In preparation for merging virtual register allocation between vector and fragment visitors. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_shader.cpp | 4 +++- src/mesa/drivers/dri/i965/brw_shader.h | 8 src/mesa/drivers/dri/i965/brw_vec4.h

[Mesa-dev] [PATCH 13/14] i965/fs: Split LIR emission ouf of ir-visitor

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_fs.cpp | 44 --- src/mesa/drivers/dri/i965/brw_fs.h | 19 + src/mesa/drivers/dri/i965/brw_fs_emit.h | 33 src/mesa/drivers/dri

[Mesa-dev] [PATCH 03/14] i965: Merge max_grf between stage compilers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h| 2 -- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 1 - src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 14/14] i965/fs: Move emission of ALUs into fs_emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 99 src/mesa/drivers/dri/i965/brw_fs.h | 31 - src/mesa/drivers/dri/i965/brw_fs_emit.h | 32 + src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 98

[Mesa-dev] [PATCH 10/14] i965: Merge common members of visitors

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 12 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 --- src/mesa/drivers/dri/i965/brw_shader.cpp | 9 - src/mesa/drivers/dri/i965/brw_shader.h | 16

[Mesa-dev] [PATCH 2/3] i965/gen7: Refactor array type resolving

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 9 + src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 6 +- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965

[Mesa-dev] i965: Helpers for resolving properties of surfaces

er. I suspect we should be able to use the miptree as the source in all cases but didn't look into it in detail. Topi Pohjolainen (3): i965/gen7: Refactor renderbuffer target override i965/gen7: Refactor array type resolving i965/gen7: Refactor resolving of depth src/mesa/driver

[Mesa-dev] [PATCH 1/3] i965/gen7: Refactor renderbuffer target override

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 8 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 17 + src/mesa/drivers/dri/i965/gen7_blorp.cpp | 4 +--- src/mesa/drivers/dri/i965/gen7_misc_state.c | 8

[Mesa-dev] [PATCH 3/3] i965/gen7: Refactor resolving of depth

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 1 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 15 + src/mesa/drivers/dri/i965/gen7_misc_state.c | 26 ++- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c

[Mesa-dev] [v2] EXT_image_dma_buf_import for intel

refactor planar format lookup intel: prepare for dri images having more than plane - added missing check for explicit "no context" egl: definitions for EXT_image_dma_buf_import Topi Pohjolainen (10): intel: allow packed prime buffers to be treated normally intel: d

[Mesa-dev] [v2 01/10] intel: allow packed prime buffers to be treated normally

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 3745179..4c5cc995 100644 --- a/src/mesa/drivers/dri

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