On Tue, Nov 08, 2016 at 04:24:48PM -0800, Jason Ekstrand wrote:
> On Tue, Nov 8, 2016 at 3:13 PM, Nanley Chery wrote:
>
> > On Sat, Oct 22, 2016 at 10:50:37AM -0700, Jason Ekstrand wrote:
> > > This commit moves the allocation and filling out of surface state from
> >
On Tue, Nov 08, 2016 at 05:02:29PM -0800, Jason Ekstrand wrote:
> On Tue, Nov 8, 2016 at 5:00 PM, Nanley Chery wrote:
>
> > On Tue, Nov 08, 2016 at 04:24:48PM -0800, Jason Ekstrand wrote:
> > > On Tue, Nov 8, 2016 at 3:13 PM, Nanley Chery
> > wrote:
> > >
&
On Tue, Nov 08, 2016 at 06:07:41PM -0800, Jason Ekstrand wrote:
> On Tue, Nov 8, 2016 at 5:16 PM, Nanley Chery wrote:
>
> > On Tue, Nov 08, 2016 at 05:02:29PM -0800, Jason Ekstrand wrote:
> > > On Tue, Nov 8, 2016 at 5:00 PM, Nanley Chery
> > wrote:
> > >
&
On Tue, Nov 08, 2016 at 03:09:39PM -0800, Jason Ekstrand wrote:
> On Tue, Nov 8, 2016 at 2:26 PM, Nanley Chery wrote:
>
> > On Tue, Nov 08, 2016 at 01:52:15PM -0800, Jason Ekstrand wrote:
> > > On Tue, Nov 8, 2016 at 1:36 PM, Nanley Chery
> > wrote:
> > >
&
> the way.
>
> 4) Here's the tricky bit. When vkCmdExecuteCommands is called during a
> render pass, we use transform feedback (yeah, crazy) to copy the block
> of surface states from the primary into the secondary right before
> executing the seconda
On Wed, Nov 09, 2016 at 06:43:23PM -0800, Jason Ekstrand wrote:
> On Wed, Nov 9, 2016 at 5:09 PM, Nanley Chery wrote:
>
> > On Sat, Oct 22, 2016 at 10:50:31AM -0700, Jason Ekstrand wrote:
> > > This series does some fairly major surgery on color attachment surface
> >
On Thu, Nov 10, 2016 at 12:52:44PM -0800, Jason Ekstrand wrote:
> On Nov 10, 2016 11:44, "Nanley Chery" wrote:
> >
> > On Wed, Nov 09, 2016 at 06:43:23PM -0800, Jason Ekstrand wrote:
> > > On Wed, Nov 9, 2016 at 5:09 PM, Nanley Chery
> wrote:
> > &
On Thu, Nov 10, 2016 at 02:25:37PM -0800, Jason Ekstrand wrote:
> On Thu, Nov 10, 2016 at 1:56 PM, Nanley Chery wrote:
>
> > On Thu, Nov 10, 2016 at 12:52:44PM -0800, Jason Ekstrand wrote:
> > > On Nov 10, 2016 11:44, "Nanley Chery" wrote:
> > > >
On Sat, Oct 22, 2016 at 10:50:54AM -0700, Jason Ekstrand wrote:
> Nothing that is allowed to be called within a secondary now relies on the
> framebuffer.
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
This patch is,
Reviewed-b
Attachment is VK_ATTACHMENT_UNUSED then the clear has no
>effect."
>
> I have no idea why it's spec'd this way; it seems very anti-Vulkan to me,
> but that's what it says and it's really not much work to support.
> ---
> src/intel/vulkan/anv_blorp.c
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_blorp.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
This patch is
Reviewed-by: Nanley Chery
>
> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> index b78c21d..d59c1a7
ug.cgi?id=77662
Signed-off-by: Nanley Chery
Cc: "12.0 13.0"
---
This piglit patch will help catch this error in the future:
https://lists.freedesktop.org/archives/piglit/2016-November/021480.html
src/mesa/main/fbobject.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/m
On Thu, Nov 17, 2016 at 10:06:12PM -0800, Jason Ekstrand wrote:
> On Wed, Oct 19, 2016 at 10:47 AM, Nanley Chery
> wrote:
>
> > The HZ sequence modifies less state than the blorp path and requires
> > less CPU time to generate the necessary packets.
> >
>
which is only
> used for LINEAR 1-D images. For tiled 1-D images, such as depth buffers,
> the old gen4 2-D layout is used and the QPitch should be in rows.
>
> Cc: Nanley Chery
> Cc: "13.0"
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 9 ++---
> 1 file ch
which is only
> used for LINEAR 1-D images. For tiled 1-D images, such as depth buffers,
> the old gen4 2-D layout is used and the QPitch should be in rows.
>
> Cc: Nanley Chery
> Cc: "13.0"
This rationale seems correct.
Patches 1 and 2 are,
Reviewed-by: N
On Mon, Nov 28, 2016 at 03:45:41PM -0800, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 51
> --
> 1 file changed, 49 insertions(+), 2 deletions(-)
>
This patch does not match the one you've merged
(d4ef87c1bb4290293148cbd6cb782764df38f8f
On Tue, Nov 29, 2016 at 05:41:58PM -0800, Jason Ekstrand wrote:
> In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
> accidentally kept setting the SurfaceType to 2D in the stencil-only case
> thanks to a copy+paste error.
>
> Cc: Nanley Chery
> ---
&
On Wed, Nov 30, 2016 at 05:55:32PM -0800, Jason Ekstrand wrote:
> On Wed, Nov 30, 2016 at 10:20 AM, Nanley Chery
> wrote:
>
> > On Tue, Nov 29, 2016 at 05:41:58PM -0800, Jason Ekstrand wrote:
> > > In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
On Fri, Dec 02, 2016 at 08:15:16PM +, Emil Velikov wrote:
> Hello list,
>
> The candidate for the Mesa 12.0.5 is now available. Currently we have:
> - 25 queued
> - 0 nominated (outstanding)
> - and 1 rejected patches
>
> Take a look at section "Mesa stable queue" for more information.
>
On Fri, Dec 02, 2016 at 09:27:42PM +, Emil Velikov wrote:
> On 2 December 2016 at 21:16, Emil Velikov wrote:
> > On 2 December 2016 at 20:53, Nanley Chery wrote:
> >> On Fri, Dec 02, 2016 at 08:15:16PM +, Emil Velikov wrote:
> >>> Hello list,
> >>&g
On Fri, Oct 14, 2016 at 12:46:31PM -0700, Jason Ekstrand wrote:
> On Wed, Oct 12, 2016 at 9:01 AM, Nanley Chery wrote:
>
> > On Tue, Oct 11, 2016 at 06:55:53PM -0700, Jason Ekstrand wrote:
> > > On Tue, Oct 11, 2016 at 6:16 PM, Nanley Chery
> > wrote:
> > >
&
On Fri, Dec 02, 2016 at 02:37:32PM -0800, Chad Versace wrote:
> ---
> src/intel/vulkan/anv_device.c | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
This patch is,
Reviewed-by: Nanley Chery
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_d
On Mon, Dec 05, 2016 at 04:11:21PM +, Emil Velikov wrote:
> From: Emil Velikov
>
> Document what has been the unofficial way to self-reject stable patches.
>
> Namely: drop the mesa-stable tag and push the commit.
>
> Cc: Nanley Chery
> Signed-off-by: Emil Velikov
---
Hi everyone,
I'm about to start working on this task.
src/intel/vulkan/TODO | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/TODO b/src/intel/vulkan/TODO
index abfe4b6..915f423 100644
--- a/src/intel/vulkan/TODO
+++ b/src/intel/vulkan/TODO
@@ -16,6 +16,7 @@ Code sharing
On Fri, Jul 01, 2016 at 02:24:19PM -0700, Chad Versace wrote:
> On Mon 27 Jun 2016, Nanley Chery wrote:
> > Signed-off-by: Nanley Chery
> > ---
> > src/intel/vulkan/anv_image.c | 10 --
> > 1 file changed, 4 insertions(+), 6 deletions(-)
> >
> > di
Hi Jason,
On Sat, Jun 11, 2016 at 09:02:42AM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl_surface_state.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/intel/isl/isl_surface_state.c
> b/src/intel/isl/isl_surface_state.c
> index 8f223d1..ca13175 100644
> ---
This became unused due to commit 612e35b2c65c99773b73e53d0e6fd112b1a7431f .
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_cmd_buffer.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan/anv_cmd_buffer.c
index
The first patch of this series fixes a bug in the driver. The remaining two
make the related code easier to understand.
Nanley Chery (3):
anv/descriptor_set: Fix binding partly undefined descriptor sets
anv/cmd_buffer: Remove unused variable
anv/cmd_buffer: Simplify range member assignment
_view field if it is
non-NULL. It currently segfaults on undefined descriptors as this field is never
zero-initialized. Zero undefined descriptors to avoid segfaulting. This
solution was suggested by Jason Ekstrand.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96850
Cc: 12.0
Signed-off-by: N
A ternary is clearer because the range member is assigned one of two values
dependant on one condition.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_cmd_buffer.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel
On Wed, Jul 13, 2016 at 03:56:42PM -0700, Jason Ekstrand wrote:
> On Wed, Jul 13, 2016 at 3:34 PM, Nanley Chery wrote:
>
> > Section 13.2.3. of the Vulkan spec requires that implementations be able to
> > bind sparsely-defined Descriptor Sets without any errors or except
_view field if it is
non-NULL. It currently segfaults on undefined descriptors as this field is never
zero-initialized. Zero undefined descriptors to avoid segfaulting. This
solution was suggested by Jason Ekstrand.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96850
Cc: 12.0
Signed-off-by: N
_view field if it is
non-NULL. It currently segfaults on undefined descriptors as this field is never
zero-initialized. Zero undefined descriptors to avoid segfaulting. This
solution was suggested by Jason Ekstrand.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96850
Cc: 12.0
Signed-off-by: N
its.buffer-update.range.storage
These tests are in this patch: https://patchwork.freedesktop.org/patch/98726/
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_device.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
ind
See inline PRM reference.
Signed-off-by: Nanley Chery
---
src/intel/isl/isl_surface_state.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/intel/isl/isl_surface_state.c
b/src/intel/isl/isl_surface_state.c
index fc7e1ba..58e9af5 100644
--- a/src/intel/isl
On Fri, Jul 01, 2016 at 02:29:25PM -0700, Jason Ekstrand wrote:
> seems fine to me
>
Should I use the Acked-by tag for this patch? Or push without a reviewer
tag?
Thanks,
Nanley
> On Fri, Jul 1, 2016 at 2:25 PM, Chad Versace wrote:
>
> > On Mon 27 Jun 2016, Nanley Chery w
pt-in,
filtering bitmask, that allows the caller to specify which ISL tilings are
acceptable, but not contradictory to the Vulkan tiling.
Opt-out of filtering for vkCreateImage.
Signed-off-by: Nanley Chery
---
v2: Fix bug of vk tiling being ignored by internal users (Chad)
Fix bug in existing code
On Thu, Jul 07, 2016 at 07:34:24PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
> src/mapi/glapi/registry/gl.xml | 1 +
> src/mesa/main/extensions_table.h | 1 +
> src/mesa/main/mtypes.h | 1 +
> src/mesa/main/teximage.c | 5 +++--
> 4 files changed, 6 insertio
On Thu, Jul 07, 2016 at 07:34:26PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
Patches 2 and 3 are:
Reviewed-by: Nanley Chery
> docs/GL3.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index ce34869..883604a 10
xtensions.KHR_texture_compression_astc_hdr &&
ctx->Extensions.KHR_texture_compression_astc_sliced_3d;
This is contrary to the code. I think the line above should instead say:
" * and neither of the above extensions are supported."
Sorry for missing
On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 11 +++
> src/intel/isl/isl.h | 17 +
> src/intel/isl/isl_format_layout.csv | 1 +
> src/intel/isl/isl_gen6.c| 8
> src/intel
On Thu, Jul 14, 2016 at 03:57:09PM -0700, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:45 PM, Nanley Chery wrote:
>
> > On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> > > ---
> > > src/intel/isl/isl.c | 11
On Thu, Jul 14, 2016 at 09:20:08PM -0700, Jason Ekstrand wrote:
> The old calculation, which used view->offset, encorporated buffer->offset
> into the size calculation where it doesn't belong. This meant that, if
> buffer->offset > buffer->size, you would always get a negative size. This
> fixes
On Thu, Jul 14, 2016 at 04:18:33PM -0700, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 4:13 PM, Nanley Chery wrote:
>
> > On Thu, Jul 14, 2016 at 03:57:09PM -0700, Jason Ekstrand wrote:
> > > On Thu, Jul 14, 2016 at 3:45 PM, Nanley Chery
> > wrote:
> > >
&
On Fri, Jul 01, 2016 at 04:08:49PM -0700, Jason Ekstrand wrote:
> In all three cases, we start with width and height taken from
> isl_surf::phys_slice0_extent_sa which is already in samples. There is no
> need to do the conversion and doing so gives us an incorrect value.
Thanks for noticing this
On Tue, Jul 19, 2016 at 04:12:17PM -0700, Nanley Chery wrote:
> On Fri, Jul 01, 2016 at 04:08:49PM -0700, Jason Ekstrand wrote:
> > In all three cases, we start with width and height taken from
> > isl_surf::phys_slice0_extent_sa which is already in samples. There is no
>
On Tue, Jul 19, 2016 at 04:16:23PM -0700, Jason Ekstrand wrote:
> On Tue, Jul 19, 2016 at 4:12 PM, Nanley Chery wrote:
>
> > On Fri, Jul 01, 2016 at 04:08:49PM -0700, Jason Ekstrand wrote:
> > > In all three cases, we start with width and height taken from
> > > i
On Wed, Jun 29, 2016 at 05:37:22PM -0700, Jason Ekstrand wrote:
> The alignment we use doesn't matter (see the comment) but it should at
> least be an alignment we can represent with the enums.
This patch is,
Reviewed-by: Nanley Chery
> ---
> src/intel/isl/isl_surface_state.c
On Fri, Jul 01, 2016 at 04:08:50PM -0700, Jason Ekstrand wrote:
> The shortcut works just fine for MSAA and the comment even says so.
This patch is,
Reviewed-by: Nanley Chery
> ---
> src/intel/isl/isl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --g
e,
Reviewed-by: Nanley Chery
> ---
> src/intel/isl/isl_surface_state.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/intel/isl/isl_surface_state.c
> b/src/intel/isl/isl_surface_state.c
> index d1c8f17..a30086d 100644
> --- a/src/intel/isl/isl
According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader
contains a discard instruction.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97207
Cc: "12.0"
Signed-off-by: Nanley Chery
---
src/intel/vulkan/gen7_pipeline.c | 1 +
1 file changed, 1 insertion(+)
di
DISPATCH_ENABLE == 0)
GEN7_WM_KILL_ENABLE = 0;
but i965 does:
if (GEN7_WM_KILL_ENABLE == 1)
GEN7_WM_DISPATCH_ENABLE = 1;
>
> and maybe
>
> https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n119
I don't understand how this field is related.
- Nanley
>
>
On Fri, Oct 12, 2018 at 01:46:53PM -0500, Jason Ekstrand wrote:
> They are both implemented in ISL now. Instead of disabling them in ISL,
> we disable them in the two dirvers.
"drivers" is misspelled.
>
> Reviewed-by: Topi Pohjolainen
> ---
> src/intel/isl/isl_gen7.c | 8
On Mon, Nov 19, 2018 at 10:54:05AM +0200, Eleni Maria Stea wrote:
> The assertions that the GL_MAP_WRITE_BIT and GL_MAP_INVALIDATE_RANGE_BIT
> in intel_miptree_map_etc should be removed since they will fail when the
^
missing "bits are set"?
> ETC miptree is mapped for reading.
>
The asserti
On Mon, Nov 19, 2018 at 10:54:06AM +0200, Eleni Maria Stea wrote:
> Renamed the r8stencil_mt and r8stencil_needs_update to shadow_mt and
> shadow_needs_update respectively to allow reusing the shadow_mt as a
> generic purpose secondary mipmap tree.
The series I pointed you to earlier has a patch l
On Mon, Nov 19, 2018 at 10:54:07AM +0200, Eleni Maria Stea wrote:
> GPUs Gen < 8 cannot render ETC2 formats. So far, they converted the
> compressed EAC/ETC2 images to non-compressed RGB format images that they
> can render. When GetCompressed* functions were called, the pixels were
> returned in t
On Mon, Nov 19, 2018 at 10:54:11AM +0200, Eleni Maria Stea wrote:
> Modified the calculation of the number of slices in the
> intel_update_decompressed_shadow function to take the array length into
> account to support arrays.
> ---
At this point, we can delete map_etc and unmap_etc, right?
-Nanl
On Mon, Nov 19, 2018 at 10:54:08AM +0200, Eleni Maria Stea wrote:
> On GPUs gen < 8 that don't support ETC2 sampling/rendering we now fake
> the support using 2 mipmap trees: one (the main) that stores the
> compressed data for the Get* functions to work and one (the shadow) that
> stores the same
On Mon, Nov 19, 2018 at 10:54:10AM +0200, Eleni Maria Stea wrote:
> Extended the intel_update_decompress_shadow to update all the mipmap
> tree levels so that we can display and run Get functions on mipmaps.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 48 +++
> 1 file c
On Tue, Jan 22, 2019 at 02:17:16PM +0200, Eleni Maria Stea wrote:
> On 1/19/19 1:32 AM, Nanley Chery wrote:
> >> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> >> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> >> index e214fae140..4d1eafa
On Tue, Jan 22, 2019 at 01:15:25PM +0200, Eleni Maria Stea wrote:
> On 1/22/19 12:46 PM, Eleni Maria Stea wrote:
> >>> + /**
> >>> +* \brief Indicates that we fake the ETC2 compression support
> >>> +*
> >>> +* GPUs Gen < 8 don't support sampling and rendering of ETC2
> >>> formats so
_BIT; /* FINISHME[SKL]: Support Ys */
>
> if (isl_surf_usage_is_depth(info->usage)) {
>/* Depth requires Y. */
> diff --git a/src/intel/isl/isl_gen9.c b/src/intel/isl/isl_gen9.c
> index e5d0f95402a..8e460430a1c 100644
> --- a/src/intel/isl/isl_gen9.c
> +++ b/src/inte
On Fri, Oct 12, 2018 at 01:46:32PM -0500, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/intel/blorp/blorp_clear.c | 8 ++--
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
Patches 1 and 2 are:
Reviewed-by: Nanley Chery
> diff --git a/src/intel/b
On Sat, Jan 26, 2019 at 05:22:06PM +0200, Eleni Maria Stea wrote:
> Hi Nanley,
>
> On Fri, 18 Jan 2019 15:32:02 -0800
> Nanley Chery wrote:
>
>
> > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > > b/src/mesa/drivers/dri/i965/brw_wm_su
On Fri, Oct 12, 2018 at 01:46:34PM -0500, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/intel/isl/isl.c | 36
> src/intel/isl/isl.h | 2 +-
> 2 files changed, 25 insertions(+), 13 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/in
On Fri, Oct 12, 2018 at 01:46:35PM -0500, Jason Ekstrand wrote:
> With Yf and Ys tiling, everything is actually four dimensional because
> we can have multiple depth or multisampled array slices in the same
> tile. This commit just enhances the calculations so they can handle it.
>
> Reviewed-by:
On Wed, Jan 23, 2019 at 02:25:14PM -0800, Nanley Chery wrote:
> On Fri, Oct 12, 2018 at 01:46:37PM -0500, Jason Ekstrand wrote:
> > The Yf and Ys tilings change a bit between gen9 and gen10 so we have to
> > be able to distinguish between them.
> > ---
> > src/intel/i
gt; src/intel/isl/isl_surface_state.c | 2 ++
> 5 files changed, 28 insertions(+), 5 deletions(-)
>
This patch is
Reviewed-by: Nanley Chery
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 392c15ca3fb..3ffc6f627b2 100644
> --- a/src/intel/isl/isl.c
> +++ b/src
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
On Sun, Feb 03, 2019 at 03:59:42PM +0200, Eleni Maria Stea wrote:
> On Fri, 18 Jan 2019 17:09:03 -0800
> Nanley Chery wrote:
>
> > On Mon, Nov 19, 2018 at 10:54:08AM +0200, Eleni Maria Stea wrote:
> [...]
> > > + int img_d = smt->surf.logical_level0_px.depth;
On Sun, Feb 03, 2019 at 03:07:33PM +0200, Eleni Maria Stea wrote:
> The assertions that the GL_MAP_WRITE_BIT and GL_MAP_INVALIDATE_RANGE_BIT
> in intel_miptree_map_etc will fail when the ETC miptree is mapped for
> reading. As we are about to fix the GetCompressed* functions in the
> following patc
On Sun, Feb 03, 2019 at 03:07:36PM +0200, Eleni Maria Stea wrote:
> OES_copy_image extension was disabled on Gen7 due to the lack of support
> for ETC2 images. Enabled it back. (Kenneth Graunke)
> ---
> src/mesa/drivers/dri/i965/intel_extensions.c | 18 ++
> 1 file changed, 14 inse
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
On Thu, Feb 07, 2019 at 07:17:32PM +0200, Eleni Maria Stea wrote:
> On Thu, 7 Feb 2019 11:18:59 -0500
> Ilia Mirkin wrote:
>
> > On Thu, Feb 7, 2019 at 2:49 AM Eleni Maria Stea
> > wrote:
> > >
> > > On Wed, 6 Feb 2019 12:12:27 -0800
> > > Nanl
On Fri, Feb 08, 2019 at 12:55:20PM +0200, Eleni Maria Stea wrote:
> Hi Nanley,
>
> On Thu, 7 Feb 2019 15:46:29 -0800
> Nanley Chery wrote:
> >
> > > @@ -3825,10 +3849,20 @@ intel_miptree_unmap(struct brw_context *brw,
> > > DBG("%s:
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
me we
> update the texture surface. (Nanley Chery)
>
> v3:
> - As we now update the tree before the rendering we don't need to copy
> the data during the unmap anymore. Removed the unnecessary update from
> the intel_miptree_unmap in intel_mipmap_tree.c (Nanley Chery)
&g
< 8 GPUs using two miptrees.
> i965: Fixed the CopyImageSubData for ETC2 on Gen < 8
> i965: Enabled the OES_copy_image extension on Gen 7 GPUs
> i965: Removed the field etc_format from the struct intel_mipmap_tree
>
These patches are
Reviewed-by: Nanley Chery
I li
s written with compressed data, we decompress them to RGB and update the
> shadow. Then we use the shadow for rendering.
>
> v2:
>- Fixes in the commit message (Nanley Chery)
>- Reversed the changes in brw_get_texture_swizzle and swapped the b, g
>values at the
On Mon, Dec 10, 2018 at 12:42:40PM +0200, Eleni Maria Stea wrote:
> Calculating the scissor rectangle fields with the y flipped (0 on top)
> can generate negative values that will cause assertion failure later on
> as the scissor fields are all unsigned. We must clamp the bbox values
> again to mak
ction when bbox[2] and bbox[3] are calculated, and the 2nd is more
>clear, I replaced it. (Nanley Chery)
> ---
> src/mesa/drivers/dri/i965/genX_state_upload.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upl
lent with using CLAMP instead of MAX2 at the top of
>the function when bbox[2] and bbox[3] are calculated, and the 2nd is more
>clear, I replaced it. (Nanley Chery)
>
> v3:
>- Reversed the CLAMP change in bbox[3] as the API guarantees that the
>viewport height is posit
I
> >shouldn't have changed the ScissorRectangleYMax calculation. As the
> >fixed code is equivalent with using CLAMP instead of MAX2 at the top of
> > the function when bbox[2] and bbox[3] are calculated, and the 2nd is more
> >clear, I replaced it. (N
On Mon, Feb 25, 2019 at 03:40:24PM -0800, Nanley Chery wrote:
> On Mon, Feb 25, 2019 at 03:14:10PM -0800, Dylan Baker wrote:
> > Quoting Eleni Maria Stea (2019-02-22 13:02:30)
> > > Calculating the scissor rectangle fields with the y flipped (0 on top)
> > > can generat
On Tue, Mar 12, 2019 at 10:56:27PM -0500, Jason Ekstrand wrote:
> Cc: mesa-sta...@lists.freedesktop.org
> Cc: Nanley Chery
> ---
> src/intel/vulkan/anv_pass.c | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/vulkan/a
On Fri, Aug 28, 2015 at 9:17 AM, Ilia Mirkin wrote:
> On Fri, Aug 28, 2015 at 10:50 AM, Nanley Chery
> wrote:
> > From: Nanley Chery
> >
> > According to the extensions table and our glext headers, these
> > extensions are only supported in the core and compatibil
From: Nanley Chery
Instead of case statements, use _mesa_get_format_layout() to
determine if a GL format is part of a family of compressed formats.
v2. restrict LATC formats to API_OPENGL_COMPAT (Ilia).
rename the variable mFormat to m_format.
Signed-off-by: Nanley Chery
---
src/mesa
From: Nanley Chery
According to the extensions table and our glext headers,
OES_compressed_ETC1_RGB8_texture is only supported in
GLES1 and GLES2. Since we may give users a GLES3 context
when a GLES2 context is requested, we also allow this
extension for GLES3 as well.
Signed-off-by: Nanley
From: Nanley Chery
According the GL 3.1 spec, luminance alpha formats are deprecated.
Signed-off-by: Nanley Chery
---
src/mesa/main/extensions.c | 4 ++--
src/mesa/main/teximage.c | 6 --
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/main/extensions.c b/src
Sorry about the incorrect threading on these v2's.
On Mon, Sep 14, 2015 at 11:17 AM, Nanley Chery
wrote:
> From: Nanley Chery
>
> Instead of case statements, use _mesa_get_format_layout() to
> determine if a GL format is part of a family of compressed formats.
>
> v2. r
On Tue, Sep 15, 2015 at 3:01 PM, Anuj Phogat wrote:
>
>
> On Fri, Aug 28, 2015 at 7:50 AM, Nanley Chery
> wrote:
>
>> From: Nanley Chery
>>
>> Reuse utility functions instead of reimplementing the same logic.
>>
>> * _mesa_is_compressed_format() per
On Wed, Sep 16, 2015 at 10:15 AM, Nanley Chery
wrote:
>
>
> On Tue, Sep 15, 2015 at 3:01 PM, Anuj Phogat
> wrote:
>
>>
>>
>> On Fri, Aug 28, 2015 at 7:50 AM, Nanley Chery
>> wrote:
>>
>>> From: Nanley Chery
>>>
>&
From: Nanley Chery
The refactoring commit, c6bf1cd, accidentally reverted cd49b97
and 99b1f47. These changes caused more code to be added to the
function and removed the existing support for ASTC. This patch
reverts those modifications.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id
From: Nanley Chery
The refactoring commit, c6bf1cd, accidentally reverted cd49b97
and 99b1f47. These changes caused more code to be added to the
function and removed the existing support for ASTC. This patch
reverts those modifications.
v2. Actually include ASTC support again.
Bugzilla: https
On Sun, Jan 10, 2016 at 12:14:51AM -0500, Ilia Mirkin wrote:
> From: Rafal Mielniczuk
>
> Add QueryBuffer and initialise it to NullBufferObj on start
>
> Signed-off-by: Rafal Mielniczuk
> [imirkin: also release QueryBuffer on free]
> Signed-off-by: Ilia Mirkin
> ---
> src/mesa/main/bufferobj.
On Tue, Jan 12, 2016 at 03:13:54PM +0100, Marta Lofstedt wrote:
> From: Marta Lofstedt
>
> Add xml definitions for the GL_OES_geometry_shader extension
> and expose the extension for OpenGL ES 3.1.
>
> V3: Added dependency to OES_shader_io_blocks and updated to
> correct Khronos extension number
On Tue, Jan 19, 2016 at 05:41:51PM +0100, Eduardo Lima Mitev wrote:
> From: Antia Puentes
>
> ---
> src/mesa/main/extensions_table.h | 1 +
> src/mesa/main/mtypes.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/src/mesa/main/extensions_table.h
> b/src/mesa/main/extension
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