On Fri, Oct 12, 2018 at 01:46:35PM -0500, Jason Ekstrand wrote:
> With Yf and Ys tiling, everything is actually four dimensional because
> we can have multiple depth or multisampled array slices in the same
> tile. This commit just enhances the calculations so they can handle it.
>
> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> ---
> src/intel/isl/isl.c | 73 ++++++++++++++++++++++++++++++++++-----------
> 1 file changed, 55 insertions(+), 18 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 6bc96e86cb5..a805facb1ae 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -992,7 +992,7 @@ isl_calc_phys_total_extent_el_gen4_2d(
> const struct isl_extent4d *phys_level0_sa,
> enum isl_array_pitch_span array_pitch_span,
> uint32_t *array_pitch_el_rows,
> - struct isl_extent2d *total_extent_el)
> + struct isl_extent4d *phys_total_el)
> {
> const struct isl_format_layout *fmtl =
> isl_format_get_layout(info->format);
>
> @@ -1005,10 +1005,12 @@ isl_calc_phys_total_extent_el_gen4_2d(
> image_align_sa, phys_level0_sa,
> array_pitch_span,
> &phys_slice0_sa);
> - *total_extent_el = (struct isl_extent2d) {
> + *phys_total_el = (struct isl_extent4d) {
> .w = isl_assert_div(phys_slice0_sa.w, fmtl->bw),
> .h = *array_pitch_el_rows * (phys_level0_sa->array_len - 1) +
> isl_assert_div(phys_slice0_sa.h, fmtl->bh),
> + .d = 1,
> + .a = 1,
> };
> }
>
> @@ -1023,7 +1025,7 @@ isl_calc_phys_total_extent_el_gen4_3d(
> const struct isl_extent3d *image_align_sa,
> const struct isl_extent4d *phys_level0_sa,
> uint32_t *array_pitch_el_rows,
> - struct isl_extent2d *phys_total_el)
> + struct isl_extent4d *phys_total_el)
> {
> const struct isl_format_layout *fmtl =
> isl_format_get_layout(info->format);
>
> @@ -1070,9 +1072,11 @@ isl_calc_phys_total_extent_el_gen4_3d(
> */
> *array_pitch_el_rows =
> isl_align_npot(phys_level0_sa->h, image_align_sa->h) / fmtl->bw;
> - *phys_total_el = (struct isl_extent2d) {
> + *phys_total_el = (struct isl_extent4d) {
> .w = isl_assert_div(total_w, fmtl->bw),
> .h = isl_assert_div(total_h, fmtl->bh),
> + .d = 1,
> + .a = 1,
> };
> }
>
> @@ -1088,7 +1092,7 @@ isl_calc_phys_total_extent_el_gen6_stencil_hiz(
> const struct isl_extent3d *image_align_sa,
> const struct isl_extent4d *phys_level0_sa,
> uint32_t *array_pitch_el_rows,
> - struct isl_extent2d *phys_total_el)
> + struct isl_extent4d *phys_total_el)
> {
> const struct isl_format_layout *fmtl =
> isl_format_get_layout(info->format);
>
> @@ -1131,9 +1135,11 @@ isl_calc_phys_total_extent_el_gen6_stencil_hiz(
>
> *array_pitch_el_rows =
> isl_assert_div(isl_align(H0, image_align_sa->h), fmtl->bh);
> - *phys_total_el = (struct isl_extent2d) {
> + *phys_total_el = (struct isl_extent4d) {
> .w = isl_assert_div(MAX(total_top_w, total_bottom_w), fmtl->bw),
> .h = isl_assert_div(total_h, fmtl->bh),
> + .d = 1,
> + .a = 1,
> };
> }
>
> @@ -1148,7 +1154,7 @@ isl_calc_phys_total_extent_el_gen9_1d(
> const struct isl_extent3d *image_align_sa,
> const struct isl_extent4d *phys_level0_sa,
> uint32_t *array_pitch_el_rows,
> - struct isl_extent2d *phys_total_el)
> + struct isl_extent4d *phys_total_el)
> {
> MAYBE_UNUSED const struct isl_format_layout *fmtl =
> isl_format_get_layout(info->format);
>
> @@ -1168,9 +1174,11 @@ isl_calc_phys_total_extent_el_gen9_1d(
> }
>
> *array_pitch_el_rows = 1;
> - *phys_total_el = (struct isl_extent2d) {
> + *phys_total_el = (struct isl_extent4d) {
> .w = isl_assert_div(slice_w, fmtl->bw),
> .h = phys_level0_sa->array_len,
> + .d = 1,
> + .a = 1,
> };
> }
>
> @@ -1188,7 +1196,7 @@ isl_calc_phys_total_extent_el(const struct isl_device
> *dev,
> const struct isl_extent4d *phys_level0_sa,
> enum isl_array_pitch_span array_pitch_span,
> uint32_t *array_pitch_el_rows,
> - struct isl_extent2d *total_extent_el)
> + struct isl_extent4d *phys_total_el)
> {
> switch (dim_layout) {
> case ISL_DIM_LAYOUT_GEN9_1D:
> @@ -1196,14 +1204,14 @@ isl_calc_phys_total_extent_el(const struct isl_device
> *dev,
> isl_calc_phys_total_extent_el_gen9_1d(dev, info,
> image_align_sa, phys_level0_sa,
> array_pitch_el_rows,
> - total_extent_el);
> + phys_total_el);
> return;
> case ISL_DIM_LAYOUT_GEN4_2D:
> isl_calc_phys_total_extent_el_gen4_2d(dev, info, tile_info,
> msaa_layout,
> image_align_sa, phys_level0_sa,
> array_pitch_span,
> array_pitch_el_rows,
> - total_extent_el);
> + phys_total_el);
> return;
> case ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ:
> assert(array_pitch_span == ISL_ARRAY_PITCH_SPAN_COMPACT);
> @@ -1211,14 +1219,14 @@ isl_calc_phys_total_extent_el(const struct isl_device
> *dev,
> image_align_sa,
> phys_level0_sa,
> array_pitch_el_rows,
> - total_extent_el);
> + phys_total_el);
> return;
> case ISL_DIM_LAYOUT_GEN4_3D:
> assert(array_pitch_span == ISL_ARRAY_PITCH_SPAN_COMPACT);
> isl_calc_phys_total_extent_el_gen4_3d(dev, info,
> image_align_sa, phys_level0_sa,
> array_pitch_el_rows,
> - total_extent_el);
> + phys_total_el);
> return;
> }
> }
> @@ -1261,7 +1269,7 @@ isl_calc_row_pitch_alignment(const struct
> isl_surf_init_info *surf_info,
> static uint32_t
> isl_calc_linear_min_row_pitch(const struct isl_device *dev,
> const struct isl_surf_init_info *info,
> - const struct isl_extent2d *phys_total_el,
> + const struct isl_extent4d *phys_total_el,
> uint32_t alignment_B)
> {
> const struct isl_format_layout *fmtl =
> isl_format_get_layout(info->format);
> @@ -1274,7 +1282,7 @@ static uint32_t
> isl_calc_tiled_min_row_pitch(const struct isl_device *dev,
> const struct isl_surf_init_info *surf_info,
> const struct isl_tile_info *tile_info,
> - const struct isl_extent2d *phys_total_el,
> + const struct isl_extent4d *phys_total_el,
> uint32_t alignment_B)
> {
> const struct isl_format_layout *fmtl =
> isl_format_get_layout(surf_info->format);
> @@ -1294,7 +1302,7 @@ static uint32_t
> isl_calc_min_row_pitch(const struct isl_device *dev,
> const struct isl_surf_init_info *surf_info,
> const struct isl_tile_info *tile_info,
> - const struct isl_extent2d *phys_total_el,
> + const struct isl_extent4d *phys_total_el,
> uint32_t alignment_B)
> {
> if (tile_info->tiling == ISL_TILING_LINEAR) {
> @@ -1327,7 +1335,7 @@ isl_calc_row_pitch(const struct isl_device *dev,
> const struct isl_surf_init_info *surf_info,
> const struct isl_tile_info *tile_info,
> enum isl_dim_layout dim_layout,
> - const struct isl_extent2d *phys_total_el,
> + const struct isl_extent4d *phys_total_el,
> uint32_t *out_row_pitch_B)
> {
> uint32_t alignment_B =
> @@ -1450,7 +1458,7 @@ isl_surf_init_s(const struct isl_device *dev,
> isl_choose_array_pitch_span(dev, info, dim_layout, &phys_level0_sa);
>
> uint32_t array_pitch_el_rows;
> - struct isl_extent2d phys_total_el;
> + struct isl_extent4d phys_total_el;
> isl_calc_phys_total_extent_el(dev, info, &tile_info,
> dim_layout, msaa_layout,
> &image_align_sa, &phys_level0_sa,
> @@ -1465,6 +1473,9 @@ isl_surf_init_s(const struct isl_device *dev,
> uint32_t base_alignment_B;
> uint64_t size_B;
> if (tiling == ISL_TILING_LINEAR) {
> + /* LINEAR tiling has no concept of intra-tile arrays */
> + assert(phys_total_el.d == 1 && phys_total_el.a == 1);
> +
> size_B = (uint64_t) row_pitch_B * phys_total_el.h;
>
> /* From the Broadwell PRM Vol 2d,
> RENDER_SURFACE_STATE::SurfaceBaseAddress:
> @@ -1486,7 +1497,33 @@ isl_surf_init_s(const struct isl_device *dev,
> }
> base_alignment_B = isl_round_up_to_power_of_two(base_alignment_B);
> } else {
> + /* Pitches must make sense with the tiling */
> + assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
> + assert(array_pitch_el_rows % tile_info.logical_extent_el.d == 0);
> + assert(array_pitch_el_rows % tile_info.logical_extent_el.a == 0);
> +
> + uint32_t array_slices, array_pitch_tl_rows;
> + if (phys_total_el.d > 1) {
> + assert(phys_total_el.a == 1);
> + array_pitch_tl_rows = isl_align_div(array_pitch_el_rows,
> + tile_info.logical_extent_el.h);
> + array_slices = isl_align_div(phys_total_el.d,
> + tile_info.logical_extent_el.d);
> + } else if (phys_total_el.a > 1) {
> + assert(phys_total_el.d == 1);
> + array_pitch_tl_rows = isl_align_div(array_pitch_el_rows,
> + tile_info.logical_extent_el.h);
> + array_slices = isl_align_div(phys_total_el.a,
> + tile_info.logical_extent_el.a);
> + assert(array_pitch_el_rows % tile_info.logical_extent_el.h == 0);
> + } else {
> + assert(phys_total_el.d == 1 && phys_total_el.a == 1);
> + array_pitch_tl_rows = 0;
> + array_slices = 1;
> + }
> +
> const uint32_t total_h_tl =
> + (array_slices - 1) * array_pitch_tl_rows +
> isl_align_div(phys_total_el.h, tile_info.logical_extent_el.height);
>
How about we shorten the size calculation to something like the
following?
uint32_t x_offset_el, y_offset_el, tile_z_sa, tile_a;
isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb,
row_pitch_B, array_pitch_el_rows,
0, 0, phys_total_el.d, phys_total_el.a,
&size_B,
&x_offset_el, &y_offset_el,
&tile_z_sa, &tile_a);
-Nanley
> size_B = (uint64_t) total_h_tl * tile_info.phys_extent_B.height *
> row_pitch_B;
> --
> 2.19.1
>
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