Whoops. I re-wrote this last night:
http://cgit.freedesktop.org/~jljusten/mesa/commit/?h=cs-33&id=3ebe7b79
On 2015-06-04 21:41:15, Tapani Pälli wrote:
> Before 9b5e92f get_gl_override was called only once, but now it is
> called for multiple APIs (GLES2, GL), version needs to be set always.
>
>
On 2015-06-10 02:30:10, Samuel Iglesias Gonsálvez wrote:
> On 09/06/15 19:34, Jordan Justen wrote:
> > On 2015-06-09 00:30:45, Samuel Iglesias Gonsálvez wrote:
> >> On 09/06/15 08:18, Samuel Iglesias Gonsálvez wrote:
> >> I plan to modify patch [0] to set prog->
On 2015-06-10 13:03:20, Jordan Justen wrote:
> Whoops. I re-wrote this last night:
>
> http://cgit.freedesktop.org/~jljusten/mesa/commit/?h=cs-33&id=3ebe7b79
>
> On 2015-06-04 21:41:15, Tapani Pälli wrote:
> > Before 9b5e92f get_gl_override was called only once, but
"buffer variables cannot be declared outside"
> + " interface blocks");
I think we usually put the space at the end of the previous line.
Reviewed-by: Jordan Justen
> + }
> +
> /* An offset-qualified atomic counter declaration set
This prevents an assertion from being hit with SIMD16:
Assertion `inst->exec_size == dispatch_width() || force_writemask_all' failed.
Signed-off-by: Jordan Justen
Cc: Francisco Jerez
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(
d for proper pre-emption."
In the HSW PRM, the it doesn't mention that it must always be set, but
it should not hurt.
Reported-by: Kristian Høgsberg
Signed-off-by: Jordan Justen
Cc: Kristian Høgsberg
---
src/mesa/drivers/dri/i965/brw_cs.cpp| 19 +++
src/mesa/d
brw_upload_cs_push_constants was based on gen6_upload_push_constants.
Signed-off-by: Jordan Justen
---
These 2 patches allow this piglit to pass:
tests/spec/arb_compute_shader/execution/basic-uniform-access-atomic.shader_test
(Also requires overriding the GL version and some extensions
Signed-off-by: Jordan Justen
---
src/mesa/main/state.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/mesa/main/state.c b/src/mesa/main/state.c
index bede7fe..beb2721 100644
--- a/src/mesa/main/state.c
+++ b/src/mesa/main/state.c
@@ -278,6 +278,16 @@ update_program_constants
Although we don't support SIMD32, krh pointed out that the left shift
by 32 is undefined by C/C++ for 32-bit integers.
Suggested-by: Kristian Høgsberg
Signed-off-by: Jordan Justen
Cc: Kristian Høgsberg
---
src/mesa/drivers/dri/i965/brw_compute.c | 2 +-
1 file changed, 1 insertion(
ference_buffer_object(ctx, &ctx->ShaderStorageBuffer,
> +ctx->Shared->NullBufferObj);
Tabs here?
With that fixed, this and
14/82 glsl: fix error messages in invalid declarations of shader storage blocks
Reviewed-by: Jordan
I guess you wanted to lower case the initial word of all Chris's patch
subjects? :)
This patch was in a range of 11 patches that I added my r-b for:
http://lists.freedesktop.org/archives/mesa-dev/2014-September/068742.html
It seems Chris didn't get a chance to add my r-b to these patches,
includi
, Jun 16, 2015 at 11:21 PM, Jordan Justen
> wrote:
> > Signed-off-by: Jordan Justen
> > ---
> > src/mesa/main/state.c | 10 ++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/src/mesa/main/state.c b/src/mesa/main/state.c
> > index bede
On 2015-06-16 17:02:57, Marek Olšák wrote:
> On Wed, Jun 17, 2015 at 1:46 AM, Jordan Justen
> wrote:
> > This patch was in a range of 11 patches that I added my r-b for:
> > http://lists.freedesktop.org/archives/mesa-dev/2014-September/068742.html
> >
> > It seems Ch
= bufObj) {
> +_mesa_BindBuffer( GL_SHADER_STORAGE_BUFFER, 0 );
> + }
Can you remove the extra spaces after '(' and before ')'?
Reviewed-by: Jordan Justen
> +
> /* unbind Atomci Buffer binding points */
> for (j = 0; j < ctx
bj;
> + GLint i;
> +
> + for (i = 0; i < count; i++)
> + set_ssbo_binding(ctx, &ctx->ShaderStorageBufferBindings[first + i],
> + bufObj, -1, -1, GL_TRUE);
> +}
> +
> static void
> bind_uniform_buffers_base(struct gl_context *ctx, GLui
> └─┴─┘"
> + */
> + if (offsets[i] & (ctx->Const.ShaderStorageBufferOffsetAlignment - 1)) {
> + _mesa_error(ctx, GL_INVALID_VALUE,
> + "g
19-20 Reviewed-by: Jordan Justen
On 2015-06-03 00:01:10, Iago Toral Quiroga wrote:
> ---
> src/mesa/main/bufferobj.c | 37 +
> 1 file changed, 37 insertions(+)
>
> diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
> inde
_var_function_inout ||
> + lhs_var->data.mode == ir_var_shader_out ||
> + lhs_var->data.mode == ir_var_shader_storage)
> + continue;
This indentation looks wrong. If fixed,
Reviewed-by: Jordan Justen
>
>ir_v
/* Remove a single dead assignment to the variable we found.
> - * Don't do so if it's a shader or function output, though.
> + * Don't do so if it's a shader or function output or a buffer
> + * variable though.
buffer => shader storage
Reviewed
I wanted to question whether this was required, based on this text
from the extension spec:
"The ability to write to buffer objects creates the potential for
multiple independent shader invocations to read and write the same
underlying memory. The same issue exists with the
ARB_shader_image_loa
On 2015-06-17 19:33:23, Matt Turner wrote:
> On Wed, Jun 17, 2015 at 5:20 PM, Jordan Justen
> wrote:
> > I wanted to question whether this was required, based on this text
> > from the extension spec:
> >
> > "The ability to write to buffer objects crea
On 2015-06-17 22:57:27, Iago Toral wrote:
> On Wed, 2015-06-17 at 17:20 -0700, Jordan Justen wrote:
> > I wanted to question whether this was required, based on this text
> > from the extension spec:
> >
> > "The ability to write to buffer objects creates
24-26 once again makes me wonder if these optimization *can* be used
with SSBOs based on the same ext spec wording I referenced before:
"The ability to write to buffer objects creates the potential for
multiple independent shader invocations to read and write the same
underlying memory. The same
Reviewed-by: Jordan Justen
On 2015-06-03 00:01:17, Iago Toral Quiroga wrote:
> Shader storage buffer objects (SSBO) require special handling: when we
> detect writes to any channel of a shader buffer variable we need to
> emit the corresponding write to memory. We will later add a lowe
Reviewed-by: Jordan Justen
On 2015-06-22 14:58:27, Matt Turner wrote:
> Can't find any uses of it in git history.
> ---
> Strangely, when it was moved to its current location in commit 27558a1,
> it was moved from mmath.h... which seems to have been lost from git's
> h
Series Reviewed-by: Jordan Justen
On 2015-06-22 14:56:06, Matt Turner wrote:
> Coverity sees that the functions immediately below the new assertions
> dereference these pointers, but is unaware that an ENDIF always follows
> an IF, etc.
> ---
> src/mesa/drivers/dri/i965/brw_cfg.
On 2015-06-22 23:38:14, Iago Toral wrote:
> On Mon, 2015-06-22 at 14:28 -0700, Jordan Justen wrote:
> > 24-26 once again makes me wonder if these optimization *can* be used
> > with SSBOs based on the same ext spec wording I referenced before:
> >
> > "The ab
Reviewed-by: Jordan Justen
On 2015-06-23 15:40:00, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> b/src/mes
Reviewed-by: Jordan Justen
On 2015-06-24 20:07:54, Ben Widawsky wrote:
> gen8 had some special restrictions which don't seem to carry over to gen9.
> Quoting the spec for SKL:
> "The Z_Height and Z_Width values must equal those present in
> 3DSTATE_DEPTH_BUFFER incremen
Reviewed-by: Jordan Justen
On 2015-06-22 11:18:55, Kenneth Graunke wrote:
> We were not emitting the LOD, which led to message lengths of 1 instead
> of 3. Setting has_lod makes us emit the LOD, but I had to make changes
> to avoid emitting the non-existent coordinate as well.
>
On 2015-06-26 15:18:52, Kenneth Graunke wrote:
> According to the "URB SIMD8 Write > Write Data Payload" documentation,
> "The write data payload can be between 1 and 8 message phases long."
Would a more precise PRM ref location be possible?
Reviewed-by: Jord
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 5653d6b..309f495 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b
first_non_payload_grf may be updated in assign_urb_setup for FS or
assign_vs_urb_setup for VS.
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_cs.cpp | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp
b/src/mesa/drivers/dri/i965/brw_cs.cpp
index 63e3b8d..bf43def 100644
--- a/src/mesa/drivers/dri/i965
of this unreviewed patch:
http://patchwork.freedesktop.org/patch/52010/
Jordan Justen (5):
i965: Support CS in update_stage_texture_surfaces
i965: Run vector splitting for CS in brw_link_shader
i965/fs: Set first_non_payload_grf in assign_curb_setup
i965/cs: Support texture sampling for CS
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 72aad96..0eb5361 100644
--- a
On 2015-06-26 16:03:21, Kenneth Graunke wrote:
> Adding new shader stages to a switch statement is less confusing than an
> if-else-if ladder where all but the first case are fragment shader
> specific (but don't claim to be).
>
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/
Reviewed-by: Jordan Justen
On 2015-06-26 16:03:21, Kenneth Graunke wrote:
> Adding new shader stages to a switch statement is less confusing than an
> if-else-if ladder where all but the first case are fragment shader
> specific (but don't claim to be).
>
> Signed-off
On 2015-06-24 07:36:24, Iago Toral wrote:
> On Wed, 2015-06-24 at 15:43 +0300, Francisco Jerez wrote:
> > AFAICT the reason why this (and many of the other changes in GLSL
> > optimization passes) is needed is because SSBO loads have been
> > implemented as ir_expression nodes instead of being lowe
On 2015-07-01 11:51:37, Connor Abbott wrote:
> From: Jordan Justen
>
> If a source register in the push constant registers uses more than on
Doh. I have to point out my own typo. :)
on=>one
> register, then we wouldn't update payload_last_use_ip for subsequent
> regi
Reviewed-by: Jordan Justen
On 2015-07-01 11:51:35, Connor Abbott wrote:
> The second source always stays within the same SIMD8 register.
>
> Signed-off-by: Connor Abbott
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
9061 -> 8893 (-1.85%)
> helped:10
> HURT: 0
> GAINED:0
> LOST: 0
Nice. :)
Reviewed-by: Jordan Justen
> All of the changes were due to spills be
Reviewed-by: Jordan Justen
On 2015-07-01 11:51:39, Connor Abbott wrote:
> From: Connor Abbott
>
> Before, we were setting payload_last_use_ip for unused payload
> registers to 0, which made them interfere with whatever the first
> instruction wrote to due to the workaround for
On 2015-06-25 11:34:59, Ben Widawsky wrote:
> On Thu, Jun 11, 2015 at 09:04:45PM -0700, Jordan Justen wrote:
> > + desc[dw++] = 0;
> > + const uint32_t media_threads =
> > + brw->gen >= 8 ?
> > + SET_FIELD(threads, GEN8_MEDIA_GPGPU_THREAD_COUN
30-32 Reviewed-by: Jordan Justen
On 2015-06-03 00:01:20, Iago Toral Quiroga wrote:
> This is the same we do for other things like uniforms because it ensures
> optimal performance.
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 1 +
> 1 file changed, 1 insertion(+)
>
>
,
> + unsigned int deref_offset,
> + bool row_major,
> + int matrix_columns,
> + unsigned write_mask)
&g
Reviewed-by: Jordan Justen
On 2015-07-10 03:13:45, Iago Toral Quiroga wrote:
> From: Samuel Iglesias Gonsalvez
>
> Extend the existing lower_ubo_reference pass to also detect SSBO loads
> and lower them to __intrinsic_load_ssbo intrinsics.
>
> Signed-off-by: Samuel
x 160dd2f..e9ccdd6 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -410,6 +410,29 @@ brw_create_constant_surface(struct brw_context *brw,
> }
>
> /**
> + * Create the buffer surface. Vertex/fragment
Reviewed-by: Jordan Justen
On 2015-06-03 00:01:24, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> b/src/mes
Reviewed-by: Jordan Justen
On 2015-06-03 00:01:25, Iago Toral Quiroga wrote:
> Buffer variables are the same as uniforms, only that read/write, so we want
> the same treatment.
> ---
> src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Jordan Justen
On 2015-07-14 09:56:09, Ben Widawsky wrote:
> With the last few patches a way was provided to influence lower layer miptree
> layout and allocation decisions via flags (replacing bools). For simplicity, I
> chose not to touch the tiling requests because the c
This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_write: Assertion `var < num_vars' failed.
Signed-off-by: Jordan Justen
Cc: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 ---
1 file changed, 4 insertions(+), 3 d
On 2015-07-16 13:59:45, Jason Ekstrand wrote:
>On Jul 16, 2015 2:00 PM, "Jordan Justen"
>wrote:
>>
>> This prevents an assertion failure in brw_fs_live_variables.cpp,
>> fs_live_variables::setup_one_write: Assertion `var < num_vars
On 2015-07-16 14:37:59, Jason Ekstrand wrote:
>On Jul 16, 2015 4:35 PM, "Jordan Justen"
>wrote:
>>
>> On 2015-07-16 13:59:45, Jason Ekstrand wrote:
>> >On Jul 16, 2015 2:00 PM, "Jordan Justen"
>
>> >wr
This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_write: Assertion `var < num_vars' failed.
Signed-off-by: Jordan Justen
Cc: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_read: Assertion `var < num_vars' failed.
Signed-off-by: Jordan Justen
Cc: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/
On 2015-07-09 17:15:14, Ben Widawsky wrote:
> On Tue, Jun 16, 2015 at 02:21:39PM -0700, Jordan Justen wrote:
> > +static void
> > +gen7_upload_cs_push_constants(struct brw_context *brw)
> > +{
> > + struct brw_stage_state *stage_state = &brw->cs.base;
> &
On 2015-10-13 05:17:37, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > This fixes the following test:
> >
> > [require]
> > GL >= 3.3
> > GLSL >= 3.30
> > GL_ARB_shader_storage_buffer_object
> >
> > [fragment shader]
> > #version 330
> > #extension GL_ARB_shader_storage_buffer_object:
Graunke
Date: Fri Aug 14 15:15:11 2015 -0700
i965/vs: Map scalar VS input locations properly; avoid tons of MOVs.
Signed-off-by: Jordan Justen
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_nir.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa
The ES31-CTS.compute_shader.pipeline-compute-chain test case was
generating an unsigned index by using gl_LocalInvocationID.x and
gl_LocalInvocationID.y as array indices.
Signed-off-by: Jordan Justen
---
src/glsl/lower_vec_index_to_cond_assign.cpp | 4 +++-
1 file changed, 3 insertions(+), 1
The ES31-CTS.compute_shader.pipeline-compute-chain test case was
generating an unsigned index by using gl_LocalInvocationID.x and
gl_LocalInvocationID.y as array indices.
Signed-off-by: Jordan Justen
---
src/glsl/lower_vector_insert.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion
On 2015-10-13 20:04:36, Kenneth Graunke wrote:
> On Tuesday, October 13, 2015 01:44:55 PM Jordan Justen wrote:
> > The commit shown below caused compute shaders to hit the unreachable
> > in the default of the switch block. Restore compute shaders to use the
> > fragment shade
On 2015-10-13 22:49:08, Iago Toral wrote:
> On Tue, 2015-10-13 at 09:44 -0700, Jordan Justen wrote:
> > On 2015-10-13 05:17:37, Francisco Jerez wrote:
> > > Iago Toral Quiroga writes:
> > >
> > > > This fixes the following test:
> > > >
>
indicated INVALID_OPERATION should be
returned.
Here we update the code to match the main specifications, and update
the citations use the main specification rather than the extension
specification.
Signed-off-by: Jordan Justen
---
Fixes ES31-CTS.compute_shader.api-indirect
src/mesa/main
(ssbo_float, r2)
r3 = untyped_surface_read(ssbo_float)
r4 = r3 + 1
untyped_surface_write(ssbo_float, r4)
And after CSE, we had:
r1 = untyped_surface_read(ssbo_float)
r2 = r1 + 1
untyped_surface_write(ssbo_float, r2)
r4 = r1 + 1
untyped_surface_write(ssbo_float, r4)
Signed-off-by: Jordan
ick test shows no piglit regressions on HSW after removing
> > the header from typed surface read messages.
> >
> > I guess there are two things you could do, I'm okay with either:
> >
> > - Just drop this hunk in order to stick to the letter of the BSpec and
> >always
I wrote a similar patch a while back because I was annoyed by how this
was causing the send disassembly to not be as nice. :) I dropped it
from my branch at some point, but I still think it is a good idea.
Reviewed-by: Jordan Justen
On 2015-10-18 21:31:43, Kristian Høgsberg Kristensen wrote
Reviewed-by: Jordan Justen
On 2015-10-18 21:31:44, Kristian Høgsberg Kristensen wrote:
> Instead of looping through single-component reads, read all components
> in one go.
>
> Signed-off-by: Kristian Høgsberg Kristensen
> ---
> src/mesa/drivers/dri/i965/b
On 2015-10-20 00:43:13, Iago Toral wrote:
> On Tue, 2015-10-20 at 00:12 -0700, Jordan Justen wrote:
> > An untyped surface read is volatile because it might be affected by a
> > write.
> >
> > In the ES31-CTS.compute_shader.resources-max test, two back to back
> &
On 2015-10-22 00:06:37, Iago Toral wrote:
> On Wed, 2015-10-21 at 23:24 -0700, Jordan Justen wrote:
> > On 2015-10-20 00:43:13, Iago Toral wrote:
> > > On Tue, 2015-10-20 at 00:12 -0700, Jordan Justen wrote:
> > > > An untyped surface read is volatile bec
On 2015-10-22 03:32:58, Emil Velikov wrote:
> On 19 October 2015 at 23:44, Nanley Chery wrote:
> > From: Nanley Chery
> >
> > Aside from those modified in this commit, all gl_extensions structs are
> > zero-initialized by default. There is therefore no need to memset the
> > structs to 0. Also, r
Signed-off-by: Jordan Justen
Cc: Samuel Iglesias Gonsálvez
Cc: Iago Toral Quiroga
---
src/glsl/linker.cpp | 14 ++
src/glsl/standalone_scaffolding.cpp | 5 +
src/mesa/main/mtypes.h | 7 +++
3 files changed, 26 insertions(+)
diff --git a/src
Signed-off-by: Jordan Justen
Cc: Samuel Iglesias Gonsálvez
Cc: Iago Toral Quiroga
---
src/glsl/link_uniform_initializers.cpp | 2 +-
src/glsl/linker.cpp| 16
src/glsl/standalone_scaffolding.cpp| 4 ++--
src/mesa/main/mtypes.h | 11
Previously we were treating the binding index for Uniform Buffer
Objects and Shader Storage Buffer Objects as being part of the
combined BufferInterfaceBlocks array.
Fixes ES31-CTS.compute_shader.resource-ubo on i965.
Signed-off-by: Jordan Justen
Cc: Samuel Iglesias Gonsálvez
Cc: Iago Toral
Signed-off-by: Jordan Justen
---
src/glsl/builtin_variables.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index a6ad105..00113d5 100644
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl
The OpenGLES GLSL 3.1 specification uses the precision qualifier
ordering rules from ARB_shading_language_420pack.
Signed-off-by: Jordan Justen
---
src/glsl/glsl_parser.yy | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
Signed-off-by: Jordan Justen
---
src/mesa/main/get_hash_params.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index c295615..fbc7b8f 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
src/mesa/drivers/dri/i965/gen7_cs_state.c| 32
4 files changed, 36
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 --
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 6 --
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index
Signed-off-by: Jordan Justen
---
src/mesa/main/pipelineobj.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index 51ee10f..c8c50fa 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main
Signed-off-by: Jordan Justen
---
src/mesa/main/api_validate.c | 2 +-
src/mesa/main/pipelineobj.c | 11 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/api_validate.c b/src/mesa/main/api_validate.c
index c59b6f3..46f39e7 100644
--- a/src/mesa/main
noticed so far, but I did
see several parts that did not adopt 420pack changes.
-Jordan
> On Thu, Oct 29, 2015 at 3:47 AM, Jordan Justen
> wrote:
> > The OpenGLES GLSL 3.1 specification uses the precision qualifier
> > ordering rules from ARB_shading_language_420pack.
> &g
On 2015-10-29 03:04:38, Iago Toral wrote:
> On Thu, 2015-10-29 at 00:52 -0700, Jordan Justen wrote:
> > Signed-off-by: Jordan Justen
> > ---
> > src/mesa/main/api_validate.c | 2 +-
> > src/mesa/main/pipelineobj.c | 11 +++
> > 2 files chan
On 2015-10-29 02:17:20, Iago Toral wrote:
> On Thu, 2015-10-29 at 00:50 -0700, Jordan Justen wrote:
> > Signed-off-by: Jordan Justen
> > ---
> > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 --
> > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 6 --
> &g
I sent a patch on Oct 14 for this:
"main: Match DispatchCompute* API validation from main specification"
http://patchwork.freedesktop.org/patch/61881/
You might want monitor my cs git branch for related patches to help
with the OpenGLES 3.1 CTS compute shader tests.
-Jordan
On 2015-10-29 07:
On 2015-10-30 09:28:10, Matt Turner wrote:
> On Fri, Oct 30, 2015 at 4:11 AM, Iago Toral Quiroga wrote:
> > Right now some opcodes that only use constant surface indexing mark them as
> > used in the generator while others do it in the visitor. When the opcode can
> > handle both direct and indire
On 2015-10-30 00:16:43, Iago Toral wrote:
> On Wed, 2015-10-14 at 13:46 -0700, Jordan Justen wrote:
> > There is a discrepancy between the ARB_compute_shader specification,
> > and the OpenGL 4.3 and OpenGLES 3.1 specifications. With regards to
> > the indirect dispatch p
On 2015-10-29 01:22:37, Iago Toral wrote:
> On Thu, 2015-10-29 at 00:47 -0700, Jordan Justen wrote:
> > The OpenGLES GLSL 3.1 specification uses the precision qualifier
> > ordering rules from ARB_shading_language_420pack.
>
> Maybe expand the commit log to make explicit that
extension
specification.
v2:
* Updates based on review from Iago
Signed-off-by: Jordan Justen
Cc: Iago Toral Quiroga
Cc: Marta Lofstedt
---
src/mesa/main/api_validate.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/api_validate.c b/src/mesa/main
Note: The OpenGL 4.3 - 4.5 specification language for DispatchCompute
appears to have an error regarding the max allowed values. When adding
the specification citation, we note why the code does not match the
specification language.
v2:
* Updates based on review from Iago
Signed-off-by: Jordan
On 2015-11-02 00:35:36, Jordan Justen wrote:
> Note: The OpenGL 4.3 - 4.5 specification language for DispatchCompute
> appears to have an error regarding the max allowed values. When adding
> the specification citation, we note why the code does not match the
> specification langu
Series Reviewed-by: Jordan Justen
For the 2de4e8fdbae1e1909ce35f8ba15608a124686fb0 version on your drm
gt4 branch.
On 2015-10-23 10:56:33, Ben Widawsky wrote:
> Cc: Kristian Høgsberg
> Cc: Damien Lespiau
> Signed-off-by: Ben Widawsky
> ---
> intel/intel_chipset.h | 12 +++
Seried Reviewed-by: Jordan Justen
For the dde33fc23c4ef8b8e02fb5768161fdaa078847d5 version on your mesa
gt4 branch.
On 2015-10-29 17:30:35, Ben Widawsky wrote:
> Like other gen8+ hardware, the hardware automatically scales up thread counts
> and URB sizes, so there is no need to do anythi
er_buffer
* memoryBarrierImage => __intrinsic_memory_barrier_image
* memoryBarrierShared => __intrinsic_memory_barrier_shared
Signed-off-by: Jordan Justen
---
Notes:
git://people.freedesktop.org/~jljusten/mesa cs-shader-barrier-funcs-v1
http://patchwork.freedesktop.org/bundle/jljusten/cs-shader-b
When these functions are called in glsl-ir, we create a corresponding
nir intrinsic function call.
Signed-off-by: Jordan Justen
---
src/glsl/nir/glsl_to_nir.cpp | 15 +++
src/glsl/nir/nir_intrinsics.h | 11 +++
2 files changed, 26 insertions(+)
diff --git a/src/glsl/nir
* nir_intrinsic_memory_barrier_shared
Signed-off-by: Jordan Justen
Cc: Francisco Jerez
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 7eeff93..044b83e 100644
er_buffer
* memoryBarrierImage => __intrinsic_memory_barrier_image
* memoryBarrierShared => __intrinsic_memory_barrier_shared
v2:
* Consolidate with memoryBarrier function/intrinsic creation (curro)
Signed-off-by: Jordan Justen
---
src/glsl/builtin_functions.cpp | 58 +++
On 2015-11-05 06:07:02, Francisco Jerez wrote:
> Jordan Justen writes:
>
> > When these functions are called in GLSL code, we create an intrinsic
> > function call:
> >
> > * groupMemoryBarrier => __intrinsic_group_memory_barrier
When these functions are called in glsl-ir, we create a corresponding
nir intrinsic function call.
Signed-off-by: Jordan Justen
Reviewed-by: Francisco Jerez
---
src/glsl/nir/glsl_to_nir.cpp | 15 +++
src/glsl/nir/nir_intrinsics.h | 11 +++
2 files changed, 26 insertions
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