30-32 Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
On 2015-06-03 00:01:20, Iago Toral Quiroga wrote: > This is the same we do for other things like uniforms because it ensures > optimal performance. > --- > src/mesa/drivers/dri/i965/brw_context.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_context.c > b/src/mesa/drivers/dri/i965/brw_context.c > index 274a237..5d21747 100644 > --- a/src/mesa/drivers/dri/i965/brw_context.c > +++ b/src/mesa/drivers/dri/i965/brw_context.c > @@ -544,6 +544,7 @@ brw_initialize_context_constants(struct brw_context *brw) > * However, unaligned accesses are slower, so enforce buffer alignment. > */ > ctx->Const.UniformBufferOffsetAlignment = 16; > + ctx->Const.ShaderStorageBufferOffsetAlignment = 16; > ctx->Const.TextureBufferOffsetAlignment = 16; > > if (brw->gen >= 6) { > -- > 1.9.1 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev