Re: [Mesa-dev] [Mesa-stable] [PATCH] i965/miptree: Set supports_fast_clear = false in make_shareable

Hi everyone, On Sat, Aug 19, 2017 at 8:52 AM, Emil Velikov wrote: > On 14 August 2017 at 19:42, Jason Ekstrand wrote: >> I missed the stable CC when I pushed this one. It needs to be in 17.2 >> > Ack, queued up. Thanks for the fix. I tested in our ChromeOS Android branch as well. If possible,

[Mesa-dev] [PATCH v2] radv: Implement multiview draws.

v2: - Use for_each_bit. - split emitting the draw packets out to separate functions. --- src/amd/vulkan/radv_cmd_buffer.c | 144 ++- src/amd/vulkan/radv_private.h| 1 + 2 files changed, 112 insertions(+), 33 deletions(-) diff --git a/src/amd/vulkan/ra

Re: [Mesa-dev] V2 radeonsi use STD430 packing of UBOs by default

On 22/08/17 22:14, Timothy Arceri wrote: I'm a little unsure what to do with this now. Below is my shader-db results, the majority of negative changes are from Natural Selection 2. I looked at some dumps of the worst Natural Selection 2 shaders and it seems to just be scheduling differences ca

Re: [Mesa-dev] [PATCH V3 1/5] util/disk_cache: rename mesa cache dir and introduce cache versioning

On 24.08.2017 03:11, Timothy Arceri wrote: Steam is already analysing cache items, unfortunatly we did not introduce a versioning mechanism for identifying structural changes to cache entries earlier so the only way to do so is to rename the cache directory. Since we are renaming it we take the

Re: [Mesa-dev] V2 radeonsi use STD430 packing of UBOs by default

On 24.08.2017 09:45, Timothy Arceri wrote: On 22/08/17 22:14, Timothy Arceri wrote: I'm a little unsure what to do with this now. Below is my shader-db results, the majority of negative changes are from Natural Selection 2. I looked at some dumps of the worst Natural Selection 2 shaders and i

Re: [Mesa-dev] [PATCH 1/4] radeonsi: correct maximum wave count per SIMD

On 23.08.2017 22:44, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index f02fc9e..186

Re: [Mesa-dev] [PATCH 4/4] radeonsi: get the raster config from AMDGPU on SI

Patches 2-4: Reviewed-by: Nicolai Hähnle On 23.08.2017 22:44, Marek Olšák wrote: From: Marek Olšák Not sure yet if we wanna do this on CIK and VI too. --- src/amd/common/ac_gpu_info.c| 3 +++ src/amd/common/ac_gpu_info.h| 2 ++ src/gallium/drivers/radeonsi/si_s

Re: [Mesa-dev] [PATCH 1/3] mesa: only check errors when the state change in glDepthBoundsEXT()

On 23.08.2017 17:21, Samuel Pitoiset wrote: On 08/23/2017 04:53 PM, Ilia Mirkin wrote: This is a functional change, e.g. what if glDepthBoundsEXT(2, 1) is called? Either way, I suspect it's fine, but just pointing it out in case it wasn't considered. The spec doesn't seem to explain if the

Re: [Mesa-dev] [PATCH 02/11] ac/nir: Determine if input attachments are used in the info pass.

On 23.08.2017 22:51, Bas Nieuwenhuizen wrote: --- src/amd/common/ac_shader_info.c | 11 ++- src/amd/common/ac_shader_info.h | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c index 8668c4c3446..ca599

Re: [Mesa-dev] [PATCH 03/11] ac/nir: Implement input attachments with layered rendering.

Minor comment on #2, but apart from that patches 1-3 Reviewed-by: Nicolai Hähnle On 23.08.2017 22:51, Bas Nieuwenhuizen wrote: --- src/amd/common/ac_nir_to_llvm.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/com

Re: [Mesa-dev] [PATCH 1/3] mesa: only check errors when the state change in glDepthBoundsEXT()

On 08/24/2017 10:26 AM, Nicolai Hähnle wrote: On 23.08.2017 17:21, Samuel Pitoiset wrote: On 08/23/2017 04:53 PM, Ilia Mirkin wrote: This is a functional change, e.g. what if glDepthBoundsEXT(2, 1) is called? Either way, I suspect it's fine, but just pointing it out in case it wasn't cons

Re: [Mesa-dev] [PATCH 1/2] Android: fix Android O version check for LLVM

2017-08-24 1:25 GMT+08:00 Rob Herring : > With the release of O, the MESA_ANDROID_MAJOR_VERSION has changed to 8. > Change the LLVM check to match. There's no point to continue to support 'O' > as no one is going to use an old AOSP master. > > Presumably, we'll be back here again to fix things agai

Re: [Mesa-dev] [PATCH 2/2] Android: EGL: fix missing nativewindow.h include on O

2017-08-24 1:25 GMT+08:00 Rob Herring : > The build against AOSP master and O is broken: > > external/mesa3d/include/EGL/eglplatform.h:100:10: fatal error: > 'android/native_window.h' file not found > > native_window.h has moved and is now part of libnativewindow library, so > add this dependency.

[Mesa-dev] [PATCH] radv/meta: missing initialisations in create_pass().

Otherwise radv_cmd_state_setup_attachments() will complain it has no clearvalues, when called via radv_process_depth_image_inplace(). Signed-off-by: Xavier Bouchoux --- src/amd/vulkan/radv_meta_decompress.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/vulkan/radv_meta_decompre

Re: [Mesa-dev] V2 radeonsi use STD430 packing of UBOs by default

On 24/08/17 18:12, Nicolai Hähnle wrote: On 24.08.2017 09:45, Timothy Arceri wrote: On 22/08/17 22:14, Timothy Arceri wrote: I'm a little unsure what to do with this now. Below is my shader-db results, the majority of negative changes are from Natural Selection 2. I looked at some dumps of

Re: [Mesa-dev] [PATCH 2/2] Android: EGL: fix missing nativewindow.h include on O

On 23 August 2017 at 18:25, Rob Herring wrote: > The build against AOSP master and O is broken: > > external/mesa3d/include/EGL/eglplatform.h:100:10: fatal error: > 'android/native_window.h' file not found > > native_window.h has moved and is now part of libnativewindow library, so > add this dep

[Mesa-dev] [PATCH] anv: set right datatypes in anv_pipeline_binding

This structure contains two fields, binding and index, that store the binding in the descriptor set and the index inside the binding. These structures are defined as uint8_t, but the types in Vulkan specification are uint32_t, so big values are clamp. This fixes dEQP-VK.binding_model.shader_acce

Re: [Mesa-dev] [PATCH 2/2] Android: EGL: fix missing nativewindow.h include on O

Hi; On 08/24/2017 12:08 PM, Chih-Wei Huang wrote: 2017-08-24 1:25 GMT+08:00 Rob Herring : The build against AOSP master and O is broken: external/mesa3d/include/EGL/eglplatform.h:100:10: fatal error: 'android/native_window.h' file not found native_window.h has moved and is now part of libnat

Re: [Mesa-dev] [PATCH 1/4] radeonsi: correct maximum wave count per SIMD

On Aug 24, 2017 10:17 AM, "Nicolai Hähnle" wrote: On 23.08.2017 22:44, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/radeonsi/si_shader.c | 17 - > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/radeonsi/si_shader.c

Re: [Mesa-dev] [PATCH] i965: Simplify MOCS mashing in genX_state_upload.c.

Looks good, but it looks like you could replace an additional one in upload_push_constant_packets(). Also why not name it GEN_MOCS ? (so it's a bit more consistent with other macros defined per gen). Thanks! On 23/08/17 23:57, Kenneth Graunke wrote: Instead of having a proliferation of genera

[Mesa-dev] [PATCH] i965: add 2xMSAA and 16xMSAA to DRI configs for Gen9.

From: Kevin Rogovin Special thanks to Eero Tamminen for reporting rasterizer numbers being twice what it should be for 2xMSAA under a benchmark. Signed-off-by: Kevin Rogovin --- src/mesa/drivers/dri/i965/intel_screen.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff

[Mesa-dev] [PATCH] i965: add 2xMSAA and 16xMSAA to DRI configs for Gen9.

From: Kevin Rogovin Special thanks to Eero Tamminen for reporting rasterizer numbers being twice what it should be for 2xMSAA under a benchmark. Signed-off-by: Kevin Rogovin --- src/mesa/drivers/dri/i965/intel_screen.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff

Re: [Mesa-dev] [PATCH 1/4] radeonsi: correct maximum wave count per SIMD

On 24.08.2017 12:34, Marek Olšák wrote: On Aug 24, 2017 10:17 AM, "Nicolai Hähnle" > wrote: On 23.08.2017 22:44, Marek Olšák wrote: From: Marek Olšák mailto:marek.ol...@amd.com>> --- src/gallium/drivers/radeonsi/si_shader.c | 17

Re: [Mesa-dev] [PATCH 10/10] radeonsi: add an assertion that only two-dimensional constant references are used

On 24.08.2017 03:59, Timothy Arceri wrote: On 24/08/17 02:41, Nicolai Hähnle wrote: From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c ind

Re: [Mesa-dev] [PATCH 00/47] WIP: fp64 support for r600g

Hello Elie, thanks for you work on this. I'd thought I'd share my test results on BARTS: - your tree was build with debug enabled, so some of the crashes  relate to assertion failures (at least one in r600/sb which also fails with R600_DEBUG=nosb). - piglit results  * arb_gpu_shader_f

Re: [Mesa-dev] [PATCH 1/4] radeonsi: correct maximum wave count per SIMD

On Aug 24, 2017 1:21 PM, "Nicolai Hähnle" wrote: On 24.08.2017 12:34, Marek Olšák wrote: > > > On Aug 24, 2017 10:17 AM, "Nicolai Hähnle" nhaeh...@gmail.com>> wrote: > > On 23.08.2017 22:44, Marek Olšák wrote: > > From: Marek Olšák mailto:marek.ol...@amd.com > >> > > > --- >

Re: [Mesa-dev] [PATCH 10/10] radeonsi: add an assertion that only two-dimensional constant references are used

On 24/08/17 21:23, Nicolai Hähnle wrote: On 24.08.2017 03:59, Timothy Arceri wrote: On 24/08/17 02:41, Nicolai Hähnle wrote: From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/s

[Mesa-dev] [PATCH 1/4] mesa: remove unused _mesa_validate_transform_feedback_buffers()

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 15 --- src/mesa/main/transformfeedback.h | 4 2 files changed, 19 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index fdc3152a09..9ffbfe7e6c 100644 --- a/s

[Mesa-dev] [PATCH 2/4] mesa: check allocation failures in new_transform_feedback()

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index 9ffbfe7e6c..e30448ea4f 100644 --- a/src/mesa/main/transformfeedback.c +++ b/src/mesa/main/trans

[Mesa-dev] [PATCH 4/4] mesa: add _fallback suffix to the default transform feedback functions

In preparation for KHR_no_error support. Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index 62a4

[Mesa-dev] [PATCH 3/4] mesa: remove unnecessary check in _mesa_init_transform_feedback_object()

All callers already check that, and the common behaviour is to check in the _mesa_new_XXX() helpers anyway. Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedb

[Mesa-dev] [PATCH] mesa: don't error check the default buffer object in glBindBufferOffsetEXT()

An allocation check is already done when the buffer is created at context creation. Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfee

Re: [Mesa-dev] TGSI 16-bit support

On Wed, Aug 23, 2017 at 6:19 PM, Marek Olšák wrote: > On Wed, Aug 23, 2017 at 3:08 PM, Nicolai Hähnle wrote: >> >> Here's another question: What does "low precision" mean on a texture >> instruction? Are the offsets low precision or is it the output? Maybe we can >> punt on this for now -- at lea

[Mesa-dev] [PATCH] radeonsi: set IF_THRESHOLD to 4

In 74e39de9324d it was set to 3 and it was reported that 4 caused tesseract to start spilling VGPRs. This no longer seems to be the case. Totals: SGPRS: 2787844 -> 2787764 (-0.00 %) VGPRS: 1713121 -> 1712717 (-0.02 %) Spilled SGPRs: 7532 -> 7532 (0.00 %) Spilled VGPRs: 49 -> 33 (-32.65 %) Private

Re: [Mesa-dev] [PATCH 2/2] Revert "st/va: add enviromental variable to disable interlace"

On 08/24/2017 02:56 AM, Michel Dänzer wrote: On 24/08/17 06:41 AM, Leo Liu wrote: This reverts commit 10dec2de2d9f568675d66d736b48701fa26f7b50. Every revert commit should have justification in the commit log. In this case, I imagine it could be something like "The environment variable is no l

Re: [Mesa-dev] [PATCH 2/2] Android: EGL: fix missing nativewindow.h include on O

On Thursday, 2017-08-24 11:07:27 +0100, Emil Velikov wrote: > On 23 August 2017 at 18:25, Rob Herring wrote: > > The build against AOSP master and O is broken: > > > > external/mesa3d/include/EGL/eglplatform.h:100:10: fatal error: > > 'android/native_window.h' file not found > > > > native_window

[Mesa-dev] [PATCH mesa] khronos/egl: remove dependency on Android NDK header

Khronos: https://github.com/KhronosGroup/EGL-Registry/pull/22 Cc: Rob Herring Cc: Emil Velikov Signed-off-by: Eric Engestrom --- include/EGL/eglplatform.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/EGL/eglplatform.h b/include/EGL/eglplatform.h index f045d009c0

Re: [Mesa-dev] [PATCH 1/2] st/va: move YUV content to deinterlaced buffer when reallocated for encoder

On 08/24/2017 02:52 AM, Christian König wrote: Am 23.08.2017 um 23:41 schrieb Leo Liu: Signed-off-by: Leo Liu --- src/gallium/state_trackers/va/picture.c | 40 + 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/src/gallium/state_trackers/va/p

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/2] i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.

Kenneth, for 17.1, this patch depends on f9fd976e8adb and others. If you still want to add it for 17.1, I think we would need a backport. Br. On Thu, 2017-08-17 at 15:16 -0700, Kenneth Graunke wrote: > When changing fast clear colors, we need to emit new SURFACE_STATE > with the updated color at

[Mesa-dev] [PATCH 02/14] mesa: add KHR_no_error support to glBindTransformFeedback()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/EXT_transform_feedback.xml | 2 +- src/mesa/main/transformfeedback.c | 8 src/mesa/main/transformfeedback.h | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/EXT_transfo

[Mesa-dev] [PATCH 01/14] mesa: add bind_transform_feedback() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index a075d0875a..d61db4eb62 100644 --- a/src/mesa/main/tr

[Mesa-dev] [PATCH 00/14] KHR_no_error support to various TFB functions

Hi, Some more simple patches for KHR_no_error support. Please review, thanks! Samuel Pitoiset (14): mesa: add bind_transform_feedback() helper mesa: add KHR_no_error support to glBindTransformFeedback() mesa: add begin_transform_feedback() helper mesa: add KHR_no_error support to glBeginTr

[Mesa-dev] [PATCH 04/14] mesa: add KHR_no_error support to glBeginTransformFeedback()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/GL3x.xml | 2 +- src/mesa/main/transformfeedback.c | 8 src/mesa/main/transformfeedback.h | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/GL3x.xml b/src/mapi/glapi/gen/GL3x.xml index 8d

[Mesa-dev] [PATCH 03/14] mesa: add begin_transform_feedback() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 49 --- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index 307728c399..b217d0d84a 100644 --- a/src/m

[Mesa-dev] [PATCH 05/14] mesa: add end_transform_feedback() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index 47c72ca1b1..b32d0e6c53 100644 --- a/src/mesa/main/trans

[Mesa-dev] [PATCH 06/14] mesa: add KHR_no_error support to glEndTransformFeedback()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/GL3x.xml | 2 +- src/mesa/main/transformfeedback.c | 8 src/mesa/main/transformfeedback.h | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/GL3x.xml b/src/mapi/glapi/gen/GL3x.xml index 54

[Mesa-dev] [PATCH 07/14] mesa: add pause_transform_feedback() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 22 +++--- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index 2d33555f35..2da7f635ba 100644 --- a/src/mesa/main/transform

[Mesa-dev] [PATCH 11/14] mesa: add transform_feedback_varyings() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 63 +++ 1 file changed, 37 insertions(+), 26 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index a0bb088f34..452a50e6cc 100644 --- a/src/m

[Mesa-dev] [PATCH 10/14] mesa: add KHR_no_error support to glResumeTransformFeedback()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/EXT_transform_feedback.xml | 2 +- src/mesa/main/transformfeedback.c | 8 src/mesa/main/transformfeedback.h | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/EXT_transfo

[Mesa-dev] [PATCH 09/14] mesa: add resume_transform_feedback() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 22 +++--- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index d274a39cfa..a558c47470 100644 --- a/src/mesa/main/transform

[Mesa-dev] [PATCH 08/14] mesa: add KHR_no_error support to glPauseTransformFeedback()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/EXT_transform_feedback.xml | 2 +- src/mesa/main/transformfeedback.c | 8 src/mesa/main/transformfeedback.h | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/EXT_transfo

[Mesa-dev] [PATCH 12/14] mesa: add KHR_no_error support to glTransformFeedbackVaryings()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/GL3x.xml | 2 +- src/mesa/main/transformfeedback.c | 11 +++ src/mesa/main/transformfeedback.h | 5 + 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/GL3x.xml b/src/mapi/glapi/gen/GL3x.xml

[Mesa-dev] [PATCH 14/14] mesa: add KHR_no_error support to glBindBufferOffsetEXT()

Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/EXT_transform_feedback.xml | 2 +- src/mesa/main/transformfeedback.c | 10 ++ src/mesa/main/transformfeedback.h | 4 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/EXT_t

[Mesa-dev] [PATCH 13/14] mesa: add bind_buffer_offset() helper

Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 36 +++- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/src/mesa/main/transformfeedback.c b/src/mesa/main/transformfeedback.c index be74810ed9..d5efaccff0 100644 --- a/src/mesa

Re: [Mesa-dev] [PATCH 1/4] radeonsi: correct maximum wave count per SIMD

On 24.08.2017 13:32, Marek Olšák wrote: On Aug 24, 2017 1:21 PM, "Nicolai Hähnle" > wrote: On 24.08.2017 12 :34, Marek Olšák wrote: On Aug 24, 2017 10:17 AM, "Nicolai Hähnle" mailto:nhaeh...@gmail.com>

Re: [Mesa-dev] [PATCH 01/14] mesa: add bind_transform_feedback() helper

On Thu, Aug 24, 2017 at 9:21 AM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/mesa/main/transformfeedback.c | 28 ++-- > 1 file changed, 18 insertions(+), 10 deletions(-) > > diff --git a/src/mesa/main/transformfeedback.c > b/src/mesa/main/transfor

Re: [Mesa-dev] [PATCH] radeonsi: set IF_THRESHOLD to 4

Acked-by: Nicolai Hähnle On 24.08.2017 14:46, Timothy Arceri wrote: In 74e39de9324d it was set to 3 and it was reported that 4 caused tesseract to start spilling VGPRs. This no longer seems to be the case. Totals: SGPRS: 2787844 -> 2787764 (-0.00 %) VGPRS: 1713121 -> 1712717 (-0.02 %) Spilled

Re: [Mesa-dev] TGSI 16-bit support

On 24.08.2017 14:19, Erik Faye-Lund wrote: On Wed, Aug 23, 2017 at 6:19 PM, Marek Olšák wrote: On Wed, Aug 23, 2017 at 3:08 PM, Nicolai Hähnle wrote: Here's another question: What does "low precision" mean on a texture instruction? Are the offsets low precision or is it the output? Maybe we

[Mesa-dev] [PATCH] glsl: fix glsl_struct_field size calculations for shader cache

From: Nicolai Hähnle Found by address sanitizer: ==22621==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6140cbd8 at pc 0x7f561610a4ff bp 0x7ffca85f9d50 sp 0x7ffca85f94f8 READ of size 344 at 0x6140cbd8 thread T0 #0 0x7f561610a4fe (/usr/lib/x86_64-linux-gnu/libasan.so.3+

Re: [Mesa-dev] [PATCH 4/4] radeonsi: get the raster config from AMDGPU on SI

On Thu, Aug 24, 2017 at 4:20 AM, Nicolai Hähnle wrote: > Patches 2-4: > > Reviewed-by: Nicolai Hähnle > > > On 23.08.2017 22:44, Marek Olšák wrote: >> >> From: Marek Olšák >> >> Not sure yet if we wanna do this on CIK and VI too. Any reason why we only do this for SI? Alex >> --- >> src/amd

[Mesa-dev] [PATCH] gallium/docs: fix a reference link for get_paramf

Previous get_paramf links same as get_param. It changes the reference link to PIPE_CAPF_* Signed-off-by: Mun Gwan-gyeong --- src/gallium/docs/source/screen.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen

[Mesa-dev] [PATCH] mesa: port the LastLookedUpVAO optimisation to _mesa_lookup_vao()

It was only used in the errors path. Signed-off-by: Samuel Pitoiset --- src/mesa/main/arrayobj.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/mesa/main/arrayobj.c b/src/mesa/main/arrayobj.c index 600177cc5c..88a5702f41 100644 --- a/src/mesa/main/a

Re: [Mesa-dev] [PATCH mesa] khronos/egl: remove dependency on Android NDK header

On Thu, Aug 24, 2017 at 7:49 AM, Eric Engestrom wrote: > Khronos: https://github.com/KhronosGroup/EGL-Registry/pull/22 > Cc: Rob Herring > Cc: Emil Velikov > Signed-off-by: Eric Engestrom > --- > include/EGL/eglplatform.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git

[Mesa-dev] [PATCH 00/47] V2 anv: SPV_KHR_16bit_storage/VK_KHR_16bit_storage for gen8+

Hello, this is the V2 series for the implementation of the SPV_KHR_16bit_storage and VK_KHR_16bit_storage extensions on the anv vulkan driver, in addition to the GLSL and NIR support needed. The original series can be found here [1]. In short V2 includes the following: * Updates on several pat

[Mesa-dev] [PATCH 02/47] mesa/st: Handle 16-bit types at st_glsl_storage_type_size()

From: Eduardo Lima Mitev This is basically to avoid "not handle in switch" warnings. v2: Let the new types hit the assertion instead. (Marek Olšák and Jason Ekstrand) --- src/mesa/state_tracker/st_glsl_types.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/state_tracker/s

[Mesa-dev] [PATCH 01/47] glsl: Add 16-bit types

From: Eduardo Lima Mitev Adds new INT16, UINT16 and FLOAT16 base types. The corresponding GL types for half floats were reused from the AMD_gpu_shader_half_float extension. The int16 and uint16 types come from NV_gpu_shader_5 extension. This adds the builtins and the lexer support. To avoid a

[Mesa-dev] [PATCH 04/47] nir: Add rounding modes enum

From: Jose Maria Casanova Crespo v2: Added comments describing each of the rounding modes. (Jason Ekstrand) --- src/compiler/nir/nir.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 835e18fe6dd..e6e4dff480a 100644 --- a/s

[Mesa-dev] [PATCH 03/47] nir: Add support for 16-bit types (half float, int16 and uint16)

From: Eduardo Lima Mitev v2: Renamed glsl_half_float_type() to glsl_float16_t_type(). (Jason Ekstrand) Signed-off-by: Jose Maria Casanova Crespo Signed-off-by: Eduardo Lima --- src/compiler/nir/nir.c | 6 ++ src/compiler/nir/nir.h | 9 + src

[Mesa-dev] [PATCH 05/47] nir: Populate conversion opcodes to/from 16-bit types

From: Eduardo Lima Mitev This will include the following NIR ALU opcodes: * nir_op_i2i16 * nir_op_i2f16 * nir_op_u2u16 * nir_op_u2f16 * nir_op_f2i16 * nir_op_f2u16 * nir_op_f2f16 Reviewed-by: Jason Ekstrand --- src/compiler/nir/nir_opcodes_c.py | 2 +- 1 file changed, 1 insertion(+), 1

[Mesa-dev] [PATCH 06/47] nir: Handle fp16 rounding modes at nir_type_conversion_op

From: Jose Maria Casanova Crespo nir_type_conversion enables new operations to handle rounding modes to convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne and nir_op_f2f16_rtz. The undefined behaviour doesn't has any effect and uses the original nir_op_f2f16 operation. v2: In

[Mesa-dev] [PATCH 07/47] spirv/nir: Handle 16-bit types

From: Eduardo Lima Mitev v2: Added more missing implementations of 16-bit types. (Jason Ekstrand) Signed-off-by: Jose Maria Casanova Crespo Signed-off-by: Eduardo Lima --- src/compiler/spirv/spirv_to_nir.c | 46 -- src/compiler/spirv/vtn_variables.c | 21 +

[Mesa-dev] [PATCH 08/47] spirv: Enable FPRoundingMode decorator to nir operations

From: Jose Maria Casanova Crespo SpvOpFConvert now manages the FPRoundingMode decorator for the returning values enabling the nir_rounding_mode in the conversion operation to fp16 values. v2: Fixed breaking of specialization constants. (Jason Ekstrand) --- src/compiler/spirv/vtn_alu.c | 32

[Mesa-dev] [PATCH 09/47] spirv/nir: Add support for SPV_KHR_16bit_storage

From: Eduardo Lima Mitev v2: Minor changes after rebase against recent master (Alejandro Pinheiro) --- src/compiler/spirv/nir_spirv.h| 1 + src/compiler/spirv/spirv_to_nir.c | 7 +++ 2 files changed, 8 insertions(+) diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/ni

[Mesa-dev] [PATCH 10/47] i965/vec4: Handle 16-bit types at type_size_xvec4

These types have similar vec4 sizes as their 32-bit counterparts. The vec4 backend doesn't support 16-bit types and probably never will, but this method is called by the scalar backend at fs_visitor::nir_setup_outputs(), so we still need to provide valid vec4 sizes for 16-bit types. In the future,

[Mesa-dev] [PATCH 11/47] i965: Support for 16-bit base types in helper functions

From: Jose Maria Casanova Crespo v2: Fixed calculation of scalar size for 16-bit types. (Jason Ekstrand) Signed-off-by: Jose Maria Casanova Crespo Signed-off-by: Eduardo Lima --- src/intel/compiler/brw_fs.cpp | 4 src/intel/compiler/brw_nir.c | 16 src/intel/co

[Mesa-dev] [PATCH 12/47] i965/fs: Add brw_reg_type_from_bit_size utility method

Returns the brw_type for a given ssa.bit_size, and a reference type. So if bit_size is 64, and the reference type is BRW_REGISTER_TYPE_F, it returns BRW_REGISTER_TYPE_DF. The same applies if bit_size is 32 and reference type is BRW_REGISTER_TYPE_HF it returns BRW_REGISTER_TYPE_F Signed-off-by: Jos

[Mesa-dev] [PATCH 16/47] i965/fs: Need to allocate as minimum 32-bit register

From Intel PRM vol07, page 781 "5. Special Cases for Word Operations" "There is a relaxed alignment rule for word destinations. When the destination type is word (UW, W, HF), destination data types can be aligned to either the lowest word or the second lowest word of the execution channel. This

[Mesa-dev] [PATCH 15/47] i965/fs: Retype 16-bit/stride2 movs to UD on nir_op_vecX

Due to 32-bit alignment, we are fully using those registers even if the type is 16-bit. This change allows copy propagation to work on those registers without making the optimization pass too complicated. --- src/intel/compiler/brw_fs_nir.cpp | 19 +++ 1 file changed, 19 insertion

[Mesa-dev] [PATCH 19/47] i965: Add support for control register

From: Jose Maria Casanova Crespo Control register cr0 in i965 can be used to change the rounding modes in 32-bit to 16-bit floating-point conversions. From intel Skylake PRM, vol 07, section "Register and Tegister Regions", subsection "Control Register" (page 754): "Subregister cr0.0:ud contai

[Mesa-dev] [PATCH 14/47] i965/fs: Set stride 2 when dealing with 16-bit floats/ints

From: Jose Maria Casanova Crespo From Skylake PRM, Volume 07 3D Media GPGPU, Section Register Region Restrictions, SubSection 5. Special Cases for Word Operations (page 781): "There is a relaxed alignment rule for word destinations. When the destination type is word (UW, W, HF), destinati

[Mesa-dev] [PATCH 13/47] i965/fs: Remove BRW_REGISTER_TYPE_HF assert at get_exec_type

Note that we don't remove the assert at i965/vec4. At this point half float support is only for the scalar backend. --- src/intel/compiler/brw_ir_fs.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h index 58beae0d1f0..aa8b48e4dc

[Mesa-dev] [PATCH 17/47] i965/fs: Update assertion on copy propagation

That assertion was checking that the effective_width * size_element was a multiple of REG_SIZE. But for HF we are using the full REG_SIZE, even if the element is smaller. See "i965: need to allocate as minimum 32-bit register" for more info --- src/intel/compiler/brw_fs_copy_propagation.cpp | 2 +

[Mesa-dev] [PATCH 18/47] i965/fs: Handle 32-bit to 16-bit conversions

These conversions to 16-bit don't need anything special at this point. The stride should have already been adjusted before, for all 16-bit destination ALUs. Signed-off-by: Eduardo Lima Signed-off-by: Alejandro Piñeiro --- src/intel/compiler/brw_fs_nir.cpp | 18 ++ 1 file changed

[Mesa-dev] [PATCH 22/47] i965/fs: Add remove_extra_rounding_modes optimization

Although from SPIR-V point of view, rounding modes are attached to the operation/destination, on i965 it is a status, so we don't need to explicitly set the rounding mode if the one we want is already set. --- src/intel/compiler/brw_fs.cpp | 42 ++ src/intel

[Mesa-dev] [PATCH 21/47] i965/fs: Enable rounding mode on f2f16 ops

By default we don't set the rounding mode. We only set round-to-near-even or round-to-zero mode if explicitly set from nir. Signed-off-by: Jose Maria Casanova Crespo Signed-off-by: Alejandro Piñeiro --- src/intel/compiler/brw_fs_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git

[Mesa-dev] [PATCH 20/47] i965/fs: Define new shader opcodes to set rounding modes

Although it is possible to emit them directly as AND/OR on brw_fs_nir, having specific opcodes makes it easier to remove duplicate settings later. Signed-off-by: Alejandro Piñeiro Signed-off-by: Jose Maria Casanova Crespo --- src/intel/compiler/brw_eu.h | 3 +++ src/intel/compile

[Mesa-dev] [PATCH 23/47] i965/fs: Support push constants of 16-bit types

From: Jose Maria Casanova Crespo We enable the use of 16-bit values in push constants modifying the assign_constant_locations function to work with 16-bit types. The API to access buffers in Vulkan use multiples of 4-byte for offsets and sizes. Current accountability of uniforms based on 4-byte

[Mesa-dev] [PATCH 24/47] i965/fs: Add byte scattered write message and fs support

From: Jose Maria Casanova Crespo Signed-off-by: Jose Maria Casanova Crespo Signed-off-by: Alejandro Piñeiro --- src/intel/compiler/brw_eu.h| 6 ++ src/intel/compiler/brw_eu_defines.h| 17 + src/intel/compiler/brw_eu_emit.c | 89 +++

[Mesa-dev] [PATCH 25/47] i965/fs: Adjust type_size/type_slots on store_ssbo

--- src/intel/compiler/brw_fs_nir.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 0e7738761c1..6791b2c7a4f 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.c

[Mesa-dev] [PATCH 26/47] i965/fs: Use byte_scattered_write on 16-bit store_ssbo

We need to rely on byte scattered writes as untyped writes are 32-bit size. We could try to keep using 32-bit messages when we have two or four 16-bit elements, but for simplicity sake, we use the same message for any component number. We should revisit this in the future. --- src/intel/compiler/b

[Mesa-dev] [PATCH 27/47] i965/fs: Add byte scattered read message and fs support

From: Jose Maria Casanova Crespo --- src/intel/compiler/brw_eu.h| 7 + src/intel/compiler/brw_eu_defines.h| 2 ++ src/intel/compiler/brw_eu_emit.c | 41 ++ src/intel/compiler/brw_fs.cpp | 10 +++ src

[Mesa-dev] [PATCH 28/47] i965/fs: Use byte scattered read

From: Jose Maria Casanova Crespo Added on do_untyped_vector_read, that is used on the following intrinsics: * nir_intrinsic_load_shared * nir_intrinsic_load_ubo * nir_intrinsic_load_ssbo --- src/intel/compiler/brw_fs_nir.cpp | 27 +++ 1 file changed, 23 insertion

[Mesa-dev] [PATCH 29/47] compiler: Mark when input/ouput attribute at VS uses 16-bit

From: Jose Maria Casanova Crespo New shader attribute to mark when a location has 16-bit value. This patch includes support on mesa glsl and nir. --- src/compiler/glsl_types.h | 24 src/compiler/nir/nir_gather_info.c | 23 --- src/compiler/ni

[Mesa-dev] [PATCH 31/47] anv/pipeline: Use 32-bit surface formats for 16-bit formats

From Vulkan 1.0.50 spec, Section 3.30.1. Format Definition: VK_FORMAT_R16G16_SFLOAT A two-component, 32-bit signed floating-point format that has a 16-bit R component in bytes 0..1, and a 16-bit G component in bytes 2..3. So this format expects those 16-bit floats to be passed wit

[Mesa-dev] [PATCH 32/47] anv/cmd_buffer: Add a padding to the vertex buffer

As we are using 32-bit surface formats with 16-bit elements we can be on a situation where a vertex element can poke over the buffer by 2 bytes. To avoid that we add a padding when flushing the state. This is similar to what the i965 drivers prior to Haswell do, as they use 4-component formats to

[Mesa-dev] [PATCH 30/47] i965/compiler: includes 16-bit vertex input

From: Jose Maria Casanova Crespo Includes the info about 16-bit vertex inputs coming from nir on brw VS prog data, as we already do with 64-bit vertex input. --- src/intel/compiler/brw_compiler.h | 1 + src/intel/compiler/brw_vec4.cpp | 1 + 2 files changed, 2 insertions(+) diff --git a/src/i

[Mesa-dev] [PATCH 33/47] i965/fs: Unpack 16-bit from 32-bit components in VS load_input

From: Jose Maria Casanova Crespo The VS load input for 16-bit values receives pairs of 16-bit values packed in 32-bit values. Because of the adjusted format used at: anv/pipeline: Use 32-bit surface formats for 16-bit formats --- src/intel/compiler/brw_fs_nir.cpp | 29 +

Re: [Mesa-dev] [PATCH 01/14] mesa: add bind_transform_feedback() helper

On 08/24/2017 03:24 PM, Ilia Mirkin wrote: On Thu, Aug 24, 2017 at 9:21 AM, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/mesa/main/transformfeedback.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/src/mesa/main/transfor

[Mesa-dev] [PATCH 36/47] i965/disasm: Show half-precision data_format on rt_writes

From: Jose Maria Casanova Crespo --- src/intel/compiler/brw_disasm.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 3a33614523c..689b2699942 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_

[Mesa-dev] [PATCH 34/47] i965/fs: Enable Render Target Write for 16-bit outputs

From: Jose Maria Casanova Crespo Broadwell doesn't support half precisions data formats on render target writes (RTW) messages. So the solution to write 16-bit outputs is to use the conversion from 32-bit to 16-bit when writing 32-bit values on a 16-bit format surface using formats like R16_FLOAT

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