The name has become a little misleading now that it applies
to both r600g and radeonsi.
Signed-off-by: Edward O'Callaghan
---
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 2 +-
src/gallium/drivers/radeonsi/glsl_tests/amdg
On 20/02/17 05:42 PM, Edward O'Callaghan wrote:
> The name has become a little misleading now that it applies
> to both r600g and radeonsi.
R600_DEBUG must continue to work.
Making RADEON_DEBUG work as well may be a good idea though.
--
Earthling Michel Dänzer | htt
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 224 +
src/amd/vulkan/radv_private.h | 12 ++-
src/amd/vulkan/si_cmd_buffer.c | 2 +-
3 files changed, 148 insertions(+), 90 deletions(-)
diff --git a/src/amd/vulkan/radv_device.c b/
The preamble flushes now and the rest is the responsibility of the app.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5aea0e9de4b.
So that we can use it without a cmd_buffer.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/si_cmd_buffer.c | 141 ++---
1 file changed, 77 insertions(+), 64 deletions(-)
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index e
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7900ece9c89..4ec62a73585 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -990,6
For flushing we don't want to flush every third IB.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 6 +++---
src/amd/vulkan/radv_radeon_winsys.h | 3 ++-
src/amd/vulkan/radv_wsi.c | 2 +-
src/amd/vulkan/winsys/amdgpu/radv_amd
On 02/19/2017 03:06 AM, Timothy Arceri wrote:
I would have thought this commit [1] should have fixed it for android as
weel as scons.
[1]
https://cgit.freedesktop.org/mesa/mesa/commit/?id=172c48cc15e2a7b42a7de8ff9164ad8733155667
Problem is that we have ENABLE_SHADER_CACHE on because it is li
Reviewed-by: Tapani Pälli
On 02/19/2017 12:10 AM, Mauro Rossi wrote:
Required due to d4fa083 "util: Add utility build-id code."
to avoid following build error and warnings:
external/mesa/src/intel/vulkan/anv_device.c:60:32: error: incompatible integer
to pointer conversion initializing 'const
The name has become a little misleading now that it applies
to both r600g and radeonsi.
V.2: Michel Dänzer - R600_DEBUG must continue to work.
Signed-off-by: Edward O'Callaghan
---
src/gallium/drivers/r600/r600_pipe.c | 1 +
src/gallium/drivers/radeon/r600_pipe_common.c
On 02/20/2017 09:15 PM, Edward O'Callaghan wrote:
> The name has become a little misleading now that it applies
> to both r600g and radeonsi.
>
> V.2: Michel Dänzer - R600_DEBUG must continue to work.
>
> Signed-off-by: Edward O'Callaghan
> ---
> src/gallium/drivers/r600/r600_pipe.c
https://bugs.freedesktop.org/show_bug.cgi?id=97921
--- Comment #5 from Maxqia ---
Sorry, Nevermind. This was an issue with Wine...
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-de
https://bugs.freedesktop.org/show_bug.cgi?id=97921
Maxqia changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=97921
Maxqia changed:
What|Removed |Added
Resolution|INVALID |NOTOURBUG
--
You are receiving this mail becau
NVM this patch, the error was caused by an issue in Wine.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
On 18/02/17 23:59, Jason Ekstrand wrote:
This fixes a some rendering corruption in The Talos Principle
Cc: "13.0 17.0"
---
src/intel/vulkan/anv_query.c | 22 --
src/intel/vulkan/genX_cmd_buffer.c | 27 +++
2 files changed, 27 insertions(+),
I have a tiny suggestion below and also one on patch 2.
Regardless, this series is :
Reviewed-by: Lionel Landwerlin
On 18/02/17 23:59, Jason Ekstrand wrote:
---
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --g
On 18/02/17 21:32, Jason Ekstrand wrote:
Found by inspection
Cc: "13.0 17.0"
---
src/intel/vulkan/anv_query.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/vulkan/anv_query.c b/src/intel/vulkan/anv_query.c
index 293257b..d674e83 100644
--- a/src/intel/vulkan/anv_query.c
++
From: Nicolai Hähnle
Also handle the GL_ARB_indirect_parameters case where the count itself
is in a buffer.
Use transfers rather than mapping the buffers directly. This anticipates
the possibility that the buffers are sparse (once ARB_sparse_buffer is
implemented), in which case they cannot be m
From: Nicolai Hähnle
The same PS epilog workaround as for 8-bit integer formats is required,
since the CB doesn't do clamping.
Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels*.
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/galli
2017-02-20 11:19 GMT+01:00 Edward O'Callaghan :
>
> On 02/20/2017 09:15 PM, Edward O'Callaghan wrote:
>> The name has become a little misleading now that it applies
>> to both r600g and radeonsi.
>>
>> V.2: Michel Dänzer - R600_DEBUG must continue to work.
>>
>> Signed-off-by: Edward O'Callaghan
>
On 02/20/2017 10:41 PM, Gustaw Smolarczyk wrote:
> 2017-02-20 11:19 GMT+01:00 Edward O'Callaghan :
>>
>> On 02/20/2017 09:15 PM, Edward O'Callaghan wrote:
>>> The name has become a little misleading now that it applies
>>> to both r600g and radeonsi.
>>>
>>> V.2: Michel Dänzer - R600_DEBUG must c
On Mon, 2017-02-20 at 08:58 +0100, Samuel Iglesias Gonsálvez wrote:
> On Sat, 2017-02-18 at 18:58 -0800, Francisco Jerez wrote:
> > Samuel Iglesias Gonsálvez writes:
> >
> > > The lowered BSW/BXT indirect move instructions had incorrect
> > > source types, which luckily wasn't causing incorrect a
Mesa 13.0.5 is now available.
In this release we have:
On the GLX/EGL front we have a GLVND fix for "The Binding of Isaac: Rebirth"
and other games, EGL Wayland buffer age rendering is back to normal.
Over a dozen of GLSL patches, addressing multiple CTS/dEQP tests.
A couple Vulkan WSI entrypoi
Applies on top of Jason's patch :
https://patchwork.freedesktop.org/patch/139603/
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/intel/isl/isl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 1a47da5257..3b4579b343 100644
On 02/20/2017 11:31 AM, Tapani Pälli wrote:
Reviewed-by: Tapani Pälli
FYI while this fixes the build errors it seems that there is some issue
within the code that this enables, I'm getting a segfault within
dl_iterate_phdr, will investigate why this is.
On 02/19/2017 12:10 AM, Mauro Rossi
On 18/02/17 00:03, Jason Ekstrand wrote:
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces. This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop. Running Talos on
medium settings with 8x MSAA, this improves the framera
https://bugs.freedesktop.org/show_bug.cgi?id=99246
Mathieu Belanger changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|NOTOURBUG
From: "Lonnberg, Toni"
The shader disassembly now shows the SFID field and will always output the
second source operand in the disassembled SEND and SENDC instructions.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/s
From: "Lonnberg, Toni"
Pre-work for shader disassembly label support.
Adding label support of jump instructions for shader disassembly requires
including brw_eu.h for the handling of the INTEL_DEBUG flags. brw_eu.h
includes brw_defines.h which also defines the command buffer opcodes, so they
nee
From: "Lonnberg, Toni"
The instruction options are now output in front of the decoded descriptor
information of SEND/SENDC instructions.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 99 +-
1 file changed, 50 insertions(+), 49 deletions(-)
diff --git a/src/mesa/dr
From: "Lonnberg, Toni"
This and the following other patch set replace these previous patches:
[PATCH 3/3] Changed shader disassembler number formatting to use integers when
the "disasm" debug flag is used. Register types and regions are also now
formatted morelike in the architecture docu
From: "Lonnberg, Toni"
Pre-work for shader disassembly label support.
Setting the "disasm" flag in the INTEL_DEBUG flags will enable label support
for the shader disassembly and change the formatting of immediate values to
use hexadecimals for all types.
---
src/mesa/drivers/dri/i965/intel_debu
From: "Lonnberg, Toni"
Pre-work for the new shader assembler.
To avoid ambiguity in the shader assembler when parsing, all immediate values
will need a delimiter to describe the type of the value being used. For
consistency, all register values are formatted with the same delimiter.
---
src/mes
From: "Lonnberg, Toni"
Pre-work for shader disassembly label support.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 12 ++--
src/mesa/drivers/dri/i965/brw_eu.h | 2 ++
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/dr
From: "Lonnberg, Toni"
This and the previous shader disassembly patches replace these previous
patches:
[PATCH 3/3] Changed shader disassembler number formatting to use integers when
the "disasm" debug flag is used. Register types and regions are also now
formatted morelike in the archite
From: "Lonnberg, Toni"
The shader disassembly now decodes SENDS/SENDSC instructions. Due to ambiguity
in the documentation, the decoding of the version where a scalar register is
used as the extra descriptor, this might need to be re-implemented.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 109
From: "Lonnberg, Toni"
Corrected the indentation where tabs were being used.
---
src/mesa/drivers/dri/i965/brw_eu.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c
b/src/mesa/drivers/dri/i965/brw_eu.c
index
From: "Lonnberg, Toni"
Pre-work for the new shader assembler.
For the assembler to be able to produce the same bit representation for
immediate values used by disassembled shaders, the disassembly needs to output
the values as hexadecimals. To remove any ambiguity between the value and the
type,
From: "Lonnberg, Toni"
Shader instructions which use UIP/JIP now get formatted with a label instead
of an immediate value if the "disasm" flag has been set in the INTEL_DEBUG
debug flags, and the jump targets themselves also get printed as labels into
the shader disassembly.
---
src/intel/tools/
From: "Lonnberg, Toni"
The decoded information about the message descriptors in SEND/SENDC
instructions are formatted to the same line as the instruction in shader
disassembly so that it's more readable and easier for the new shader
assembler to parse.
---
src/mesa/drivers/dri/i965/brw_disasm.c
From: "Lonnberg, Toni"
Pre-work for shader disassembly label support.
Introduction of the structures and functions used by the shader disassembly
jump target labeling.
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_eu.c | 46 ++
The function definition is now next to where the other similar functions are
defined.
---
src/mesa/drivers/dri/i965/brw_eu.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index cd7b9db..99f8f75 100644
From: "Lonnberg, Toni"
Pre-work for the new shader assembler.
To follow more the style of the documentation and for the shader assembler
parser to be able to handle different styles of register region definitions,
the vertical stride is now delimited differently from the width and horizontal
str
From: "Lonnberg, Toni"
If the "disasm" flag is used in the INTEL_DEBUG debug flags, as all immediate
values will be output as hexadecimals, the values are not easily understood
when just looking at the disassembly so now the values are output in a legible
format as a comment field after the instr
From: "Lonnberg, Toni"
Pre-work for the new shader assember.
To produce the exact same bit representation, the assembler needs to see the
swizzle of the source operands even when RepCtrl is not set.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deleti
From: "Lonnberg, Toni"
Pre-work for the new shader assembler.
To make it easier to read the shader disassembly, the message descriptor is
typed as
unsigned so it's easier to decode the individual parts from the disassembled
hexadecimal value.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c
https://bugs.freedesktop.org/show_bug.cgi?id=98833
--- Comment #14 from Pekka Paalanen ---
(In reply to Eero Tamminen from comment #9)
> Created attachment 128240 [details] [review]
> Patch to add frame swap delay option to weston-simple-egl
>
> That wasn't enough, nor was making exactly the sam
Reviewed-by: Samuel Iglesias Gonsálvez
On Mon, 2017-02-20 at 15:28 +0200, Lonnberg, Toni wrote:
> The function definition is now next to where the other similar
> functions are
> defined.
> ---
> src/mesa/drivers/dri/i965/brw_eu.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> di
https://bugs.freedesktop.org/show_bug.cgi?id=98833
--- Comment #15 from Eero Tamminen ---
Ok, as it happens on HSW, BDW & SKL, I would say that it's a generic problem.
Is there any Mesa driver which non-vsynched frame updates are not broken by the
indicated Mesa commit?
--
You are receiving
Reviewed-by: Marek Olšák
Marek
On Mon, Feb 20, 2017 at 12:16 AM, Timothy Arceri wrote:
> This assert might have made sense before but we no longer use
> gl_linked_shader here. Unless the caller has really done something
> crazy this assert is fairly useless.
>
> We also do some small tidy ups i
Reviewed-by: Marek Olšák
Marek
On Sun, Feb 19, 2017 at 8:25 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Allocating huge buffers in VRAM is not a problem, but when those buffers
> start being migrated, the kernel runs into errors because it cannot split
> those buffer up for moving thr
On 09/02/17 14:41, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
The instruction has an associated label when Instruction.Label == 1,
as can be seen in ureg_emit_label() or tgsi_build_full_instruction().
This fixes dump generating extra :0 labels on conditionals, and virgl
parsing
For the series:
Reviewed-by: Marek Olšák
Marek
On Mon, Feb 20, 2017 at 12:21 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> The same PS epilog workaround as for 8-bit integer formats is required,
> since the CB doesn't do clamping.
>
> Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_
https://bugs.freedesktop.org/show_bug.cgi?id=98279
--- Comment #12 from Manuel Iglesias ---
It seems like the bug it´s fioxed with the lastest mesa git
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.__
I don't think this patch is necessary. I don't mind people getting
confused by the name.
Marek
On Mon, Feb 20, 2017 at 9:42 AM, Edward O'Callaghan
wrote:
> The name has become a little misleading now that it applies
> to both r600g and radeonsi.
>
> Signed-off-by: Edward O'Callaghan
> ---
> sr
On 02/20/2017 11:15 AM, Edward O'Callaghan wrote:
> The name has become a little misleading now that it applies
> to both r600g and radeonsi.
>
> V.2: Michel Dänzer - R600_DEBUG must continue to work.
>
> Signed-off-by: Edward O'Callaghan
> ---
> src/gallium/drivers/r600/r600_pipe.c
https://bugs.freedesktop.org/show_bug.cgi?id=99856
--- Comment #1 from Vedran Miletić ---
This function should be provided by libclc. Do you have it installed?
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.__
On Feb 20, 2017 4:44 AM, "Lionel Landwerlin"
wrote:
Applies on top of Jason's patch :
https://patchwork.freedesktop.org/patch/139603/
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/intel/isl/isl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/isl/isl.c b/sr
On Feb 20, 2017 4:47 AM, "Lionel Landwerlin"
wrote:
On 18/02/17 00:03, Jason Ekstrand wrote:
> This just enables basic MSAA compression (no fast clears) for all
> multisampled surfaces. This improves the framerate of the Sascha
> "multisampling" demo by 76% on my Sky Lake laptop. Running Talos
https://bugs.freedesktop.org/show_bug.cgi?id=99849
--- Comment #1 from Brian Paul ---
(In reply to Max Staudt from comment #0)
> This is a continuation of fdo#99708.
>
> Basically, since X server commit d18f5801, dashed lines with zero width are
> accelerated through GLAMOR, and thus through Ope
https://bugs.freedesktop.org/show_bug.cgi?id=99305
Brian Paul changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |sitewranglers@lists.freedes
On Mon, Feb 20, 2017 at 8:45 AM, Timothy Arceri wrote:
> On 20/02/17 15:38, Edward O'Callaghan wrote:
>>
>>
>>
>> On 02/20/2017 11:15 AM, Timothy Arceri wrote:
>>>
>>> ---
>>> src/gallium/drivers/r600/r600_pipe.c | 19 +++
>>> src/gallium/drivers/radeon/r600_pipe_common.c
Applies on top of Jason's patch :
https://patchwork.freedesktop.org/patch/139603/
Signed-off-by: Lionel Landwerlin
Cc: Jason Ekstrand
---
src/intel/isl/isl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 1a47da5257..b7f3aaee1c 1
https://bugs.freedesktop.org/show_bug.cgi?id=98279
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
Resolution|--- |FIXED
S
On 02/16/2017 08:16 AM, Emil Velikov wrote:
Just a bunch of extern C issues flagged by [1]. There's a few more
remaining such as the glsl_types C API living in nir_types.{cpp,h} but
that can be resolved at a later date.
-Emil
[1] git grep -B2 "#.*\" -- src/ | grep "\"
Series, looks OK t
For the series:
Reviewed-by: Nicolai Hähnle
On 19.02.2017 17:27, Marek Olšák wrote:
From: Marek Olšák
R600_DEBUG=mono has had no effect since:
commit 1fabb297177069e95ec1bb7053acb32f8ec3e092
Author: Marek Olšák
Date: Tue Feb 14 22:08:32 2017 +0100
radeonsi: have separat
On 02/16/2017 05:52 AM, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/auxiliary/util/u_suballoc.c | 22 ++
src/gallium/auxiliary/util/u_suballoc.h | 2 +-
src/gallium/drivers/r600/r600_pipe.c | 5 +++--
src/gallium/drivers/radeon/r600_pipe_
I verified that the removed functions are not needed by our in-house code.
Other than comments on patch 5, the series is
Reviewed-by: Brian Paul
On 02/16/2017 05:52 AM, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/auxiliary/util/u_draw_quad.c | 66
On 18 February 2017 at 07:56, Jonathan Gray wrote:
> Define ElfW() and NT_GNU_BUILD_ID if needed as these defines are not
> present on at least OpenBSD and FreeBSD. Fixes the build on OpenBSD.
>
> Signed-off-by: Jonathan Gray
R-b and pushed to master. Thank you Jonathan !
-Emil
You could do all of this in r600_pipe_common.c by using HAVE_LLVM and
rscreen->chip_class.
Marek
On Mon, Feb 20, 2017 at 1:15 AM, Timothy Arceri wrote:
> ---
> src/gallium/drivers/r600/r600_pipe.c | 19 +++
> src/gallium/drivers/radeon/r600_pipe_common.c | 8 +++-
>
https://bugs.freedesktop.org/show_bug.cgi?id=98588
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
Status|NEW |RESOLVED
Re
https://bugs.freedesktop.org/show_bug.cgi?id=99681
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
Status|NEW |RESOLVED
Re
https://bugs.freedesktop.org/show_bug.cgi?id=99875
Bug ID: 99875
Summary: [radv] gears demo triggers an assertion error on
window resize
Product: Mesa
Version: git
Hardware: Other
OS: All
Status:
v2: rework util clear functions such that they operate on a resource
instead of a surface (Roland Scheidegger)
Implements the ARB_clear_texture extension for softpipe.
Passes all corresponding piglit tests.
Signed-off-by: Lars Hamre
---
CC: Roland Scheidegger
NOTE: someone with access wi
On 19 February 2017 at 01:06, Timothy Arceri wrote:
> I would have thought this commit [1] should have fixed it for android as
> weel as scons.
>
As Tapani mentioned - I've opted to disable the code for scons (since
it doesn't build) and enable it for everyone else... but I've missed
this hunk.
Pl
On 20 February 2017 at 09:31, Tapani Pälli wrote:
> On 02/19/2017 03:06 AM, Timothy Arceri wrote:
>>
>> I would have thought this commit [1] should have fixed it for android as
>> weel as scons.
>>
>> [1]
>>
>> https://cgit.freedesktop.org/mesa/mesa/commit/?id=172c48cc15e2a7b42a7de8ff9164ad8733155
On 20 February 2017 at 16:14, Brian Paul wrote:
> On 02/16/2017 08:16 AM, Emil Velikov wrote:
>>
>> Just a bunch of extern C issues flagged by [1]. There's a few more
>> remaining such as the glsl_types C API living in nir_types.{cpp,h} but
>> that can be resolved at a later date.
>>
>> -Emil
>>
>
On Mon, Feb 20, 2017 at 8:10 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Applies on top of Jason's patch :
>
>https://patchwork.freedesktop.org/patch/139603/
>
> Signed-off-by: Lionel Landwerlin
> Cc: Jason Ekstrand
> ---
> src/intel/isl/isl.c | 9 +
> 1 file cha
From: Marek Olšák
This fixes:
vdpauinfo: ../lib/CodeGen/TargetPassConfig.cpp:579: virtual void
llvm::TargetPassConfig::addMachinePasses(): Assertion `TPI && IPI &&
"Pass ID not registered!"' failed.
Cc: 13.0 17.0
---
src/gallium/auxiliary/util/u_queue.c | 88 +++
From: Marek Olšák
---
src/gallium/auxiliary/hud/hud_context.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index aaa52d5..488fe66 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++
From: Marek Olšák
it's cleaner this way.
---
src/gallium/auxiliary/util/u_queue.c| 42 ++---
src/gallium/auxiliary/util/u_queue.h| 2 +-
src/gallium/drivers/freedreno/freedreno_batch.c | 2 +-
src/gallium/drivers/radeonsi/si_state_shaders.c | 6 ++--
From: Marek Olšák
---
src/gallium/auxiliary/hud/hud_cpu.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/hud/hud_cpu.c
b/src/gallium/auxiliary/hud/hud_cpu.c
index 1cba353..302445d 100644
--- a/src/gallium/auxiliary/hud/hud_cpu.c
+++ b/s
https://bugs.freedesktop.org/show_bug.cgi?id=99849
--- Comment #2 from Max Staudt ---
(In reply to Brian Paul from comment #1)
> Which software renderer? swrast, softpipe, llvmpipe, swr? I just did a
> quick test of softpipe and llvmpipe and stippled lines look OK here.
>
> Which version of Me
From: Marek Olšák
v2: fix a bug in u_helpers
---
src/gallium/auxiliary/util/u_helpers.c| 29 +++
src/gallium/auxiliary/util/u_helpers.h| 5 +
src/gallium/drivers/etnaviv/etnaviv_context.c | 12 +++
src/gallium/drivers/etnaviv/etnaviv_screen.c
The isl_surf_init call that each of these helpers make can, in theory,
fail. We should propagate that up to the caller rather than just
silently ignoring it.
Reviewed-by: Topi Pohjolainen
---
src/intel/isl/isl.c | 72 +---
src/intel/isl/isl.h
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces. This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop. Running Talos on
medium settings with 8x MSAA, this improves the framerate in the
benchmark by 80%.
---
src/intel/
From: Lionel Landwerlin
v3 (Jason Ekstrand): Add a comment explaining why
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 1a47da5..6979063 10064
https://bugs.freedesktop.org/show_bug.cgi?id=99849
--- Comment #3 from Max Staudt ---
I've also reproduced this on the most recent openSUSE Tumbleweed snapshot,
which includes Mesa 17.0.0 and Xorg 1.19.1.
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the as
On 20/02/17 18:09, Jason Ekstrand wrote:
From: Lionel Landwerlin
v3 (Jason Ekstrand): Add a comment explaining why
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/isl/isl.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/intel/isl/isl.c b/src
From: Marek Olšák
---
src/mesa/vbo/vbo_exec_array.c | 56 ++-
1 file changed, 7 insertions(+), 49 deletions(-)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 6a96167..30c52d5 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++
On 18 February 2017 at 23:59, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/Makefile.sources | 5 +-
> src/intel/vulkan/anv_query.c | 171 -
Won't this lead to this [albeit trivial] code built 4 times instead of
once ? Worth mentioning in the commit message (build time should
From: Marek Olšák
sizeof(struct pipe_draw_info) = 104 -> 88
---
src/gallium/include/pipe/p_state.h | 49 --
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
index cb72310..
On Mon, Feb 20, 2017 at 10:35 AM, Emil Velikov
wrote:
> On 18 February 2017 at 23:59, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/Makefile.sources | 5 +-
> > src/intel/vulkan/anv_query.c | 171 -
> Won't this lead to this [albeit trivial] code built 4 times instead o
Make use of common uploaders that landed recently to Mesa
---
src/gallium/state_trackers/nine/device9.c| 48
src/gallium/state_trackers/nine/device9.h| 5 ---
src/gallium/state_trackers/nine/nine_ff.c| 8 ++---
src/gallium/state_trackers/nine/nine_stat
Hi,
I'd like to remove pipe_context::set_index_buffer. It's not useful to
most drivers and the interface is inconvenient for Mesa/OpenGL,
because it's a draw state that is set with a separate driver callback,
which is an unnecessary driver roundtrip taking some CPU cycles. I'd
prefer to pass the i
This doesn't quite just do what the commit log says, since at least one
parameter is changed from unsigned to ubyte (I hope vertices_per_patch
can't exceed that for any driver...)
Otherwise seems reasonable.
Roland
Am 20.02.2017 um 19:35 schrieb Marek Olšák:
> From: Marek Olšák
>
> sizeof(st
https://bugs.freedesktop.org/show_bug.cgi?id=99849
--- Comment #4 from Roland Scheidegger ---
Looks like this isn't using line stippling or anything like that, but just
drawing a line with a texture attached, with a shader which discards pixel
based on the texture value (I think using a A8 textur
On Mon, Feb 20, 2017 at 8:03 PM, Roland Scheidegger wrote:
> This doesn't quite just do what the commit log says, since at least one
> parameter is changed from unsigned to ubyte (I hope vertices_per_patch
> can't exceed that for any driver...)
vertices_per_patch must be in [1, 32]. Only 5 bits a
On Mon, Feb 20, 2017 at 2:01 PM, Marek Olšák wrote:
> Hi,
>
> I'd like to remove pipe_context::set_index_buffer. It's not useful to
> most drivers and the interface is inconvenient for Mesa/OpenGL,
> because it's a draw state that is set with a separate driver callback,
> which is an unnecessary d
1 - 100 of 164 matches
Mail list logo
