From: "Lonnberg, Toni" <toni.lonnb...@intel.com>
Pre-work for the new shader assembler.
To avoid ambiguity in the shader assembler when parsing, all immediate values
will need a delimiter to describe the type of the value being used. For
consistency, all register values are formatted with the same delimiter.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 426e4fa..ec788c6 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -237,24 +237,24 @@ static const char *const access_mode[2] = {
};
static const char * const reg_encoding[] = {
- [BRW_HW_REG_TYPE_UD] = "UD",
- [BRW_HW_REG_TYPE_D] = "D",
- [BRW_HW_REG_TYPE_UW] = "UW",
- [BRW_HW_REG_TYPE_W] = "W",
- [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
- [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
- [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
- [BRW_HW_REG_TYPE_F] = "F",
- [GEN8_HW_REG_TYPE_UQ] = "UQ",
- [GEN8_HW_REG_TYPE_Q] = "Q",
- [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
+ [BRW_HW_REG_TYPE_UD] = ":UD",
+ [BRW_HW_REG_TYPE_D] = ":D",
+ [BRW_HW_REG_TYPE_UW] = ":UW",
+ [BRW_HW_REG_TYPE_W] = ":W",
+ [BRW_HW_REG_NON_IMM_TYPE_UB] = ":UB",
+ [BRW_HW_REG_NON_IMM_TYPE_B] = ":B",
+ [GEN7_HW_REG_NON_IMM_TYPE_DF] = ":DF",
+ [BRW_HW_REG_TYPE_F] = ":F",
+ [GEN8_HW_REG_TYPE_UQ] = ":UQ",
+ [GEN8_HW_REG_TYPE_Q] = ":Q",
+ [GEN8_HW_REG_NON_IMM_TYPE_HF] = ":HF",
};
static const char *const three_source_reg_encoding[] = {
- [BRW_3SRC_TYPE_F] = "F",
- [BRW_3SRC_TYPE_D] = "D",
- [BRW_3SRC_TYPE_UD] = "UD",
- [BRW_3SRC_TYPE_DF] = "DF",
+ [BRW_3SRC_TYPE_F] = ":F",
+ [BRW_3SRC_TYPE_D] = ":D",
+ [BRW_3SRC_TYPE_UD] = ":UD",
+ [BRW_3SRC_TYPE_DF] = ":DF",
};
static const char *const reg_file[4] = {
--
2.7.4
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