From: "Lonnberg, Toni" <toni.lonnb...@intel.com>
Pre-work for the new shader assember.
To produce the exact same bit representation, the assembler needs to see the
swizzle of the source operands even when RepCtrl is not set.
---
src/mesa/drivers/dri/i965/brw_disasm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 451ba3f..4f734dc 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -991,8 +991,8 @@ src0_3src(FILE *file, const struct gen_device_info
*devinfo, brw_inst *inst)
string(file, "<0;1,0>");
else {
string(file, "<4;4,1>");
- err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
}
+ err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
err |= control(file, "src da16 reg type", three_source_reg_encoding,
brw_inst_3src_src_type(devinfo, inst), NULL);
return err;
@@ -1018,8 +1018,8 @@ src1_3src(FILE *file, const struct gen_device_info
*devinfo, brw_inst *inst)
string(file, "<0;1,0>");
else {
string(file, "<4;4,1>");
- err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
}
+ err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
err |= control(file, "src da16 reg type", three_source_reg_encoding,
brw_inst_3src_src_type(devinfo, inst), NULL);
return err;
@@ -1046,8 +1046,8 @@ src2_3src(FILE *file, const struct gen_device_info
*devinfo, brw_inst *inst)
string(file, "<0;1,0>");
else {
string(file, "<4;4,1>");
- err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
}
+ err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
err |= control(file, "src da16 reg type", three_source_reg_encoding,
brw_inst_3src_src_type(devinfo, inst), NULL);
return err;
--
2.7.4
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