https://bugs.freedesktop.org/show_bug.cgi?id=92265
--- Comment #15 from Dennis Schridde ---
The KDE problem is indeed fixed in Mesa 11.0.3. Thanks!
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On Sat, 2015-10-10 at 18:06 +0200, Marek Olšák wrote:
> Hi Timothy,
>
> One of these 3 commits breaks compilation for Talos shaders with
> gallium. My piglit patch "glsl-1.30/sampler-bug: ..." contains a
> minimal test case. I can't say which commit, because Mesa fails to
> build between them.
>
On Sat, Oct 10, 2015 at 10:30 PM, Rhys Kidd wrote:
> Patchset adds Makefile and documentation improvements.
>
> I aimed to write these as I would have found most helpful when seeking to
> understand shader-db's operation, as a new Mesa developer.
>
> First patch resolves the build errors [0] exper
On Sun, Oct 11, 2015 at 4:22 AM, Roland Scheidegger wrote:
> Am 11.10.2015 um 03:29 schrieb Marek Olšák:
>> From: Marek Olšák
>>
>> This is useful only when emit functions use it.
>> The new radeonsi min/max opcode implementation requires this.
>> ---
>> src/gallium/auxiliary/gallivm/lp_bld_tgsi
On Sun, Oct 11, 2015 at 4:29 AM, Roland Scheidegger wrote:
> FWIW I'm still baffled by this shader bit.
> NaNs are absolutely required to be generated and handled as NaNs in
> shaders (albeit conversion to ints will make them 0) by DX10 (there's
> plenty of tests which actually check for this). An
On Sun, Oct 11, 2015 at 4:12 AM, Connor Abbott wrote:
> FWIW, this isn't quite correct with ARB_shader_precision or GL4.1 --
> it specifies that infinities should be correctly generated through
> division by 0, which unsafe-fp-math doesn't guarantee. At least,
> that's assuming this is similar to
i965_compile_FILES need to be built, in order to avoid following building
errors:
target SharedLib: i915_dri
(out/target/product/x86/obj/SHARED_LIBRARIES/i915_dri_intermediates/LINKED/i915_dri.so)
external/mesa/src/mesa/drivers/dri/i965/brw_ir_fs.h:181: error: undefined
reference to 'fs_inst::~
On Sun, Oct 11, 2015 at 7:08 AM, Marek Olšák wrote:
> On Sun, Oct 11, 2015 at 4:12 AM, Connor Abbott wrote:
>> FWIW, this isn't quite correct with ARB_shader_precision or GL4.1 --
>> it specifies that infinities should be correctly generated through
>> division by 0, which unsafe-fp-math doesn't
I did a full piglit run on Fermi. There are no regressions and you fixed
texelFetch tests and other ones which failed with that assert.
I'm lazy to do it on Tesla, so:
Reviewed-by: Samuel Pitoiset
Thanks!
On 10/10/2015 11:09 AM, Ilia Mirkin wrote:
We still have to push everything out, might
This commit adds tegra support, which uses the renderonly driver
library.
Signed-off-by: Christian Gmeiner
---
configure.ac | 19 +++-
src/gallium/Makefile.am| 6 +++
.../auxiliary/target-helpers/inline_drm_helper.h | 29 ++
This commit adds a generic renderonly driver library, which fullfille
the requirements for tegra and etnaviv. As a result it is possible to
run unmodified egl software directly (without any compositor) on
supported devices.
In every use case we import a dumb buffer from scanout gpu into
the render
This patch set introduces a more generic renderonly driver library based on
"[RFC] tegra: Initial support" [0] from Thierry Reding.
I am re-using almost all of the existing code and extended it with a
struct renderonly_ops, which defines the wanted behavior for the
target hardware.
There are two
This is currently not needed but will be necessary when we have
features that do not work with DCC enabled, such as image stores
and sharing non-scanout surfaces.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_blit.c | 31 +--
src/gallium/driver
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_texture.c | 5 +
src/gallium/drivers/radeonsi/cik_sdma.c | 3 ++-
src/gallium/drivers/radeonsi/si_blit.c| 3 ++-
src/gallium/drivers/radeonsi/si_dma.c | 3 ++-
4 files changed, 11 insertions(+), 3 deletions(-)
dif
As the alignment requirements can be 32 KiB or more, also adding
an aligned buffer creation function.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_buffer_common.c | 21 +++
src/gallium/drivers/radeon/r600_pipe_common.h | 6
src/gallium/drivers/radeon/r600_
Uses the DCC buffer instead of the CMASK buffer. The ELIMINATE_FAST_CLEAR
still works. Furthermore, with DCC compression we can directly clear
to a limited set of colors such that we do not need a postprocessing step.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_texture.c
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 2 ++
src/gallium/drivers/radeon/r600d_common.h | 1 +
src/gallium/drivers/radeonsi/si_descriptors.c | 5
src/gallium/drivers/radeonsi/si_pipe.h
Needed for various DCC related operations. As invalidating the L2
cache seems unnecesary, this introduces a new flag to flush the cache
without invalidating the L2 cache.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/drivers/radeonsi/si_stat
Add a mask to track if a texture level is still in its decompressed
state or that we would need to decompress again.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 1 +
src/gallium/drivers/radeonsi/si_bl
These patches enable delta color compression (DCC) for Vulcanic
Islands GPU's. This should reduce memory bandwidth to increase
performance.
In this second version I reworked the fast clear not to use the CMASK
for DCC compressed textures, as well as allowing integer formats.
With the reworked fas
> On Oct 10, 2015, at 6:29 PM, Marek Olšák wrote:
>
> +/* This requires "unsafe-fp-math" for LLVM to convert it to RSQ. */
> +static void emit_rsq(const struct lp_build_tgsi_action *action,
> + struct lp_build_tgsi_context *bld_base,
> + struct lp_build_emit_dat
> On Oct 10, 2015, at 6:29 PM, Marek Olšák wrote:
>
> The increase in VGPRs in unfortunate, but the decrease in the scratch size
> is always welcome.
Do you have a specific example where this happens you can post?___
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As there are quite a lot of movement related to vec4 optimizations and I
would like to avoid overlapping, I am commenting here that I intend to
work on a version of the fs_visitor::opt_peephole_sel() for vec4.
Suggestions about other FS optimizations worth porting to the vec4
backend are welcome.
On Sun, Oct 11, 2015 at 10:17 AM, Antía Puentes wrote:
> As there are quite a lot of movement related to vec4 optimizations and I
> would like to avoid overlapping, I am commenting here that I intend to
> work on a version of the fs_visitor::opt_peephole_sel() for vec4.
>
> Suggestions about other
On Sun, Oct 11, 2015 at 6:58 AM, Marek Olšák wrote:
> On Sun, Oct 11, 2015 at 4:29 AM, Roland Scheidegger
> wrote:
>> FWIW I'm still baffled by this shader bit.
>> NaNs are absolutely required to be generated and handled as NaNs in
>> shaders (albeit conversion to ints will make them 0) by DX10
Am 11.10.2015 um 12:39 schrieb Marek Olšák:
> On Sun, Oct 11, 2015 at 4:22 AM, Roland Scheidegger
> wrote:
>> Am 11.10.2015 um 03:29 schrieb Marek Olšák:
>>> From: Marek Olšák
>>>
>>> This is useful only when emit functions use it.
>>> The new radeonsi min/max opcode implementation requires this
Am 11.10.2015 um 12:58 schrieb Marek Olšák:
> On Sun, Oct 11, 2015 at 4:29 AM, Roland Scheidegger
> wrote:
>> FWIW I'm still baffled by this shader bit.
>> NaNs are absolutely required to be generated and handled as NaNs in
>> shaders (albeit conversion to ints will make them 0) by DX10 (there's
Hi,
this proposed patch is not necessary anymore,
../glsl/ dislocated paths are not present anymore in
src/mesa/program/Makefile.sources ,
it was a temporary change in mesa 11.1.0devel sources,
much better this way because to use dislocated paths is not recommended.
Thanks
Mauro
2015-09-23 22
On Sun, Oct 11, 2015 at 6:48 PM, Matt Arsenault wrote:
>
> On Oct 10, 2015, at 6:29 PM, Marek Olšák wrote:
>
> The increase in VGPRs in unfortunate, but the decrease in the scratch size
> is always welcome.
Oh sorry, the stats are actually for the previous patch replacing the
AMDGPU.lrp with sta
On Sun, Oct 11, 2015 at 11:15 PM, Roland Scheidegger wrote:
> So why do you need to set the info back after action->emit? If you want
> to set that always so that information can be used, looks fine to me.
> But if you have to set it back afterwards that screams hack (and I see
> no reason for suc
On Sun, Oct 11, 2015 at 9:20 AM, Timothy Arceri wrote:
> On Sat, 2015-10-10 at 18:06 +0200, Marek Olšák wrote:
>> Hi Timothy,
>>
>> One of these 3 commits breaks compilation for Talos shaders with
>> gallium. My piglit patch "glsl-1.30/sampler-bug: ..." contains a
>> minimal test case. I can't say
Am 12.10.2015 um 00:55 schrieb Marek Olšák:
> On Sun, Oct 11, 2015 at 11:15 PM, Roland Scheidegger
> wrote:
>> So why do you need to set the info back after action->emit? If you want
>> to set that always so that information can be used, looks fine to me.
>> But if you have to set it back afterwa
On Sunday, 11 October 2015, Matt Turner wrote:
> On Sat, Oct 10, 2015 at 10:30 PM, Rhys Kidd > wrote:
> > Patchset adds Makefile and documentation improvements.
> >
> > I aimed to write these as I would have found most helpful when seeking to
> > understand shader-db's operation, as a new Mesa d
On Sun, Oct 11, 2015 at 5:38 PM, Bas Nieuwenhuizen
wrote:
> Signed-off-by: Bas Nieuwenhuizen
> ---
> src/gallium/drivers/radeon/r600_texture.c | 5 +
> src/gallium/drivers/radeonsi/cik_sdma.c | 3 ++-
> src/gallium/drivers/radeonsi/si_blit.c| 3 ++-
> src/gallium/drivers/radeonsi/si_dm
On Wed, Sep 30, 2015 at 3:48 AM, Dave Airlie wrote:
> The initial glGetUniformdv support didn't cover all the
> casting cases that are apparantly legal, and cts seems to
> test for them.
>
> I've updated the piglit test to cover these cases now.
>
> cc: "11.0"
> Signed-off-by: Dave Airlie
> ---
On Sat, Oct 10, 2015 at 1:17 PM, Matt Turner wrote:
> Curro added this in commit 3ee2daf23d (before the vec4/NIR backend was
> added) but it was missed in the new NIR backend. Add it there as well.
>
> instructions in affected programs: 1857 -> 1810 (-2.53%)
> helped:
On Sun, Oct 11, 2015 at 5:38 PM, Bas Nieuwenhuizen
wrote:
> Signed-off-by: Bas Nieuwenhuizen
> ---
> src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
> src/gallium/drivers/radeon/r600_texture.c | 2 ++
> src/gallium/drivers/radeon/r600d_common.h | 1 +
> src/gallium/drivers/radeon
On Sun, Oct 11, 2015 at 5:38 PM, Bas Nieuwenhuizen
wrote:
> Needed for various DCC related operations. As invalidating the L2
> cache seems unnecesary, this introduces a new flag to flush the cache
> without invalidating the L2 cache.
>
> Signed-off-by: Bas Nieuwenhuizen
> ---
> src/gallium/driv
i've reviewed patches 1-4. I'll try to review the rest tomorrow.
Marek
On Sun, Oct 11, 2015 at 5:38 PM, Bas Nieuwenhuizen
wrote:
> These patches enable delta color compression (DCC) for Vulcanic
> Islands GPU's. This should reduce memory bandwidth to increase
> performance.
>
> In this second ve
On Sun, Oct 11, 2015 at 4:18 PM, Rhys Kidd wrote:
> On Sunday, 11 October 2015, Matt Turner wrote:
>>
>> On Sat, Oct 10, 2015 at 10:30 PM, Rhys Kidd wrote:
>> > Patchset adds Makefile and documentation improvements.
>> >
>> > I aimed to write these as I would have found most helpful when seeking
On Sun, Oct 11, 2015 at 5:26 PM, Ilia Mirkin wrote:
> On Sat, Oct 10, 2015 at 1:17 PM, Matt Turner wrote:
>> Curro added this in commit 3ee2daf23d (before the vec4/NIR backend was
>> added) but it was missed in the new NIR backend. Add it there as well.
>>
>> instructions in affected programs:
On Sun, Oct 11, 2015 at 9:25 PM, Matt Turner wrote:
> On Sun, Oct 11, 2015 at 5:26 PM, Ilia Mirkin wrote:
>> On Sat, Oct 10, 2015 at 1:17 PM, Matt Turner wrote:
>>> Curro added this in commit 3ee2daf23d (before the vec4/NIR backend was
>>> added) but it was missed in the new NIR backend. Add it
The initial glGetUniformdv support didn't cover all the
casting cases that are apparantly legal, and cts seems to
test for them.
I've updated the piglit test to cover these cases now.
v2: fix indentation - it's all broken in this file (Ilia)
fix src/dst index tracking in light of fp64 support (Il
On Sun, Oct 11, 2015 at 11:07 PM, Dave Airlie wrote:
> The initial glGetUniformdv support didn't cover all the
> casting cases that are apparantly legal, and cts seems to
> test for them.
>
> I've updated the piglit test to cover these cases now.
>
> v2: fix indentation - it's all broken in this f
On Oct 10, 2015 12:09 PM, "Matt Turner" wrote:
>
> On Sat, Oct 10, 2015 at 11:47 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Needed in NIR too, so move out of mesa/main/imports.c
> >
> > Signed-off-by: Rob Clark
> > ---
> > src/glsl/Makefile.am | 1 +
> > src/mesa/main/imports.c
Can we tweak the commit message a bit:
glsl: move builtin vector types to glsl_types.cpp
builtin_types.CPP contains a lot more than just vec4_type and friends and
you're not moving all of them.
On Oct 10, 2015 11:48 AM, "Rob Clark" wrote:
>
> From: Rob Clark
>
> First step at untangling NIR's
From: Dave Airlie
This fixes the fetching of fp64 inputs to the geometry shader,
this fixes the recently posted piglit's
arb_gpu_shader_fp64/execution/gs-fs-vs-double-array.shader_test
arb_vertex_attrib_64bit/execution/gs-fs-vs-attrib-double-array.shader_test
Signed-off-by: Dave Airlie
---
sr
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