On Sun, Oct 11, 2015 at 5:38 PM, Bas Nieuwenhuizen
<b...@basnieuwenhuizen.nl> wrote:
> Signed-off-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
> ---
> src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
> src/gallium/drivers/radeon/r600_texture.c | 2 ++
> src/gallium/drivers/radeon/r600d_common.h | 1 +
> src/gallium/drivers/radeonsi/si_descriptors.c | 5 ++++
> src/gallium/drivers/radeonsi/si_pipe.h | 1 +
> src/gallium/drivers/radeonsi/si_state.c | 43
> +++++++++++++++++++++++----
> 6 files changed, 47 insertions(+), 6 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
> b/src/gallium/drivers/radeon/r600_pipe_common.h
> index 1eec596..f21a0b3 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.h
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.h
> @@ -244,6 +244,7 @@ struct r600_surface {
> unsigned cb_color_dim; /* EG only */
> unsigned cb_color_pitch; /* EG and later */
> unsigned cb_color_slice; /* EG and later */
> + unsigned cb_dcc_base; /* VI and later */
> unsigned cb_color_attrib; /* EG and later */
> unsigned cb_dcc_control; /* VI and later */
> unsigned cb_color_fmask; /* CB_COLORn_FMASK (EG and later) or
> CB_COLORn_FRAG (r600) */
> diff --git a/src/gallium/drivers/radeon/r600_texture.c
> b/src/gallium/drivers/radeon/r600_texture.c
> index c2a692c..0314049 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -495,6 +495,8 @@ static void vi_texture_alloc_dcc_separate(struct
> r600_common_screen *rscreen,
>
> r600_screen_clear_buffer(rscreen, &rtex->dcc_buffer->b.b, 0,
> rtex->surface.dcc_size,
> 0xFFFFFFFF, true);
> +
> + rtex->cb_color_info |= VI_S_028C70_DCC_ENABLE(1);
> }
>
> static unsigned r600_texture_get_htile_size(struct r600_common_screen
> *rscreen,
> diff --git a/src/gallium/drivers/radeon/r600d_common.h
> b/src/gallium/drivers/radeon/r600d_common.h
> index 115042d..a3d182c 100644
> --- a/src/gallium/drivers/radeon/r600d_common.h
> +++ b/src/gallium/drivers/radeon/r600d_common.h
> @@ -202,6 +202,7 @@
>
> #define EG_S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 17)
> #define SI_S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 13)
> +#define VI_S_028C70_DCC_ENABLE(x) (((x) & 0x1) << 28)
>
> /*CIK+*/
> #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC
> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
> b/src/gallium/drivers/radeonsi/si_descriptors.c
> index 19dd14f..664a1a2 100644
> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
> @@ -181,6 +181,11 @@ static void si_set_sampler_view(struct si_context *sctx,
> unsigned shader,
> rview->resource, RADEON_USAGE_READ,
>
> r600_get_sampler_view_priority(rview->resource));
>
> + if (rview->dcc_buffer && rview->dcc_buffer != rview->resource)
> + radeon_add_to_buffer_list(&sctx->b,
> &sctx->b.rings.gfx,
> + rview->dcc_buffer, RADEON_USAGE_READ,
> + RADEON_PRIO_DCC);
> +
> pipe_sampler_view_reference(&views->views[slot], view);
> memcpy(views->desc.list + slot*8, view_desc, 8*4);
> views->desc.enabled_mask |= 1llu << slot;
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.h
> b/src/gallium/drivers/radeonsi/si_pipe.h
> index b43c027..63f8876 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.h
> +++ b/src/gallium/drivers/radeonsi/si_pipe.h
> @@ -97,6 +97,7 @@ struct si_sampler_view {
> struct pipe_sampler_view base;
> struct list_head list;
> struct r600_resource *resource;
> + struct r600_resource *dcc_buffer;
> /* [0..7] = image descriptor
> * [4..7] = buffer descriptor */
> uint32_t state[8];
> diff --git a/src/gallium/drivers/radeonsi/si_state.c
> b/src/gallium/drivers/radeonsi/si_state.c
> index 00d4bc1..7aa49c3 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -1917,8 +1917,16 @@ static void si_initialize_color_surface(struct
> si_context *sctx,
> surf->cb_color_info = color_info;
> surf->cb_color_attrib = color_attrib;
>
> - if (sctx->b.chip_class >= VI)
> - surf->cb_dcc_control = S_028C78_OVERWRITE_COMBINER_DISABLE(1);
> + if (sctx->b.chip_class >= VI) {
> + surf->cb_dcc_control =
> S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(2) |
> + S_028C78_INDEPENDENT_64B_BLOCKS(1);
CB_RESOLVE requires these values for MAX_UNCOMPRESSED_BLOCK_SIZE:
- 0 for 8bpp
- 0-1 for 16bpp (prefer 1)
- 0-2 otherwise (prefer 2)
The only client of CB_RESOLVE is MSAA, so it's better to apply this
for MSAA 8bpp and 16bpp surfaces only.
Marek
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