On 01.09.2014 19:28, Marek Olšák wrote:
Perhaps Valley uses scattered writes, which the write-combining cache
doesn't like?
In that case, I'd expect GTT with write-combining to be affected just as
much as VRAM.
From the bug reporter's latest comments, it seems clear the stutter is
due to BO
https://bugs.freedesktop.org/show_bug.cgi?id=83386
Priority: medium
Bug ID: 83386
Assignee: mesa-dev@lists.freedesktop.org
Summary: Feature request: GLX_EXT_swap_control_tear
Severity: normal
Classification: Unclassified
OS:
https://bugs.freedesktop.org/show_bug.cgi?id=83386
--- Comment #1 from cxo ---
Created attachment 105586
--> https://bugs.freedesktop.org/attachment.cgi?id=105586&action=edit
Output of glxinfo
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From: Michel Dänzer
Making sure large file support is enabled across the tree even on 32-bit
systems.
Signed-off-by: Michel Dänzer
---
configure.ac | 2 ++
src/gallium/auxiliary/os/os_mman.h| 13 +
src/gallium/winsys/radeon/drm/radeon_c
Am 02.09.2014 um 01:00 schrieb Dave Airlie:
From: Dave Airlie
Coverity pointed out we never dropped the lock here, so fix
it by using a common exit path.
Signed-off-by: Dave Airlie
Reviewed-by: Christian König
---
src/gallium/state_trackers/vdpau/mixer.c | 38 ++
Am 02.09.2014 um 01:40 schrieb Dave Airlie:
From: Dave Airlie
Coverity reported this, looks wrong to me.
And is probably one of the reasons why streams with multiple slices in
one frame didn't worked.
Signed-off-by: Dave Airlie
Reviewed-by: Christian König
---
src/gallium/state_tr
On Mon, 01 Sep 2014 00:02:18 +0200, Glenn Kennard
wrote:
Signed-off-by: Glenn Kennard
---
Tested on radeon 6670, all sample shading piglits pass, no
regressions, as well as unigine valley basic, tesseract with
MSAA enabled.
It would be great if one or more people could test this
on pre-ever
From: Michel Dänzer
The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the
previous fall-through cases.
Reported-by: Mathias Fröhlich
Signed-off-by: Michel Dänzer
---
src/gallium/drivers/radeon/r600_buffer_common.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-
It's probably a result of refactoring.
Reviewed-by: Marek Olšák
Marek
On Tue, Sep 2, 2014 at 1:18 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> Did this code mean to do something else, you tell me!
>
> Signed-off-by: Dave Airlie
> ---
> src/gallium/drivers/r300/r300_render.c | 2 --
> 1 fi
Reviewed-by: Marek Olšák
Marek
On Tue, Sep 2, 2014 at 10:54 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the
> previous fall-through cases.
>
> Reported-by: Mathias Fröhlich
> Signed-off-by: Michel Dänzer
> ---
> s
I think radeon_ctx.h is not included by Mesa, it's only included by
dumped CS traces, so it shouldn't be changed.
Marek
On Tue, Sep 2, 2014 at 9:17 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Making sure large file support is enabled across the tree even on 32-bit
> systems.
>
> Signed-o
It's also broken on RV770, tested with Valley 1.0 (64-bit) Basic preset.
2014-09-02 10:42 GMT+02:00 Glenn Kennard :
> On Mon, 01 Sep 2014 00:02:18 +0200, Glenn Kennard
> wrote:
>
> Signed-off-by: Glenn Kennard
>> ---
>> Tested on radeon 6670, all sample shading piglits pass, no
>> regressions
https://bugs.freedesktop.org/show_bug.cgi?id=83355
Kai changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Jan Vesely writes:
> On Sat, 2014-08-16 at 13:13 +0300, Francisco Jerez wrote:
>> Jan Vesely writes:
>>
>> > On Thu, 2014-08-07 at 16:02 +0300, Francisco Jerez wrote:
>> >> Jan Vesely writes:
>> >>
>> >> > This respin includes Francisco's approach of providing implicit
>> >> > in the arg vect
On Fri, Aug 22, 2014 at 02:35:02PM -0700, Ian Romanick wrote:
> On 08/22/2014 02:17 PM, Tom Stellard wrote:
> > On Fri, Aug 22, 2014 at 02:10:03PM -0700, Ian Romanick wrote:
> >> On 08/20/2014 11:58 AM, Tom Stellard wrote:
> >>> On Wed, Aug 20, 2014 at 11:13:13AM -0700, Kenneth Graunke wrote:
> >>>
https://bugs.freedesktop.org/show_bug.cgi?id=83386
--- Comment #2 from Kenneth Graunke ---
I'd be pretty surprised if it was failing to start because of that extension.
It should be totally optional, and is just a nice enhancement...
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On Wed, Aug 27, 2014 at 03:07:36PM -0700, Ian Romanick wrote:
> On 08/27/2014 02:55 PM, Marek Olšák wrote:
> > Our plan is to always require the latest released version of LLVM
> > because of new features in our LLVM backend that the radeonsi driver
> > depends on to advertise all GL features. Some
Hello,
Two weeks ago, Iago and myself sent a batch of patches that added
geometry shader support for SandyBridge [0].
Recently, we rebased our patches against master [1] and found
that some things are not working properly any more. Particularly, we
have plenty of cases where we only get a black s
Adding Kristian in Cc.
Sam
On Tue, 2014-09-02 at 18:16 +0200, Samuel Iglesias Gonsálvez wrote:
> Hello,
>
> Two weeks ago, Iago and myself sent a batch of patches that added
> geometry shader support for SandyBridge [0].
>
> Recently, we rebased our patches against master [1] and found
> that s
Hi Samuel,
On 02/09/14 17:22, Samuel Iglesias Gonsálvez wrote:
> Adding Kristian in Cc.
>
> Sam
>
> On Tue, 2014-09-02 at 18:16 +0200, Samuel Iglesias Gonsálvez wrote:
>> Hello,
>>
>> Two weeks ago, Iago and myself sent a batch of patches that added
>> geometry shader support for SandyBridge [0]
On Mon, Sep 1, 2014 at 1:36 AM, Jason Ekstrand wrote:
> ---
> src/mesa/main/texstore.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
> index f2eb0de..4b8158a 100644
> --- a/src/mesa/main/texstore.c
> +++ b/src/mesa/main/texstore.c
https://bugs.freedesktop.org/show_bug.cgi?id=83382
--- Comment #1 from Alexander von Gluck ---
Looks like a clang issue?
https://twiki.cern.ch/twiki/bin/view/Sandbox/ClangAsCrossCompiler
" -D__extern_always_inline=inline"
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On Monday, September 01, 2014 09:44:30 AM Jordan Justen wrote:
> All fields were migrated from brw_wm_prog_data. In future updates, we can move
> these FS specific fields back into brw_wm_prog_data.
>
> The scalar_visitor and scalar_generator class mainly use these structures now.
>
> Signed-off-
On Monday, September 01, 2014 09:44:28 AM Jordan Justen wrote:
> This common init routine can be used by constructors for multiple program
> types.
>
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_scalar.h | 1 +
> src/mesa/drivers/dri/i965/brw_scalar_visitor.cpp
On Monday, September 01, 2014 09:44:31 AM Jordan Justen wrote:
> All fields were migrated from brw_wm_prog_key. In future updates, we can move
> these FS specific fields back into brw_wm_prog_key.
We should just put things in the right place to begin with.
> struct brw_wm_prog_key {
> - uint8_
On Monday, September 01, 2014 09:44:26 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/Makefile.sources |2 +-
> src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h |2 +-
> src/mesa/drivers/dri/i965/brw_fs.cpp |4 +-
> src
From: Marek Olšák
*_update_db_shader_control depends on the alpha test state. The problem was
it was in a block which is only entered if the pixel shader is changed.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74863
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/r600/
On Tuesday, September 02, 2014 11:49:29 AM Kenneth Graunke wrote:
> On Monday, September 01, 2014 09:44:28 AM Jordan Justen wrote:
> > This common init routine can be used by constructors for multiple program
> > types.
> >
> > Signed-off-by: Jordan Justen
> > ---
> > src/mesa/drivers/dri/i965/b
On Monday, September 01, 2014 09:44:35 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_context.h| 1 +
> src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_scalar_generator.cpp | 2 +-
> src/mesa/d
On Monday, September 01, 2014 09:44:36 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_context.h| 1 +
> src/mesa/drivers/dri/i965/brw_scalar_generator.cpp | 4 ++--
> src/mesa/drivers/dri/i965/brw_wm.c | 1 +
> 3 files chan
On 19/08/14 23:26, Carl Worth wrote:
> Anuj Phogat writes:
>> On Wed, Jul 30, 2014 at 4:09 PM, Carl Worth wrote:
>>> Ian Romanick writes:
Anuj: Can you verify this does not regress proxy_textures_invalid_size?
>>> ...
Cc: "10.2"
>>>
>>> Ian (or Anuj), is there an outstanding question
https://bugs.freedesktop.org/show_bug.cgi?id=83355
Kai changed:
What|Removed |Added
Attachment #105562|text/plain |application/x-xz
mime type|
Tested-by: Benjamin Bellec
2014-09-02 21:14 GMT+02:00 Marek Olšák :
> From: Marek Olšák
>
> *_update_db_shader_control depends on the alpha test state. The problem was
> it was in a block which is only entered if the pixel shader is changed.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.
On Monday, September 01, 2014 09:44:37 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_scalar.h | 4 ++--
> src/mesa/drivers/dri/i965/brw_scalar_generator.cpp | 10 +-
>
On Tue, 2014-09-02 at 15:36 +0300, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > On Sat, 2014-08-16 at 13:13 +0300, Francisco Jerez wrote:
> >> Jan Vesely writes:
> >>
> >> > On Thu, 2014-08-07 at 16:02 +0300, Francisco Jerez wrote:
> >> >> Jan Vesely writes:
> >> >>
> >> >> > This respin
On Monday, September 01, 2014 09:44:38 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 8 ++--
> src/mesa/drivers/dri/i965/brw_scalar.h | 1 -
> src/mesa/drivers/dri/i965/brw_scalar_visitor.cpp | 1 -
> src/mesa/drive
On 2014-09-02 18:58, Emil Velikov wrote:
Hi Samuel,
On 02/09/14 17:22, Samuel Iglesias Gonsálvez wrote:
Adding Kristian in Cc.
Sam
On Tue, 2014-09-02 at 18:16 +0200, Samuel Iglesias Gonsálvez wrote:
Hello,
Two weeks ago, Iago and myself sent a batch of patches that added
geometry shader sup
Hello list,
Time for another bi-weekly stable candidate. This time around we have
- 54 queued
- 13 nominated (outstanding)
- and 4 rejected patches
Take a look at section "Mesa stable queue" for more information.
Regressions - classic swrast
---
Tests:
- glean/fragPro
Tom Stellard writes:
> On Wed, Aug 27, 2014 at 03:07:36PM -0700, Ian Romanick wrote:
>> On 08/27/2014 02:55 PM, Marek Olšák wrote:
>> > Our plan is to always require the latest released version of LLVM
>> > because of new features in our LLVM backend that the radeonsi driver
>> > depends on to ad
On Monday, September 01, 2014 09:44:34 AM Jordan Justen wrote:
> Reduce brw_fs_precompile's dependence on gl_fragment_program.
The thing is, virtually all of the fields here are fragment program specific,
and not going to be useful for compute. So, I'm not sure whether this is
really useful. Y
On Monday, September 01, 2014 09:44:33 AM Jordan Justen wrote:
> Reduce scalar_visitor's dependence on gl_fragment_program.
>
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 28
>
> src/mesa/drivers/dri/i965/brw_scalar_visitor.c
On Monday, September 01, 2014 09:44:32 AM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_scalar_visitor.cpp | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
Always glad to see this.
Reviewed-by: Kenneth Graunke
signature.asc
Descr
tex-miplevel-selection was hammering my memory manager with primconverts
on individual quads. This gets all those converted IBs packed into larger
IBs.
---
src/gallium/auxiliary/indices/u_primconvert.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/src/g
gcc isn't detecting that src is set before used, since both are under if
(info->indexed).
---
src/gallium/auxiliary/indices/u_primconvert.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/indices/u_primconvert.c
b/src/gallium/auxiliary/indices/u_primconve
Hi Glenn,
I've tried applying your patch on the latest mesa code and it could not
be applied properly. Could you rebase your patch? I would be happy to
test it on Cayman for you once done.
Cheers.
--
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mesa
All shader stages have these fields, so it makes sense to store them in
the common base structure, rather than duplicating them in each.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h | 7 +++
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++---
src/mesa/driver
Emil Velikov writes:
> This patch seems to regress two tests when running classic swrast. The gallium
> swrast is OK.
>
> glean:
> fragProg1-CMP
> glsl1-Preprocessor test 11 (#elif)
>
> I will not have the chance to run piglit on a i965 system until next
> week so I would love if someone can t
https://bugs.freedesktop.org/show_bug.cgi?id=83382
--- Comment #2 from Alexander von Gluck ---
What version of fedora is this?
What commands are you using to build Mesa?
rpm -qa | grep gcc
Thanks!
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Hi Michel,
On 02/09/14 08:17, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Making sure large file support is enabled across the tree even on 32-bit
> systems.
>
> Signed-off-by: Michel Dänzer
> ---
> configure.ac | 2 ++
> src/gallium/auxiliary/os/os_mman.h
Previously, we were accidentally assuming that the level of both textures
was 0. Now we actually use the correct level in our hacked texture view.
This doesn't 100% fix the meta path because the texture type is getting
lost somewhere in the pipeline. However, it actually copies to/from the
correc
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_copy_image.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c
b/src/mesa/drivers/dri/i965/intel_copy_image.c
index 935f91c..8bda2dd 100644
--- a/src/mesa
Previously, we were using the source images level for both source and
destination. Now, we're using the correct level.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_copy_image.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/d
This series contains 4 small fixes to the meta and i965 implementations of
GL_ARB_copy_image. Most of the problems were with respect to blitting
between different mipmap levels of the two textures. The original
implementation, as it turns out, only worked on mipmap level 0. This fixes
it.
There
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_copy_image.c | 31 +++-
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c
b/src/mesa/drivers/dri/i965/intel_copy_image.c
index 8bda2dd..f7db56d 100
Reviewed-by: Jordan Justen
On Tue, Sep 2, 2014 at 1:31 PM, Kenneth Graunke wrote:
> All shader stages have these fields, so it makes sense to store them in
> the common base structure, rather than duplicating them in each.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/br
https://bugs.freedesktop.org/show_bug.cgi?id=83382
--- Comment #3 from Vinson Lee ---
$ cat /etc/redhat-release
Fedora release 22 (Rawhide)
$ export CC=clang
$ export CXX=clang++
$ ./autogen.sh
$ make
$ yum info gcc
Installed Packages
Name: gcc
Arch: x86_64
Version : 4.9.1
From: Michel Dänzer
Only MCJIT is available anymore.
Signed-off-by: Michel Dänzer
---
src/gallium/auxiliary/gallivm/lp_bld_init.c | 9 +
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 2 ++
2 files changed, 11 insertions(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c
On 03.09.2014 06:50, Emil Velikov wrote:
On 02/09/14 08:17, Michel Dänzer wrote:
diff --git a/src/gallium/auxiliary/os/os_mman.h
b/src/gallium/auxiliary/os/os_mman.h
index b48eb053..19478d2 100644
--- a/src/gallium/auxiliary/os/os_mman.h
+++ b/src/gallium/auxiliary/os/os_mman.h
@@ -40,9 +40,6
On 03.09.2014 04:53, Emil Velikov wrote:
Module: Mesa
Branch: 10.2
Commit: 3fe59905fc684f64508982d405031771e273e656
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fe59905fc684f64508982d405031771e273e656
Author: Vinson Lee
Date: Tue Aug 19 23:17:40 2014 -0700
gallivm: Fix build wi
From: Michel Dänzer
Making sure large file support is enabled across the tree even on 32-bit
systems.
Signed-off-by: Michel Dänzer
---
v2: Remove radeon_ctx.h hunk, thanks Marek and Emil.
configure.ac | 2 ++
src/gallium/auxiliary/os/os_mman.h| 1
On 03.09.2014 04:14, Marek Olšák wrote:
From: Marek Olšák
*_update_db_shader_control depends on the alpha test state. The problem was
it was in a block which is only entered if the pixel shader is changed.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74863
Reviewed-by: Michel Dänze
Everything has been converted to preserve the CFG.
---
src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 20 ++--
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
.../drivers/dri/i965/brw_fs_copy_propag
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 ++-
src/mesa/drivers/dri/i965/brw_vec4.h | 10 ++--
.../drivers/dri/i965/brw_vec4_reg_allocate.cpp | 11 ++--
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 62 +-
4 files changed, 54 insertion
---
src/mesa/drivers/dri/i965/brw_vec4.h | 3 ---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 11 ---
2 files changed, 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index e752415..9706d28 100644
--- a/src/mesa/dri
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 30 +-
src/mesa/drivers/dri/i965/brw_fs.h | 6 --
2 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 268f528..5c4ecb4 10064
Now that nothing invalidates the CFG, we can calculate_cfg() immediately
after emit_fb_writes()/emit_thread_end() and never again.
---
src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp| 2 --
src/mesa/drivers/dri/i965/brw_fs.cpp | 14 ++
src/mesa/driver
---
.../drivers/dri/i965/brw_schedule_instructions.cpp | 74 --
1 file changed, 42 insertions(+), 32 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 04ac242..bac0d55 100644
--- a
---
src/mesa/drivers/dri/i965/brw_shader.cpp| 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 14 +++---
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp | 2 +-
src/mesa/drivers/dri/
The only trick is changing a break into a return true in register
coalescing, since the macro is actually a double loop, and break will do
something different than you expect. (Wish I'd realized that earlier!)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 28 +++---
src/
---
src/mesa/drivers/dri/i965/brw_cfg.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.h
b/src/mesa/drivers/dri/i965/brw_cfg.h
index 1498f1e..94713df 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.h
+++ b/src/mesa/drivers/dri/i965/brw_cfg.h
@@ -110,10
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 8e328ea..255df18 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965
This series finishes making the CFG a fundamental piece of the IR.
For each compile, we now only calculate the CFG once after we've finished
visiting the GLSL IR. Once that's in place, we stop using the instruction
list and instead iterate through the instructions in each block. With that
in place
When instruction lists are per-basic block, this won't work.
---
.../drivers/dri/i965/brw_dead_control_flow.cpp | 5 +--
src/mesa/drivers/dri/i965/brw_fs.cpp | 20 ---
.../dri/i965/brw_fs_peephole_predicated_break.cpp | 7 ++--
.../dri/i965/brw_fs_saturate_propagation.
I think this bug crept in only recently.
---
src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index 56884e6..7a302da 100644
--- a
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 536a4b6..f1c5210 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/
---
src/mesa/drivers/dri/i965/brw_cfg.h| 53 ++
.../drivers/dri/i965/brw_dead_control_flow.cpp | 16 +++
.../dri/i965/brw_fs_peephole_predicated_break.cpp | 12 ++---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 4 +-
src/mesa/drivers/dri/i965/
The register coalescing portion of this patch hurts three shaders in
Guacamelee by one instruction each, but examining the diff makes me
believe that what we were generating was (perhaps harmlessly) incorrect.
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 30 +-
1 file c
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 62 -
src/mesa/drivers/dri/i965/brw_cfg.h| 77 +-
.../drivers/dri/i965/brw_dead_control_flow.cpp | 6 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +-
src/mesa/drivers/dr
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +++---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 ++
2 files changed, 5 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5277420..39603cd 10
---
src/mesa/drivers/dri/i965/brw_cfg.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.h
b/src/mesa/drivers/dri/i965/brw_cfg.h
index ca6a2ac..1498f1e 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.h
+++ b/src/mesa/drivers/dri/i965/brw_cfg.h
@@ -1
---
src/mesa/drivers/dri/i965/brw_cfg.cpp| 16
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 +++---
src/mesa/drivers/dri/i965/brw_shader.h | 3 ---
3 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.cpp
b/src/mes
When the instructions aren't in a flat list, this wouldn't have worked.
Also, this should be faster.
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 28 +++
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
https://bugs.freedesktop.org/show_bug.cgi?id=82477
Vinson Lee changed:
What|Removed |Added
Blocks||79706
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https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee changed:
What|Removed |Added
Depends on||82477
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This series fixes
https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli
On 09/03/2014 01:49 AM, Jason Ekstrand wrote:
> This series contains 4 small fixes to the meta and i965 implementations of
> GL_ARB_copy_image. Most of the problems were with respect to blitting
> betw
On Tue, Aug 26, 2014 at 4:57 AM, Tapani wrote:
> On 08/26/2014 02:29 PM, Emil Velikov wrote:
>>
>> On 26/08/14 08:41, Tapani wrote:
>>>
>>> On 08/25/2014 07:19 PM, Eric Anholt wrote:
Tapani Pälli writes:
> commit 4e64cfbb4 changed how gl_constant_value bool gets interpreted
>>>
On 09/03/2014 08:40 AM, Vinson Lee wrote:
> On Tue, Aug 26, 2014 at 4:57 AM, Tapani wrote:
>> On 08/26/2014 02:29 PM, Emil Velikov wrote:
>>> On 26/08/14 08:41, Tapani wrote:
On 08/25/2014 07:19 PM, Eric Anholt wrote:
> Tapani Pälli writes:
>
>> commit 4e64cfbb4 changed how gl_co
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