On Fri, 2017-01-06 at 10:24 -0800, Jason Ekstrand wrote:
> On Jan 6, 2017 10:18, "Jason Ekstrand" wrote:
> Thanks for catching this. I wonder how I managed to switch the GL
> driver over to using ISL for emitting surface states without
> regressing anything...
>
> Reviewed-by: Jason Ekstrand
>
On Thu, 2017-01-05 at 17:32 +0100, Erik Faye-Lund wrote:
>
>
> On Jan 5, 2017 10:20, "Samuel Iglesias Gonsálvez" om> wrote:
> We need to pick two 32-bit values per component to perform the right
> shuffle operation.
>
> v2 (Jason):
> - Add assert to check matching bit sizes (Jason)
> - Simplify
On Sun, 2017-01-08 at 22:59 -0800, Matt Turner wrote:
> I have just started reviewing the series, and I have two trivial
> comments that seem to apply to a number of patches. The first is that
> we
> prefer to use the name BayTrail (abbreviation BYT) instead of
> Valleyview
> (and its abbreviation
https://bugs.freedesktop.org/show_bug.cgi?id=97879
--- Comment #48 from Jani Kärkkäinen ---
Using AMDGPU-PRO the hangs are non-existent. So there must be SOMETHING in the
whole mesa-driver stack, that causes the hangs, if not the GL drivers
themselves.
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You are receiving this mail because:
Yo
Sorry, my bad, I'll post a new revision incorporating Rob's review comment
2017-01-09 7:07 GMT+08:00 Mauro Rossi :
> 2017-01-06 18:35 GMT+01:00 Wu Zhen :
> > From: WuZhen
> >
> > this commit fixes mesa building on lollipop, however,
> > llvm on lollipop is too old to build amdgpu
> >
> > based o
I have just started reviewing the series, and I have two trivial
comments that seem to apply to a number of patches. The first is that we
prefer to use the name BayTrail (abbreviation BYT) instead of Valleyview
(and its abbreviation VLV) in comments. I'm not really sure why, to be
honest.
The oth
On 01/05, Samuel Iglesias Gonsálvez wrote:
From: "Juan A. Suarez Romero"
When dealing with DF uniforms with just 1 component, we set stride 0 to
use the value along the operation. However, when duplicating the
regioning parameters in IVB/VLV, we are violating the regioning
restrictions.
So ins
On 01/05, Samuel Iglesias Gonsálvez wrote:
From: "Juan A. Suarez Romero"
In IVB and VLV, both regioning parameters and execution sizes are measured as
floats.
So when we have something like:
mov(8) g2<1>DF g3<4,4,1>DF
We are not actually moving 8 doubles (our intention), but 4 doubles.
We n
On 01/05, Samuel Iglesias Gonsálvez wrote:
From: Iago Toral Quiroga
4-wide DF operations where NibCtrl applies require and execsize of 8
in IvyBridge/Valleyview.
Wow, the documentation is bad in this area. The QtrCtrl description in
IVB's Vol4 Part3 explicitly says "NibCtrl is only allowed fo
On 09/01/17 03:13 PM, Michel Dänzer wrote:
> On 07/01/17 11:46 PM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> ~/.drirc is created by the driconf tool (GPL license) and it overrides
>> system drirc settings and can't be changed by Mesa updates.
>> This drops support for the tool. It has been a s
On 07/01/17 11:46 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ~/.drirc is created by the driconf tool (GPL license) and it overrides
> system drirc settings and can't be changed by Mesa updates.
> This drops support for the tool. It has been a source of major pain
> for us and it continues to
On 9 January 2017 at 15:26, Kenneth Graunke wrote:
> In Vulkan, we always have both the TCS and TES available in the same
> pipeline, so we can simply use the TCS OutputVertices execution mode
> value as the TES PatchVertices built-in.
>
> For GLSL, we handle this in the linker. But we could use
On 9 January 2017 at 15:26, Kenneth Graunke wrote:
> This is all implemented now.
Do we want to key these off the nir_spirv_supported_extensions thing I added?
Dave.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/compiler/spirv/spirv_to_nir.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 de
On 9 January 2017 at 15:26, Kenneth Graunke wrote:
> We need to:
> - handle the extra array level for per-vertex varyings
> - handle the patch qualifier correctly
> - assign varying locations
>
> Signed-off-by: Kenneth Graunke
Seems sane,
Reviewed-by: Dave Airlie
> ---
> src/compiler/spirv/vt
---
src/compiler/glsl/linker.cpp | 35 +++
src/mesa/main/mtypes.h | 10 --
src/mesa/main/shaderapi.c| 6 ++
src/mesa/main/shaderobj.c| 2 --
4 files changed, 17 insertions(+), 36 deletions(-)
diff --git a/src/compiler/glsl/linker.cpp b/s
---
src/compiler/glsl/link_varyings.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index da51fd8..398e1da 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -120,6 +120,7
---
src/compiler/glsl/linker.cpp | 70 +++-
src/mesa/main/shaderapi.c| 12 +++-
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 41a566a..53ee7e6 100644
--- a/src/compi
---
src/compiler/glsl/linker.cpp| 63 +++--
src/mesa/drivers/dri/i965/brw_tcs.c | 6 ++--
src/mesa/main/shaderapi.c | 15 +++--
3 files changed, 39 insertions(+), 45 deletions(-)
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/l
This is only used by gl_linked_shader as a temp during linking
so use a temp there instead.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 8 +++-
src/mesa/main/mtypes.h | 3 +--
3 files changed, 5 insertions(+), 8 deletions(-)
Here we remove the single use of this field in gl_linked_shader
which allows us to move the field out of gl_shader_info
While we are at it we rewrite link_xfb_stride_layout_qualifiers()
to be more clear.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/link_varyings.cpp
---
src/mesa/main/mtypes.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index aff426f..e3d9e62 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2354,8 +2354,6 @@ struct gl_linked_shader
struct exec_list *packed_varying
---
src/compiler/glsl/linker.cpp| 25 -
src/mesa/drivers/dri/i965/brw_tcs.c | 6 ++
src/mesa/main/shaderapi.c | 6 +-
3 files changed, 15 insertions(+), 22 deletions(-)
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
ind
This is only used by gl_linked_shader as a temp during linking
so use a temp there instead.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 8 +++-
src/mesa/main/mtypes.h | 9 +
3 files changed, 9 insertions(+), 10 delet
On 9 January 2017 at 15:26, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/compiler/spirv/spirv_to_nir.c | 28 ++--
> 1 file changed, 22 insertions(+), 6 deletions(-)
>
> One totally bogus thing here: we set CCW backwards. In all three driver
> backe
There is no reason for this to be in the shared gl_shader_info or
to copy it to gl_program at the end of linking (its already there).
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 2 +-
src/mesa/main/mtypes.h | 3 ++-
src/mesa/mai
This is only used by gl_linked_shader as a temp during linking
so use a temp there instead.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 12 +---
src/mesa/main/mtypes.h | 2 +-
3 files changed, 7 insertions(+), 9 deleti
This is never used in gl_linked_shader other than as a temp
during linking so just use a temp instead.
---
src/compiler/glsl/glsl_parser_extras.cpp | 3 +--
src/compiler/glsl/linker.cpp | 21 -
src/mesa/main/mtypes.h | 3 ++-
3 files changed, 11
Also move out of the shared gl_shader_info.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 3 +--
src/mesa/main/mtypes.h | 3 +--
src/mesa/main/shaderapi.c| 1 -
4 files changed, 3 insertions(+), 6 deletions(-)
dif
This is only used by gl_shader not gl_linked_shader so move it
there.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 2 +-
src/mesa/main/mtypes.h | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/compiler/
We also move EarlyFragmentTests out of the gl_shader_info struct
as it is now only used by gl_shader.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
src/compiler/glsl/linker.cpp | 4 ++--
src/mesa/main/mtypes.h | 12 ++--
src/mesa/main/shaderapi.
These are rewritten to do what the function name suggests, that is
_mesa_shader_program_use() sets the use of all stage and
_mesa_program_use() sets the use of a single stage.
This patch is split out to make review easier but will be squashed into
mesa: use gl_program for CurrentProgram rather tha
There is no need to go via the pointer in nir_shader. This change
is required for the shader cache as we don't create a nir_shader.
---
src/mesa/drivers/dri/i965/brw_vs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/
Now that the i965 backend doesn't depend on this field we can
make it more generic and short circuit a bunch of code paths.
The new field will be used in a following patch for another
clean-up.
---
src/compiler/glsl/link_varyings.cpp| 5 +++-
src/compiler/glsl/linker.cpp |
A later patch will result in SSO programs calling this helper
per gl_program rather than per gl_shader_program.
---
src/mesa/main/pipelineobj.c | 10 --
src/mesa/main/shaderapi.c | 30 ++
src/mesa/main/shaderapi.h | 4 ++--
3 files changed, 20 insertions(+)
There are some line wrapping violations here but those lines will get
deleted in the following patch.
---
src/compiler/glsl/glsl_to_nir.cpp | 2 --
src/compiler/glsl/linker.cpp| 32 +++
src/mesa/drivers/dri/i965/brw_vs.c | 2 +-
src/mesa/main/mtypes.h
We only need to set it when linking was successful and the program
being linked is currently active.
The programs_in_use mask is just used as a flag for now but in
a following patch we will use it to update the CurrentProgram
array.
V2: make sure to flush vertices before linking (suggested by Mar
---
src/compiler/glsl/link_varyings.cpp | 6 --
src/compiler/glsl/linker.cpp| 14 --
src/mesa/main/mtypes.h | 7 ---
3 files changed, 4 insertions(+), 23 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
This likely fixes a subroutine bug were
_mesa_shader_program_init_subroutine_defaults() would never have been
called for the relinked program as we previously just set
_NEW_PROGRAM as dirty and never called the _mesa_use* functions.
We also switch to using gl_program for the CurrentProgram array s
This makes much more sense and should be more performant in some
critical paths such as SSO validation which is called at draw time.
Previously the CurrentProgram array could have contained multiple
pointers to the same struct which was confusing and we would often
need to fish out the information
We also move NumProgramResourceList at the same time.
GLES does interface validation on SSO at runtime so we need to move
this to be able to switch to storing gl_program pointers in
CurrentProgram.
---
src/compiler/glsl/linker.cpp | 20 +--
src/mesa/main/mtypes.h |
Sorry to keep spamming the list with these but a bunch have now landed
and theire was a bug fix and a bunch of rebasing required in the remaining
patches.
Thanks to all that have help review the series so far.
Patches 4-6 is the big change everything else shouldn't be too hard to
review.
Patches
Woohoo! I'll review tomorrow.
On Jan 8, 2017 9:28 PM, "Kenneth Graunke" wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/intel/vulkan/anv_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> I'm not clear whether we want to do this yet.
>
> On Skylake, the status is: 99.3%
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_pipeline.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 17491e34fc0..b34759a5406 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/i
When there are no framebuffer attachments, fb->width and fb->height will
be 0. Subtracting 1 results in 4294967295 which is too large for the
field, causing genxml assertions when trying to create the packet.
In this case, we can just program it to 1.
Caught by dEQP-VK.tessellation.tesscoord.tri
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_pipeline.c | 156 +++-
1 file changed, 154 insertions(+), 2 deletions(-)
There's one majorly bogus thing here: caching is totally disabled.
We set key fields based on the NIR, which breaks the dataflow ex
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/genX_pipeline.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 80b7c75a47c..9a8d2a19b63 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_p
Signed-off-by: Kenneth Graunke
---
src/compiler/spirv/spirv_to_nir.c | 28 ++--
1 file changed, 22 insertions(+), 6 deletions(-)
One totally bogus thing here: we set CCW backwards. In all three driver
backends (i965, nvc0, radeonsi), we invert CCW because it doesn't seem
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
I'm not clear whether we want to do this yet.
On Skylake, the status is: 99.3% of the CTS passing, Sascha demos work.
There are two remaining sets of failures:
- dEQP-VK.t
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_private.h | 2 +
src/intel/vulkan/genX_pipeline.c | 87
src/intel/vulkan/genX_state.c| 4 --
3 files changed, 89 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_private.h b/sr
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_device.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 062fab6fabe..a0240d289ba 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/i
This is all implemented now.
Signed-off-by: Kenneth Graunke
---
src/compiler/spirv/spirv_to_nir.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 8f19afa77ee..2ea836bd7f6 100644
--- a/src/compil
We need to:
- handle the extra array level for per-vertex varyings
- handle the patch qualifier correctly
- assign varying locations
Signed-off-by: Kenneth Graunke
---
src/compiler/spirv/vtn_private.h | 1 +
src/compiler/spirv/vtn_variables.c | 56 ++
2 fil
In Vulkan, we always have both the TCS and TES available in the same
pipeline, so we can simply use the TCS OutputVertices execution mode
value as the TES PatchVertices built-in.
For GLSL, we handle this in the linker. But we could use this pass
in the case when both TCS and TES are linked togeth
On 4 January 2017 at 08:06, Bas Nieuwenhuizen wrote:
> Also changed RADV_SHOW_QUEUES to a no compute queue option. That
> would make more sense later when the compute queue is established,
> but the transfer queue still experimental.
>
> v2: Don't include the trace flag.
Reviewed-by: Dave Airlie
https://bugs.freedesktop.org/show_bug.cgi?id=99319
--- Comment #3 from Bas Nieuwenhuizen ---
It seems a VBO with a stride of 14 gets used, the u_vbuf determines that is not
4 byte aligned and then translates it on the CPU to be 4-byte aligned. For the
3 vertex attributes each it maps the VBO read
Reviewed-by: Jordan Justen
On 2017-01-08 15:45:49, Kenneth Graunke wrote:
> We want vue_map->num_slots to be one more than the final slot.
>
> When assigning fixed slots, built-in slots, and non-SSO user varyings,
> we do slot++. This leaves "slot" as one past the most recently assigned
> slot.
On Sat, 2017-01-07 at 07:45 -0800, Jason Ekstrand wrote:
> Looks functionally correct. I left a few simple comments.
>
> On Jan 7, 2017 3:59 AM, "Timothy Arceri" m> wrote:
> From: Kenneth Graunke
>
> This tries to move comparisons (a common source of boolean values)
> closer to their first use
From: Kenneth Graunke
This tries to move comparisons (a common source of boolean values)
closer to their first use. For GPUs which use condition codes,
this can eliminate a lot of temporary booleans and comparisons
which reload the condition code register based on a boolean.
V2: (Timothy Arceri
We want vue_map->num_slots to be one more than the final slot.
When assigning fixed slots, built-in slots, and non-SSO user varyings,
we do slot++. This leaves "slot" as one past the most recently assigned
slot. But for SSO user varyings, we computed slot based on the varying
location value...an
08.01.2017 17:05, Grazvydas Ignotas пишет:
Some spelling suggestions, since you seem to be doing another version
of these patches:
Yes, the fuzzer uncovered many bugs and deviations in behaviour from the
old flex/bison path. Trivial, but numerous. So I need some time to hunt
all the problem do
08.01.2017 17:11, Grazvydas Ignotas пишет:
On Sat, Jan 7, 2017 at 9:02 PM, Vladislav Egorov wrote:
@@ -582,6 +609,333 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
%%
+static void
+glcpp_fast_skip_singleline_comment (glcpp_parser_t *parser, char **input)
+{
+ /* Skip // */
+ cha
2017-01-06 18:35 GMT+01:00 Wu Zhen :
> From: WuZhen
>
> this commit fixes mesa building on lollipop, however,
> llvm on lollipop is too old to build amdgpu
>
> based on initial work by Mauro Rossi
>
> Change-Id: I98d646f9e1c61fe2754479382885718386a8bbb7
> Reviewed-by: Mauro Rossi
> Reviewed-by:
https://bugs.freedesktop.org/show_bug.cgi?id=94512
EoD changed:
What|Removed |Added
CC|e...@xmw.de |
--
You are receiving this mail because:
You are
Hello Ilia
Thank you for the irc reference, I'll check there for live responses the
next time I look into this.
I will post here what I have found out for now, just to write it down:
Running with R600_DEBUG=nosb yields the same results.
It makes sense because the driver kicks the bytecode out be
On Sun, Jan 8, 2017 at 9:38 AM, Grazvydas Ignotas wrote:
> Fixes crashes when both glx-tls and asm are enabled on x32.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94512
> Signed-off-by: Grazvydas Ignotas
Thanks, this is great. Who ever commi
https://bugs.freedesktop.org/show_bug.cgi?id=94512
--- Comment #13 from Grazvydas Ignotas ---
(In reply to EoD from comment #12)
> I am no expert, but don't you want to use exact-length types instead of
> "long long"?
mapi doesn't use such types and I did not want to drag in a dependency. Also
t
https://bugs.freedesktop.org/show_bug.cgi?id=92954
--- Comment #2 from Karl Lessard ---
The reason this has stopped working is because the drawable is not refreshed
with the data written to the front buffer before reading its pixels.
Since
https://cgit.freedesktop.org/mesa/mesa/commit/?id=2b6765
On Sun, 2017-01-08 at 08:17 -0800, Jason Ekstrand wrote:
> The number of little single-character prefixes is starting to get
> out-of-hand.
I had a feeling you wouldn't like them but I just thought I'd put out
there what was useful and we could discuss.
> Could we instead work the condition fun
This seems reasonable. I spent a bit of time thinking about how this
could be improved, but couldn't come up with anything. Going to leave
this on-list for a bit though so others better versed in the mapi
logic can provide feedback. In the meanwhile, this is
Reviewed-by: Ilia Mirkin
On Sun, Jan
https://bugs.freedesktop.org/show_bug.cgi?id=94512
--- Comment #12 from EoD ---
(In reply to Grazvydas Ignotas from comment #11)
> Ignore the previous patch, it's botched.
> I've compiled the x32 deps, so could test what allowed to produce a working
> patch:
> https://lists.freedesktop.org/archiv
https://bugs.freedesktop.org/show_bug.cgi?id=94512
Grazvydas Ignotas changed:
What|Removed |Added
CC||e...@xmw.de
--- Comment #11 from Gra
Fixes crashes when both glx-tls and asm are enabled on x32.
Cc: mesa-sta...@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94512
Signed-off-by: Grazvydas Ignotas
---
no commit access, please push
src/mapi/entry_x86-64_tls.h | 31 ---
1 f
Fix this build error with GCC 4.4.7.
CC nir/nir_opt_copy_prop_vars.lo
nir/nir_opt_copy_prop_vars.c: In function ‘copy_prop_vars_block’:
nir/nir_opt_copy_prop_vars.c:765: error: unknown field ‘deref’ specified in
initializer
nir/nir_opt_copy_prop_vars.c:765: warning: missing braces around in
The number of little single-character prefixes is starting to get
out-of-hand. Could we instead work the condition function pointer stuff a
bit and use that for "is used in if" and "has multiple uses"? I've got
some more detailed ideas about that but I need to be in front of my laptop
to really d
On Sun, Jan 8, 2017 at 4:11 PM, Grazvydas Ignotas wrote:
> On Sat, Jan 7, 2017 at 9:02 PM, Vladislav Egorov wrote:
>> @@ -582,6 +609,333 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
>>
>> %%
>>
>> +static void
>> +glcpp_fast_skip_singleline_comment (glcpp_parser_t *parser, char **input)
>
On Sat, Jan 7, 2017 at 9:02 PM, Vladislav Egorov wrote:
> @@ -582,6 +609,333 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
>
> %%
>
> +static void
> +glcpp_fast_skip_singleline_comment (glcpp_parser_t *parser, char **input)
> +{
> + /* Skip // */
> + char *buf = *input + 2;
> +
> + wh
On Sun, Jan 8, 2017 at 4:05 PM, Grazvydas Ignotas wrote:
> On Sat, Jan 7, 2017 at 9:02 PM, Vladislav Egorov wrote:
>> +*
>> +* Check for INT_MAX for the only reason that utility
>
> "... only for the only reason that ..." sounds better to me.
whoops, "... only for
Some spelling suggestions, since you seem to be doing another version
of these patches:
On Sat, Jan 7, 2017 at 9:02 PM, Vladislav Egorov wrote:
> glcpp's printing is an obvious low hanging fruit:
>
> 1. It unnecessarily uses formatted printing to print output of
>preprocessing. To print just
https://bugs.freedesktop.org/show_bug.cgi?id=99319
--- Comment #2 from Thomas Helland ---
A small update: It appears we are spending all of the time walking in a
for-loop at the bottom of context_cleanup:
for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) {
cs->buffer_indices_hashl
On Sat, 2017-01-07 at 11:03 -0800, Matt Turner wrote:
> On Sat, Jan 7, 2017 at 3:58 AM, Timothy Arceri
> wrote:
> > From: Kenneth Graunke
> >
> > On BDW:
> >
> > total instructions in shared programs: 13071119 -> 13070371 (-
> > 0.01%)
> > instructions in affected programs: 83424 -> 82676 (-0.9
On BDW:
total instructions in shared programs: 13060680 -> 13060620 (-0.00%)
instructions in affected programs: 6060 -> 6000 (-0.99%)
helped: 7
HURT: 0
total cycles in shared programs: 256601956 -> 256590950 (-0.00%)
cycles in affected programs: 1269546 -> 1258540 (-0.87%)
helped: 23
HURT: 11
---
Otherwise we will end up with an extra instruction to compare the
result of the inot.
On BDW:
total instructions in shared programs: 13060620 -> 13060481 (-0.00%)
instructions in affected programs: 103379 -> 103240 (-0.13%)
helped: 127
HURT: 0
total cycles in shared programs: 256590950 -> 256587
---
src/compiler/nir/nir_algebraic.py | 4 +++-
src/compiler/nir/nir_search.c | 3 +++
src/compiler/nir/nir_search.h | 3 +++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index 04c7423..c0ec019 100644
-
https://bugs.freedesktop.org/show_bug.cgi?id=99319
--- Comment #1 from Thomas Helland ---
I did a small profiling session with my mesa-git RX460 setup. It appears we are
spending almost all of our time in amdgpu_cs_context_cleanup. Haven't invested
more time into debuging this yet, but thought I'
On Sat, 2017-01-07 at 11:03 -0800, Matt Turner wrote:
> On Sat, Jan 7, 2017 at 3:58 AM, Timothy Arceri
> wrote:
> > From: Kenneth Graunke
> >
> > On BDW:
> >
> > total instructions in shared programs: 13071119 -> 13070371 (-
> > 0.01%)
> > instructions in affected programs: 83424 -> 82676 (-0.9
https://bugs.freedesktop.org/show_bug.cgi?id=99311
Kai changed:
What|Removed |Added
Status|RESOLVED|VERIFIED
--- Comment #3 from Kai ---
(In reply to
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