On 01/05, Samuel Iglesias Gonsálvez wrote:
From: "Juan A. Suarez Romero" <jasua...@igalia.com>When dealing with DF uniforms with just 1 component, we set stride 0 to use the value along the operation. However, when duplicating the regioning parameters in IVB/VLV, we are violating the regioning restrictions. So instead of using the value with stride 0, we just duplicate it in a register, and then use the register instead, avoiding a DF with stride 0. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 63 ++++++++++++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/brw_fs.h | 1 + 2 files changed, 64 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index eb3b4aa..78f2124 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -2168,6 +2168,62 @@ fs_visitor::lower_constant_loads() invalidate_live_intervals(); } +/** + * When dealing with double-precision floats (DF) in IVB/VLV, we need to + * duplicate the regioning parameters. This means that for a DF scalar + * (regioning <0,1,0>) we will end up using regioning <0,2,0>. But according + * to General Restrictions on Regioning Parameters (Ivy PRM, Vol. 4 Part 3, + * page 69), if VertStride = HorzStride = 0, Width must be 1 regardless of the + * value of ExecSize. So we would be violating the restriction. To overcome + * it, this lowering step duplicates the scalar in a couple of registers, + * reading it as two floats to avoid the restriction.
Huh, I would have thought that a <0,1,0>DF region would have done what we wanted, without the need to double any of the region parameters. I haven't tested yet, so I'll play with it tomorrow and see if it blows up.
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