On 12.02.2016 00:05, Nicolai Hähnle wrote:
> On 10.02.2016 22:59, Dave Airlie wrote:
>>
>> So in Fedora rawhide we are now building llvm 3.7.1 into the lots of
>> little shared libraries format.
>
> Barring all the other problems, are you sure this is a good idea? I
> remember somebody mentioning
On 2016-02-11 22:16:18, Jason Ekstrand wrote:
> This little series expands the GLSL type system in preparation for SPIR-V.
> The first few patches are to glsl_types and add a bare sampler type,
> function types, and an image type helper. The rest flesh out the nir_types
> C wrappers so that we can
On Thursday, February 11, 2016 11:28:44 PM PST Francisco Jerez wrote:
> Kenneth Graunke writes:
>
> > I think this was just missed; Curro and I were probably writing
> > code simultaneously and forgot to combine them at the end.
> >
> > Signed-off-by: Kenneth Graunke
> > Reviewed-by: Jordan Just
Kenneth Graunke writes:
> I think this was just missed; Curro and I were probably writing
> code simultaneously and forgot to combine them at the end.
>
> Signed-off-by: Kenneth Graunke
> Reviewed-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/gen7_l3_state.c | 7 ++-
> 1 file changed
On Thu, Feb 11, 2016 at 01:41:47PM -0800, Ben Widawsky wrote:
> On Thu, Feb 11, 2016 at 08:33:56PM +0200, Topi Pohjolainen wrote:
> > In addition to simply calling miptree_create() the higher level
> > call intel_miptree_create() also considers if the buffer should
> > be associated with an auxilia
Kenneth Graunke writes:
> The L3 partitioning code tries to look at all programs - both render
> programs (VS/TCS/TES/GS/FS) and compute (CS).
>
> After calling brw_clear_cache, all prog_data pointers are invalid and
> point to freed data. The intention was that flagging the dirty bits for
> all
Matt Turner writes:
> On Thu, Feb 11, 2016 at 7:31 PM, Francisco Jerez
> wrote:
>> Matt Turner writes:
>>
>>> On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
>>> wrote:
Would be really nice if we could also get rid of reg_offset as we're at
it. reg and subreg_offset basically rep
Reviewed-by: Jordan Justen
On 2016-02-11 22:56:42, Kenneth Graunke wrote:
> The L3 partitioning code tries to look at all programs - both render
> programs (VS/TCS/TES/GS/FS) and compute (CS).
>
> After calling brw_clear_cache, all prog_data pointers are invalid and
> point to freed data. The i
This is a port of Matt's GLSL IR lowering pass to NIR. It's required
because we translate SPIR-V directly to NIR, bypassing GLSL IR.
I haven't introduced a lower_ldexp flag, as I believe all current NIR
consumers would set the flag. i965 wants this, vc4 doesn't implement
this feature, and st_gls
The L3 partitioning code tries to look at all programs - both render
programs (VS/TCS/TES/GS/FS) and compute (CS).
After calling brw_clear_cache, all prog_data pointers are invalid and
point to freed data. The intention was that flagging the dirty bits for
all programs would cause the next draw c
Rhys Kidd writes:
> Variable no longer is read, and always set to true.
>
> Accordingly, the later assert() serves no active current purpose. The prior
> limb of the test 'qinst->cond == QPU_COND_ALWAYS' will never trigger an
> assert()
> as is. If it did previously define a relevant test, this
---
src/compiler/nir_types.cpp | 18 ++
src/compiler/nir_types.h | 3 +++
2 files changed, 21 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index 89f1be5..2942810 100644
--- a/src/compiler/nir_types.cpp
+++ b/src/compiler/nir_types.cpp
@@ -1
---
src/compiler/nir_types.cpp | 61 ++
src/compiler/nir_types.h | 14 +++
2 files changed, 75 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index 17950cc..89f1be5 100644
--- a/src/compiler/nir_types.cpp
++
---
src/compiler/glsl_types.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h
index b0ef031..2f612d8 100644
--- a/src/compiler/glsl_types.h
+++ b/src/compiler/glsl_types.h
@@ -820,6 +820,10 @@ private:
/*@}*/
This is to be used by SPIR-V for representing a sampler that isn't attached
to any particular image. In SPIR-V, all of the interesting bits such as
dimensionality, sampled type, etc. come from the image, the bare "sampler"
type simply uses a sampled type of VOID and 0 values for the rest.
---
src
This little series expands the GLSL type system in preparation for SPIR-V.
The first few patches are to glsl_types and add a bare sampler type,
function types, and an image type helper. The rest flesh out the nir_types
C wrappers so that we can do almost anything from C that we can from C++.
Jaso
---
src/compiler/nir_types.cpp | 46 ++
src/compiler/nir_types.h | 12
2 files changed, 58 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index 2942810..3669cfe 100644
--- a/src/compiler/nir_types.cpp
+
---
src/compiler/nir_types.cpp | 19 +++
src/compiler/nir_types.h | 9 +
2 files changed, 28 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index a87dcd8..17950cc 100644
--- a/src/compiler/nir_types.cpp
+++ b/src/compiler/nir_types.cp
---
src/compiler/glsl_types.cpp | 87 +
src/compiler/glsl_types.h | 2 ++
2 files changed, 89 insertions(+)
diff --git a/src/compiler/glsl_types.cpp b/src/compiler/glsl_types.cpp
index 901baa3..c549230 100644
--- a/src/compiler/glsl_types.cpp
+++ b/s
SPIR-V has a concept of a function type that's used fairly heavily. We
could special-case function types in SPIR-V -> NIR but it's easier if we
just add support to glsl_types.
---
src/compiler/glsl/ast_to_hir.cpp| 1 +
src/compiler/glsl/ir_clone.cpp | 1 +
src
It's a bit more descriptive since it is the base type that you get when you
sample from it. Also, the next commit adds a bare "sampler" type and we
need glsl_type::sampler_type available for a public static member.
---
src/compiler/glsl/ast_to_hir.cpp | 4 ++--
src/compiler/glsl/builtin_
On 12.02.2016 05:58, Miklós Máté wrote:
> On 02/09/2016 05:02 PM, Ian Romanick wrote:
>> On 02/08/2016 05:11 PM, Ian Romanick wrote:
>>> On 02/05/2016 01:11 PM, Miklós Máté wrote:
dri drawables must never be released when unbound from a context
as long as their corresponding glx objects (
On 02/12/2016 07:32 AM, Matt Turner wrote:
On Thu, Feb 11, 2016 at 9:27 PM, Tapani Pälli wrote:
On 02/12/2016 02:04 AM, Emil Velikov wrote:
On 11 February 2016 at 12:03, Tapani Pälli wrote:
From: Bernard Kilarski
Here we should have justification why this is needed. If there is a
pr
On Thu, Feb 11, 2016 at 4:03 AM, Tapani Pälli wrote:
> From: Daniel Czarnowski
>
> Signed-off-by: Matt Roper
> Cc: "11.0 11.1" ---
> src/egl/drivers/dri2/platform_x11.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/egl/drivers/dri2/platform_x11.c
> b/src/eg
On 02/12/2016 02:54 AM, Emil Velikov wrote:
On 11 February 2016 at 12:04, Tapani Pälli wrote:
From: Bernard Kilarski
Signed-off-by: Bernard Kilarski
Signed-off-by: Matt Roper
Cc: "11.0 11.1" psc, attribute, value);
@@ -166,7 +166,7 @@ glXQueryCurrentRendererStringMESA(int attribute)
{
On Thu, Feb 11, 2016 at 9:27 PM, Tapani Pälli wrote:
>
>
> On 02/12/2016 02:04 AM, Emil Velikov wrote:
>>
>> On 11 February 2016 at 12:03, Tapani Pälli wrote:
>>>
>>> From: Bernard Kilarski
>>>
>> Here we should have justification why this is needed. If there is a
>> program affected (or bugzill
On 02/12/2016 02:13 AM, Emil Velikov wrote:
On 11 February 2016 at 12:03, Tapani Pälli wrote:
From: Daniel Czarnowski
Signed-off-by: Matt Roper
Cc: "11.0 11.1" dri2) {
- return dri2_x11_swap_buffers_msc(drv, disp, draw, 0, 0, 0) != -1;
+ if (dri2_x11_swap_buffers_msc(drv, disp, d
On Thu, Feb 11, 2016 at 7:31 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
>> wrote:
>>> Would be really nice if we could also get rid of reg_offset as we're at
>>> it. reg and subreg_offset basically represent the same thing but with
>>
On 02/12/2016 02:04 AM, Emil Velikov wrote:
On 11 February 2016 at 12:03, Tapani Pälli wrote:
From: Bernard Kilarski
Here we should have justification why this is needed. If there is a
program affected (or bugzilla ticket opened) do mentioned it as well
please.
These patches are part of
On 02/12/2016 02:03 AM, Emil Velikov wrote:
On 11 February 2016 at 12:03, Tapani Pälli wrote:
From: Daniel Czarnowski
Without the check, unsuccessful xcb_dri2_get_buffers_reply(...) causes
segmentation fault in dri2_get_buffers.
Signed-off-by: Matt Roper
Cc: "11.0 11.1"
Reviewed-by: Emil
Variable no longer is read, and always set to true.
Accordingly, the later assert() serves no active current purpose. The prior
limb of the test 'qinst->cond == QPU_COND_ALWAYS' will never trigger an assert()
as is. If it did previously define a relevant test, this should be revisited
in a subsequ
Silences the following GCC warning:
mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c: In function
'qir_schedule_instructions':
mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c:578:16: warning: missing braces
around initializer [-Wmissing-braces]
struct schedule_state state = { 0 };
https://bugs.freedesktop.org/show_bug.cgi?id=94078
--- Comment #2 from Dave Airlie ---
yes I don't think this bug has been diagnosed except via handwaving yet.
Though it does appear mutter is crashing inside glClear after my 5m of
investigating.
However further investigating is blocked on some
On Wednesday, February 10, 2016 12:10:41 PM PST Francisco Jerez wrote:
> Kenneth Graunke writes:
>
> > When uploading state for the compute pipeline, we don't want to
> > look at VS/TCS/TES/GS/FS programs, as they might be stale, and
> > aren't relevant anyway. Likewise, the render pipeline shou
https://bugs.freedesktop.org/show_bug.cgi?id=94078
--- Comment #1 from Michel Dänzer ---
Note that Xwayland (and by extension gnome-shell) should work perfectly fine
without glamor/DRI3, so fixing the crash should be significantly easier than
making glamor/DRI3 work with swrast.
--
You are rece
Matt Turner writes:
> On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
> wrote:
>> Would be really nice if we could also get rid of reg_offset as we're at
>> it. reg and subreg_offset basically represent the same thing but with
>> different units, couldn't we just have a single offset field in
Kenneth Graunke writes:
> On Thursday, February 11, 2016 5:49:55 PM PST Matt Turner wrote:
>> On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
> wrote:
>> > Would be really nice if we could also get rid of reg_offset as we're at
>> > it. reg and subreg_offset basically represent the same thing
On Thursday, February 11, 2016 5:49:55 PM PST Matt Turner wrote:
> On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
wrote:
> > Would be really nice if we could also get rid of reg_offset as we're at
> > it. reg and subreg_offset basically represent the same thing but with
> > different units, co
On Thu, Feb 11, 2016 at 4:54 PM, Emil Velikov wrote:
> On 11 February 2016 at 12:04, Tapani Pälli wrote:
>> From: Bernard Kilarski
>>
>> Signed-off-by: Bernard Kilarski
>> Signed-off-by: Matt Roper
>> Cc: "11.0 11.1" > ---
>> src/glx/glxcmds.c | 2 +-
>> src/glx/query_
On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez wrote:
> Would be really nice if we could also get rid of reg_offset as we're at
> it. reg and subreg_offset basically represent the same thing but with
> different units, couldn't we just have a single offset field in bytes?
> Should it be part of
On Thu, Feb 11, 2016 at 03:22:35PM -0500, Ilia Mirkin wrote:
Reviewed-by: Nanley Chery
> This fixes
>
> dEQP-GLES31.functional.state_query.texture.texture_2d_multisample.depth_stencil_mode_integer
>
> and a few related tests.
>
> Signed-off-by: Ilia Mirkin
> ---
> src/mesa/main/texparam.c |
From: Nanley Chery
RGBA8 and BGRA8 unorm formats are compatible with the various
mem_copy functions. Their sRGB counterparts are also compatible
because they're also color-renderable (of importance when the
specified resource is a readbuffer) and they share the same
physical layout.
Signed-off-b
This fixes
dEQP-GLES31.functional.uniform_location.negative.atomic_fragment
dEQP-GLES31.functional.uniform_location.negative.atomic_vertex
Both of which have lines like
layout(location = 3, binding = 0, offset = 0) uniform atomic_uint uni0;
The ARB_explicit_uniform_location spec makes a very ta
On 11 February 2016 at 12:04, Tapani Pälli wrote:
> From: Bernard Kilarski
>
> Signed-off-by: Bernard Kilarski
> Signed-off-by: Matt Roper
> Cc: "11.0 11.1" ---
> src/glx/glxcmds.c | 2 +-
> src/glx/query_renderer.c | 4 ++--
> src/glx/tests/query_rend
---
src/mesa/drivers/dri/i965/brw_vec4_builder.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_builder.h
b/src/mesa/drivers/dri/i965/brw_vec4_builder.h
index be1427c..5d4b452 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_builder.h
+++ b
And use it in brw_fs_nir.cpp.
---
src/mesa/drivers/dri/i965/brw_fs_builder.h | 6 +++---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 ++
src/mesa/drivers/dri/i965/brw_vec4_builder.h | 8 +---
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/
Gen4/5's SEL instruction cannot use conditional modifiers, so min/max
are implemented as CMP + SEL. Handling that after optimization lets us
CSE more.
On Ironlake:
total instructions in shared programs: 6426035 -> 6422753 (-0.05%)
instructions in affected programs: 326604 -> 323322 (-1.00%)
On 11 February 2016 at 12:03, Tapani Pälli wrote:
> From: Daniel Czarnowski
>
> Signed-off-by: Matt Roper
> Cc: "11.0 11.1" ---
> src/egl/drivers/dri2/platform_x11.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/egl/drivers/dri2/platform_x11.c
> b/src/egl/d
On 11 February 2016 at 12:03, Tapani Pälli wrote:
> From: Bernard Kilarski
>
Here we should have justification why this is needed. If there is a
program affected (or bugzilla ticket opened) do mentioned it as well
please.
Thanks
Emil
___
mesa-dev maili
On 11 February 2016 at 12:03, Tapani Pälli wrote:
> From: Daniel Czarnowski
>
> Without the check, unsuccessful xcb_dri2_get_buffers_reply(...) causes
> segmentation fault in dri2_get_buffers.
>
> Signed-off-by: Matt Roper
> Cc: "11.0 11.1"
> ---
> src/egl/drivers/dri2/platform_x11.c | 2 ++
>
On Thu, Feb 11, 2016 at 08:33:53PM +0200, Topi Pohjolainen wrote:
> This series enables compression for single sampled color surfaces,
> also referred to as "lossless compression". This is yet only for
> driver internal use easing pressure on memory bandwidth and caches
> when writing, blending and
On Thu, Feb 11, 2016 at 08:34:01PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/gen8_surface_state.c | 62
> --
> 1 file changed, 29 insertions(+), 33 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_surfa
Kenneth Graunke writes:
> On Thursday, February 11, 2016 1:49:21 PM PST Matt Turner wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 31 ++
> +---
>> .../drivers/dri/i965/brw_fs_combine_constants.cpp | 13 +
>> .../drivers/dri/i965/brw_fs_copy_propag
Now that MSVC 2013 is required we can remove this.
---
src/compiler/glsl/glsl_lexer.ll | 4
1 file changed, 4 deletions(-)
diff --git a/src/compiler/glsl/glsl_lexer.ll b/src/compiler/glsl/glsl_lexer.ll
index e59f93e..9704fc7 100644
--- a/src/compiler/glsl/glsl_lexer.ll
+++ b/src/compiler/gls
On Thursday, February 11, 2016 1:49:21 PM PST Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 31 ++
+---
> .../drivers/dri/i965/brw_fs_combine_constants.cpp | 13 +
> .../drivers/dri/i965/brw_fs_copy_propagation.cpp | 14 +-
> src
Reviewed-by: Nicolai Hähnle
On 11.02.2016 11:50, Marek Olšák wrote:
From: Marek Olšák
Broken by this cleanup: 3dc1cb0cc7605a2f3128311f5a6052f740fc7b0d
---
src/gallium/drivers/radeonsi/si_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon
On 11 February 2016 at 13:02, Jose Fonseca wrote:
> ---
> Makefile.am | 1 -
> include/c99/inttypes.h| 305
> --
> include/c99/stdbool.h | 46 -
> include/c99/stdint.h |
This is effectively a revert of 8037c0b69 (i965: Always allocate
validated miptrees from level 0). Unfortunately the first level's images
may not be set, and there is no way to know what their size is. We were
retrieving the size of the base level's image, but using that to build a
miptree of that
On 02/05/2016 10:26 PM, Ilia Mirkin wrote:
On Fri, Feb 5, 2016 at 4:11 PM, Miklós Máté wrote:
v2: comment about the purpose of the code
---
src/mesa/main/teximage.c | 32
1 file changed, 32 insertions(+)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/
On Thu, Feb 11, 2016 at 08:33:58PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 26 ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4
> 2 files changed, 30 insertions(+)
>
> diff --git
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 31 +++---
.../drivers/dri/i965/brw_fs_combine_constants.cpp | 13 +
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 14 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
src/mesa/drivers/dr
On Thu, Feb 11, 2016 at 08:33:57PM +0200, Topi Pohjolainen wrote:
> Auxiliary buffers are always created with sample number of zero
> which effectively prevents intel_miptree_create_layout() from trying
> to associate auxiliary buffers with auxiliary buffers.
>
> Now that there is more direct path
On Thu, Feb 11, 2016 at 08:33:56PM +0200, Topi Pohjolainen wrote:
> In addition to simply calling miptree_create() the higher level
> call intel_miptree_create() also considers if the buffer should
> be associated with an auxiliary buffer based on the given format.
>
> Here we are allocating an au
On 12 February 2016 at 01:51, Tom Stellard wrote:
> On Thu, Feb 11, 2016 at 01:59:25PM +1000, Dave Airlie wrote:
>> Hey,
>>
>> So in Fedora rawhide we are now building llvm 3.7.1 into the lots of
>> little shared libraries format.
>>
>
> This configuration is only recommended for developers.
>
> S
On 02/09/2016 05:02 PM, Ian Romanick wrote:
On 02/08/2016 05:11 PM, Ian Romanick wrote:
On 02/05/2016 01:11 PM, Miklós Máté wrote:
dri drawables must never be released when unbound from a context
as long as their corresponding glx objects (window, pixmap, pbuffer)
still exist
I'd really like t
On 02/09/2016 05:21 AM, Ian Romanick wrote:
On 02/05/2016 01:11 PM, Miklós Máté wrote:
this was marked for removal since 2007
ctx::Visual is also removed, since this was its only legit user
---
.../drivers/dri/radeon/radeon_common_context.c | 2 +-
src/mesa/main/blend.c
Now it follows the GLX 1.4 specification.
This fixes post-processing in SW:KotOR.
---
src/mesa/main/context.c | 44 +---
1 file changed, 13 insertions(+), 31 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 8b415ed..988fb40
GL_ARB_texture_multisample and GLES 3.1 expect the initial value to be
GL_TRUE. This fixes
dEQP-GLES31.functional.state_query.texture_level.texture_2d_multisample_array.fixed_sample_locations_integer
and a few related tests.
Signed-off-by: Ilia Mirkin
---
src/mesa/main/texparam.c | 1 +
1 file
On Thu, Feb 11, 2016 at 08:33:55PM +0200, Topi Pohjolainen wrote:
> Currently the logic allocating and setting up miptrees is closely
> combined with decision making when to re-allocate buffers in
> X-tiled layout and when to associate colors with auxiliary buffers.
>
> These auxiliary buffers are
On Thursday, February 11, 2016 10:04:27 AM PST Jason Ekstrand wrote:
> We really need to stop pulling information directly out of shaders for
> state setup. For one thing, if we want any sort of an on-disk shader
> cache, having all of this metadata in one place is going to be crucial.
> Also, pas
This fixes
dEQP-GLES31.functional.state_query.texture.texture_2d_multisample.depth_stencil_mode_integer
and a few related tests.
Signed-off-by: Ilia Mirkin
---
src/mesa/main/texparam.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/src/mesa/main/texparam.c b/src/me
On Thursday, February 11, 2016 10:04:27 AM PST Jason Ekstrand wrote:
> We really need to stop pulling information directly out of shaders for
> state setup. For one thing, if we want any sort of an on-disk shader
> cache, having all of this metadata in one place is going to be crucial.
> Also, pas
On 02/11/2016 08:03 PM, Marek Olšák wrote:
BTW, all my Reviewed-by tags that I gave you for v1 and v2 now also apply to v3.
Thanks for your time and patience. :-)
Marek
On Thu, Feb 11, 2016 at 12:21 PM, Marek Olšák wrote:
Patches 3-4, 8-10, 12, 14-15:
Reviewed-by: Marek Olšák
Marek
Changes from v2:
- use as much common code as possible (eg. st_basic_variant)
Signed-off-by: Samuel Pitoiset
Reviewed-by: Marek Olšák (v1)
Reviewed-by: Ilia Mirkin (v1)
---
src/mesa/state_tracker/st_atom.c| 2 +-
src/mesa/state_tracker/st_atom.h| 1 +
src/mesa/state_tracker/
On Thu, Feb 11, 2016 at 08:50:51PM +0200, Pohjolainen, Topi wrote:
> On Wed, Feb 10, 2016 at 10:13:11PM -0800, Ian Romanick wrote:
> > From: Ian Romanick
> >
> > Also change the name of the function to
> > _mesa_meta_framebuffer_texture_image. The function is basically a
> > wrapper around _mesa
The restriction on multisampled integer texture formats only applies to
GLES 3.0, so don't apply it to GLES 3.1 contexts. This fixes a slew of
dEQP-GLES31.functional.state_query.internal_format.*
tests, which now all pass.
Signed-off-by: Ilia Mirkin
---
src/mesa/main/formatquery.c | 3 ++-
1 f
On Thu, Feb 11, 2016 at 08:33:54PM +0200, Topi Pohjolainen wrote:
> This makes the logic a little more explicit and helps to keep
> subsequent patches easier to read.
>
> Suggested-by: Ben Widawsky
> Signed-off-by: Topi Pohjolainen
Reviewed-by: Ben Widawsky
[snip]
_
BTW, all my Reviewed-by tags that I gave you for v1 and v2 now also apply to v3.
Marek
On Thu, Feb 11, 2016 at 12:21 PM, Marek Olšák wrote:
> Patches 3-4, 8-10, 12, 14-15:
>
> Reviewed-by: Marek Olšák
>
> Marek
>
> On Wed, Feb 10, 2016 at 7:10 PM, Samuel Pitoiset
> wrote:
>> Hi,
>>
>> This ser
On Thu, Feb 11, 2016 at 8:34 AM, Derek Foreman
wrote:
> Since commit d1314de293e9e4a63c35f094c3893aaaed8580b4 we ignore
> damage passed to SwapBuffersWithDamage.
>
> Wayland 1.10 now has functionality that allows us to properly
> process those damage rectangles, and a way to query if it's
> avail
On Thu, Feb 11, 2016 at 10:55 AM, Ben Widawsky
wrote:
> This allows ls, and scripts to get the file names in the correct order of
> optimization.
>
> Cc: Chris Forbes
> Cc: Matt Turner
> Signed-off-by: Ben Widawsky
> ---
Thanks! I was going to send this too :)
Reviewed-by: Matt Turner
__
This allows ls, and scripts to get the file names in the correct order of
optimization.
Cc: Chris Forbes
Cc: Matt Turner
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-
On 02/11/2016 05:02 AM, Jose Fonseca wrote:
> We no longer need to build any part of Mesa with Windows SDK 7.0.7600 or
> MSVC 2008. MSVC 2013 will be the oldest we support.
>
> In practice this means people are now free to declare variables in the
> middle of blocks, on the whole Mesa tree.
\o/
On Wed, Feb 10, 2016 at 10:13:11PM -0800, Ian Romanick wrote:
> From: Ian Romanick
>
> Also change the name of the function to
> _mesa_meta_framebuffer_texture_image. The function is basically a
> wrapper around _mesa_framebuffer_texture (which is used to implement
> glFramebufferTexture1D and f
v2: Use explicitly against base type of GL_FLOAT instead of
using _mesa_is_format_integer_color(). Otherwise we miss
GL_UNSIGNED_NORMALIZED.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 ++
src/mesa/drivers/dri/i965/intel_mipm
Currently the logic allocating and setting up miptrees is closely
combined with decision making when to re-allocate buffers in
X-tiled layout and when to associate colors with auxiliary buffers.
These auxiliary buffers are in turn also represented as miptrees
and are created by the same miptree cr
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 62 --
1 file changed, 29 insertions(+), 33 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index fc8f701..0a528
This will be re-used to initialize auxiliary buffers in lossless
compression case.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 ---
1 file changed, 22 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_m
Until now there has been only one type of color buffer that needs
to resolved - namely single sampled fast clear. As even the
sampler engine in GPU doesn't understand the associated meta data,
the color values need to be always resolved prior to reading them.
From SKL onwards there is new scheme s
I tried first creating the auxiliary buffer the same time with the
color buffer. That, however, led me into a situation where we would
later create the rest of the mip-levels and the compression would
need to be disabled (it is only supported for single level buffers).
Here we try to create it on
In addition to simply calling miptree_create() the higher level
call intel_miptree_create() also considers if the buffer should
be associated with an auxiliary buffer based on the given format.
Here we are allocating an auxiliary buffer which in turn has such
format that would mislead intel_miptre
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --gi
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index e1a37d8..d1c9b5a 100644
--- a/src/
Subsequent patch will modify the surface state to set state to
unresolved whenever the surface is used as render target. Color
resolve itself will use the same surface setup path and marking
the buffer as cleared after the draw call ensures that the state
correct after the resolve
Signed-off-by: T
This makes the logic a little more explicit and helps to keep
subsequent patches easier to read.
Suggested-by: Ben Widawsky
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 +--
1 file changed, 14 insertions(+), 15 deletions(-)
diff
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++-
1 file changed, 3
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_context.c | 12 +++-
src/mesa
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/d
Auxiliary buffers are always created with sample number of zero
which effectively prevents intel_miptree_create_layout() from trying
to associate auxiliary buffers with auxiliary buffers.
Now that there is more direct path available lets start using it
instead and stop even checking for such (im)p
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dr
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 5 +
src/mesa/drivers/
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