On Thursday, February 11, 2016 11:28:44 PM PST Francisco Jerez wrote:
> Kenneth Graunke <kenn...@whitecape.org> writes:
>
> > I think this was just missed; Curro and I were probably writing
> > code simultaneously and forgot to combine them at the end.
> >
> > Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
> > Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
> > ---
> > src/mesa/drivers/dri/i965/gen7_l3_state.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c b/src/mesa/drivers/
dri/i965/gen7_l3_state.c
> > index 0c1813f..c4babc2 100644
> > --- a/src/mesa/drivers/dri/i965/gen7_l3_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c
> > @@ -298,7 +298,12 @@ static struct brw_l3_weights
> > get_pipeline_state_l3_weights(const struct brw_context *brw)
> > {
> > const struct brw_stage_state *stage_states[] = {
> > - &brw->vs.base, &brw->gs.base, &brw->wm.base, &brw->cs.base
> > + [MESA_SHADER_VERTEX] = &brw->vs.base,
> > + [MESA_SHADER_TESS_CTRL] = &brw->tcs.base,
> > + [MESA_SHADER_TESS_EVAL] = &brw->tes.base,
> > + [MESA_SHADER_GEOMETRY] = &brw->gs.base,
> > + [MESA_SHADER_FRAGMENT] = &brw->wm.base,
> > + [MESA_SHADER_COMPUTE] = &brw->cs.base
>
> Because the ordering of the stage_states entries is fully immaterial now
> (its just a set of brw_stage_state structs with no ordering implied),
> the designated initializers are pretty much just noise, would you mind
> leaving them out? With that changed this patch is:
>
> Reviewed-by: Francisco Jerez <curroje...@riseup.net>Ah, sorry, I pushed it a few hours ago with Jordan's review... The order definitely doesn't matter, but I thought the designated initializers made it easy to see that they were all there. I'm happy to remove them if you prefer, though. Want me to send a follow-up patch to do that? --Ken
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