Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.113 -> 1.114
---
Log message:
Fix the build.
---
Diffs of the changes: (+1 -1)
ARMInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.109 -> 1.110
ARMInstrThumb.td updated: 1.28 -> 1.29
ARMInstrVFP.td updated: 1.7 -> 1.8
---
Log message:
Mark these instructions clobbersPred. They modify the condition code register.
---
Diffs of the changes: (+19 -9)
ARM
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.108 -> 1.109
---
Log message:
Opcode modifier s comes after condition code. e.g. addlts, not addslt.
---
Diffs of the changes: (+20 -20)
ARMInstrInfo.td | 40
1 files changed, 20
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.107 -> 1.108
---
Log message:
Make jumptable non-predicable for now.
---
Diffs of the changes: (+10 -11)
ARMInstrInfo.td | 21 ++---
1 files changed, 10 insertions(+), 11 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.106 -> 1.107
---
Log message:
For ldrb, strh, etc., the condition code is before the width specifier. e.g.
streqh, not strheq.
---
Diffs of the changes: (+23 -23)
ARMInstrInfo.td | 46 +++
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.105 -> 1.106
---
Log message:
Use AXI3 not AXI2 for appropriate PIC PC-relative loads and stores. Cosmetic.
---
Diffs of the changes: (+7 -5)
ARMInstrInfo.td | 12 +++-
1 files changed, 7 insertions(+), 5 delet
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.104 -> 1.105
---
Log message:
Add some patterns for PIC PC-relative loads and stores.
---
Diffs of the changes: (+41 -2)
ARMInstrInfo.td | 43 +--
1 files changed, 41 insertions(+
> Mark calls non-predicable for now. Need to ensure it's the last
> instruction in the if-converted block or make sure it preserve
> condition code.
Plz add this to the readme file, so it doesn't get forgotten,
-Chris
___
llvm-commits mailing list
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.103 -> 1.104
---
Log message:
Mark calls non-predicable for now. Need to ensure it's the last instruction in
the if-converted block or make sure it preserve condition code.
---
Diffs of the changes: (+8 -8)
ARMInstrInfo.t
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.102 -> 1.103
---
Log message:
Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand
so they are not predicable.
---
Diffs of the changes: (+6 -5)
ARMInstrInfo.td | 11 ++-
1 files change
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.101 -> 1.102
---
Log message:
Conditional branch is not a barrier.
---
Diffs of the changes: (+6 -4)
ARMInstrInfo.td | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstr
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.98 -> 1.99
---
Log message:
change per review
---
Diffs of the changes: (+3 -3)
ARMInstrInfo.td |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.97 -> 1.98
---
Log message:
Prevent Thumb code from generating ARM instructions
---
Diffs of the changes: (+3 -3)
ARMInstrInfo.td |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/AR
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.95 -> 1.96
---
Log message:
dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
---
Diffs of the changes: (+1 -1)
ARMInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.88 -> 1.89
ARMInstrThumb.td updated: 1.14 -> 1.15
---
Log message:
Constant generation instructions are re-materializable.
---
Diffs of the changes: (+11 -5)
ARMInstrInfo.td | 15 ++-
ARMInstrThumb.td |1
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.87 -> 1.88
---
Log message:
ARM callseq_end should have a input flag operand so it would be scheduled right
after the call.
---
Diffs of the changes: (+1 -1)
ARMInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 d
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.84 -> 1.85
---
Log message:
Code clean up. Use def : pat instead of defining new instructions.
---
Diffs of the changes: (+87 -127)
ARMInstrInfo.td | 214 ++--
1 files c
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.79 -> 1.80
---
Log message:
This patch defines extloadi1 and fixes an internal compiler error on
arm.
---
Diffs of the changes: (+3 -0)
ARMInstrInfo.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Targe
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.80 -> 1.81
---
Log message:
remove duplicated line
bug noticed by Lauro
---
Diffs of the changes: (+0 -1)
ARMInstrInfo.td |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.76 -> 1.77
---
Log message:
add mvn
---
Diffs of the changes: (+3 -0)
ARMInstrInfo.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.75 -> 1.76
---
Log message:
fix truncstorei1
---
Diffs of the changes: (+1 -3)
ARMInstrInfo.td |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Tar
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.72 -> 1.73
---
Log message:
remove dead/redundant vars
---
Diffs of the changes: (+0 -3)
ARMInstrInfo.td |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.71 -> 1.72
---
Log message:
implement zextload bool and truncstore bool
---
Diffs of the changes: (+10 -0)
ARMInstrInfo.td | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.69 -> 1.70
---
Log message:
implement STRB and STRH
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.68 -> 1.69
---
Log message:
use Pat to implement extloadi8 and extloadi16
---
Diffs of the changes: (+5 -8)
ARMInstrInfo.td | 13 +
1 files changed, 5 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/A
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.67 -> 1.68
---
Log message:
implement undef
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMI
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.66 -> 1.67
---
Log message:
implement extloadi8 and extloadi16
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.64 -> 1.65
---
Log message:
add isTerminatortto b and bcond
---
Diffs of the changes: (+9 -7)
ARMInstrInfo.td | 16 +---
1 files changed, 9 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstr
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.65 -> 1.66
---
Log message:
add blx
---
Diffs of the changes: (+1 -0)
ARMInstrInfo.td |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.65
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.63 -> 1.64
---
Log message:
add the FPUnaryOp and DFPUnaryOp classes
---
Diffs of the changes: (+14 -15)
ARMInstrInfo.td | 29 ++---
1 files changed, 14 insertions(+), 15 deletions(-)
Index: ll
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.62 -> 1.63
---
Log message:
add FABSS and FABSD
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.61 -> 1.62
---
Log message:
remove extra [] in stores
---
Diffs of the changes: (+2 -2)
ARMInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u ll
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.59 -> 1.60
README.txt updated: 1.7 -> 1.8
---
Log message:
add FSTD and FSTS
---
Diffs of the changes: (+12 -3)
ARMInstrInfo.td | 13 +++--
README.txt |2 +-
2 files changed, 12 insertions(+), 3 deletio
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.58 -> 1.59
ARMRegisterInfo.cpp updated: 1.20 -> 1.21
---
Log message:
add FCPYS and FCPYD
---
Diffs of the changes: (+16 -3)
ARMInstrInfo.td |5 +
ARMRegisterInfo.cpp | 14 +++---
2 files changed, 16
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.57 -> 1.58
---
Log message:
add fdivs e fdivd
---
Diffs of the changes: (+2 -1)
ARMInstrInfo.td |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Tar
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.54 -> 1.55
---
Log message:
add the FPBinOp class
---
Diffs of the changes: (+8 -9)
ARMInstrInfo.td | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
d
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.55 -> 1.56
---
Log message:
define the DFPBinOp class
---
Diffs of the changes: (+10 -15)
ARMInstrInfo.td | 25 ++---
1 files changed, 10 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/ARM/A
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.53 -> 1.54
---
Log message:
define the Addr1BinOp class
---
Diffs of the changes: (+14 -34)
ARMInstrInfo.td | 48 ++--
1 files changed, 14 insertions(+), 34 deletions(-)
Ind
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.52 -> 1.53
---
Log message:
define the IntBinOp class and use it to implement the multiply instructions
---
Diffs of the changes: (+13 -12)
ARMInstrInfo.td | 25 +
1 files changed, 13 insertions(
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.51 -> 1.52
---
Log message:
fix assembly syntax
---
Diffs of the changes: (+4 -4)
ARMInstrInfo.td |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.50 -> 1.51
README.txt updated: 1.6 -> 1.7
---
Log message:
implement LDRB, LDRSB, LDRH and LDRSH
---
Diffs of the changes: (+20 -0)
ARMInstrInfo.td | 16
README.txt |4
2 files changed, 20
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.49 -> 1.50
ARMMul.cpp updated: 1.2 -> 1.3
README.txt updated: 1.5 -> 1.6
---
Log message:
implement smull and umull
---
Diffs of the changes: (+24 -5)
ARMInstrInfo.td | 10 ++
ARMMul.cpp | 14 +---
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.47 -> 1.48
---
Log message:
add FNEGS and FNEGD
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.46 -> 1.47
---
Log message:
add SBCS and SUBS
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/AR
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.44 -> 1.45
---
Log message:
mark call adjustments as modifying the SP
---
Diffs of the changes: (+2 -2)
ARMInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrIn
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.43 -> 1.44
---
Log message:
Add properties to ComplexPattern.
---
Diffs of the changes: (+4 -3)
ARMInstrInfo.td |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.41 -> 1.42
---
Log message:
add fp sub
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrI
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.37 -> 1.38
---
Log message:
add float -> double and double -> float conversion
---
Diffs of the changes: (+5 -0)
ARMInstrInfo.td |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.36 -> 1.37
---
Log message:
add ADDS and ADCS
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/AR
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.34 -> 1.35
README.txt updated: 1.3 -> 1.4
---
Log message:
implement FLDD
---
Diffs of the changes: (+11 -5)
ARMInstrInfo.td | 14 ++
README.txt |2 +-
2 files changed, 11 insertions(+), 5 deletions
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.33 -> 1.34
---
Log message:
implement fadds, faddd, fmuls and fmuld
---
Diffs of the changes: (+18 -0)
ARMInstrInfo.td | 18 ++
1 files changed, 18 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.26 -> 1.27
---
Log message:
implement SRL and MUL
---
Diffs of the changes: (+9 -0)
ARMInstrInfo.td |9 +
1 files changed, 9 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/A
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.24 -> 1.25
---
Log message:
implement shl and sra
---
Diffs of the changes: (+12 -0)
ARMInstrInfo.td | 12
1 files changed, 12 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Tar
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.23 -> 1.24
---
Log message:
add the eor (xor) instruction
---
Diffs of the changes: (+5 -0)
ARMInstrInfo.td |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Targ
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.22 -> 1.23
---
Log message:
implement unconditional branches
fix select.ll
---
Diffs of the changes: (+4 -0)
ARMInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.21 -> 1.22
---
Log message:
add the orr instruction
---
Diffs of the changes: (+4 -0)
ARMInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.16 -> 1.17
---
Log message:
add the and instruction
---
Diffs of the changes: (+4 -0)
ARMInstrInfo.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.13 -> 1.14
---
Log message:
CALLSEQ_* produces chain even if that's not needed.
---
Diffs of the changes: (+4 -2)
ARMInstrInfo.td |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.9 -> 1.10
ARMRegisterInfo.cpp updated: 1.8 -> 1.9
---
Log message:
implemented sub
correctly update the stack pointer in the prologue and epilogue
---
Diffs of the changes: (+12 -3)
ARMInstrInfo.td |4
ARMRe
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.8 -> 1.9
ARMRegisterInfo.cpp updated: 1.7 -> 1.8
---
Log message:
initial prologue and epilogue implementation. Need to define add and sub before
finishing it :-)
---
Diffs of the changes: (+23 -1)
ARMInstrInfo.td |
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.4 -> 1.5
ARMRegisterInfo.cpp updated: 1.3 -> 1.4
ARMRegisterInfo.td updated: 1.1 -> 1.2
---
Log message:
initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
---
Diffs
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