Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.24 -> 1.25
---
Log message:
implement shl and sra
---
Diffs of the changes: (+12 -0)
ARMInstrInfo.td | 12 ++++++++++++
1 files changed, 12 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.24
llvm/lib/Target/ARM/ARMInstrInfo.td:1.25
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.24 Fri Sep 8 11:59:47 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Fri Sep 8 12:36:23 2006
@@ -113,6 +113,18 @@
"and $dst, $a, $b",
[(set IntRegs:$dst, (and IntRegs:$a, IntRegs:$b))]>;
+
+// All arm data processing instructions have a shift. Maybe we don't have
+// to implement this
+def SHL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b),
+ "mov $dst, $a, lsl $b",
+ [(set IntRegs:$dst, (shl IntRegs:$a, IntRegs:$b))]>;
+
+def SRA : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b),
+ "mov $dst, $a, asr $b",
+ [(set IntRegs:$dst, (sra IntRegs:$a, IntRegs:$b))]>;
+
+
def eor_rr : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b),
"eor $dst, $a, $b",
[(set IntRegs:$dst, (xor IntRegs:$a, IntRegs:$b))]>;
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