Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.50 -> 1.51
README.txt updated: 1.6 -> 1.7
---
Log message:
implement LDRB, LDRSB, LDRH and LDRSH
---
Diffs of the changes: (+20 -0)
ARMInstrInfo.td | 16 ++++++++++++++++
README.txt | 4 ++++
2 files changed, 20 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.50
llvm/lib/Target/ARM/ARMInstrInfo.td:1.51
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.50 Mon Oct 16 11:33:29 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Oct 16 12:17:21 2006
@@ -113,6 +113,22 @@
"ldr $dst, $addr",
[(set IntRegs:$dst, (load iaddr:$addr))]>;
+def LDRB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+ "ldrb $dst, $addr",
+ [(set IntRegs:$dst, (zextloadi8 IntRegs:$addr))]>;
+
+def LDRSB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+ "ldrsb $dst, $addr",
+ [(set IntRegs:$dst, (sextloadi8 IntRegs:$addr))]>;
+
+def LDRH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+ "ldrh $dst, $addr",
+ [(set IntRegs:$dst, (zextloadi16 IntRegs:$addr))]>;
+
+def LDRSH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+ "ldrsh $dst, $addr",
+ [(set IntRegs:$dst, (sextloadi16 IntRegs:$addr))]>;
+
def str : InstARM<(ops IntRegs:$src, memri:$addr),
"str $src, $addr",
[(store IntRegs:$src, iaddr:$addr)]>;
Index: llvm/lib/Target/ARM/README.txt
diff -u llvm/lib/Target/ARM/README.txt:1.6 llvm/lib/Target/ARM/README.txt:1.7
--- llvm/lib/Target/ARM/README.txt:1.6 Mon Oct 16 11:33:29 2006
+++ llvm/lib/Target/ARM/README.txt Mon Oct 16 12:17:21 2006
@@ -51,3 +51,7 @@
should try to declare smull and umull as returning two values.
----------------------------------------------------------
+
+Implement addressing modes 2 (ldrb) and 3 (ldrsb)
+
+----------------------------------------------------------
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