On Dec 1, 2011, at 8:21 PM, Jia Hongtao-B38951 wrote:
> Hi
>
> I just found that the 'next' branch you mentioned have problem to boot up.
> I test it in p1022ds and p1010rdb boards and the result are both the same.
> Note that for p1022ds I use "make p1022ds.dtb" to make the dtb file(36bit)
> w
On Dec 1, 2011, at 9:55 PM, Tabi Timur-B04825 wrote:
> Jia Hongtao-B38951 wrote:
>> Hi
>>
>> I just found that the 'next' branch you mentioned have problem to boot up.
>> I test it in p1022ds and p1010rdb boards and the result are both the same.
>> Note that for p1022ds I use "make p1022ds.dtb"
On Dec 2, 2011, at 1:05 AM, Andy Fleming wrote:
> The MDIO driver has been changed so that it no longer supports
> scanning the MDIO bus for a free address for the TBI PHY. This
> feature was fragile, and required scanning the bus before the bus
> was fully up and registered. The intended way for
On Dec 2, 2011, at 4:08 PM, Timur Tabi wrote:
> Add a 32-bit version of the device tree for the Freescale P1022DS reference
> board.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/p1022ds_32b.dts | 270 +
> 1 files changed, 270 insertions(+), 0 delet
s_translate() does not.
>
> Afterwards it is possible to remove the copiously copy-pasted calls to
> of_address_translate() from the 85xx/86xx/powermac platforms.
>
> Signed-off-by: Kyle Moffett
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Grant Likely
> Cc
On Dec 2, 2011, at 10:28 AM, Kyle Moffett wrote:
> Almost all PowerPC platforms use a standard "open-pic" device node so
> the mpic_alloc() function now accepts NULL for the device-node. This
> will cause it to perform a default search with of_find_matching_node().
>
> Signed-off-by: Kyle Moffe
On Dec 5, 2011, at 12:41 PM, Moffett, Kyle D wrote:
> On Dec 03, 2011, at 10:53, Kumar Gala wrote:
>> On Dec 2, 2011, at 10:27 AM, Kyle Moffett wrote:
>>> Instead of using the open-coded "reg" property lookup and address
>>> translation in mpic_alloc(),
om: Tabi Timur-B04825
> Sent: Friday, December 02, 2011 11:56 AM
> To: Jia Hongtao-B38951
> Cc: Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Fleming
> Andy-AFLEMING
> Subject: Re: [linuxppc-release] [powerpc] boot up problem
>
> Jia Hongtao-B38951 wrote:
>> H
sions of alloc_coherent & free_coherent on 64-bit systems.
Signed-off-by: Kumar Gala
---
arch/powerpc/kernel/dma-swiotlb.c |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/dma-swiotlb.c
b/arch/powerpc/kernel/dma-swiotlb.c
index 1ebc918..5000fd4
On Dec 7, 2011, at 2:02 PM, David Miller wrote:
> From: Andy Fleming
> Date: Wed, 7 Dec 2011 13:50:57 -0600
>
>> Systems which use the fsl_pq_mdio driver need to specify an
>> address for TBI PHY transactions such that the address does
>> not conflict with any PHYs on the bus (all transactions
On Dec 7, 2011, at 11:02 PM, Anton Blanchard wrote:
> Index: linux-build/arch/powerpc/include/asm/cputable.h
> ===
> --- linux-build.orig/arch/powerpc/include/asm/cputable.h 2011-09-07
> 15:15:49.096458526 +1000
> +++ linux-bui
On Dec 7, 2011, at 9:23 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2011-12-07 at 11:19 -0600, Kumar Gala wrote:
>
>> struct dma_map_ops swiotlb_dma_ops = {
>> +#ifdef CONFIG_PPC64
>> +.alloc_coherent = swiotlb_alloc_coherent,
>> +.free_coherent = sw
The Freescale serial port's are pretty much a 16550, however there are
some FSL specific bugs and features. Add a "fsl,ns16550" compatiable
string to allow code to handle those FSL specific issues.
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/asp834x-redboot.dts|
corenet64_smp_defconfig:
- enabled rapidio
corenet32_smp_defconfig:
- enabled hugetlbfs, rapidio
mpc85xx_smp_defconfig:
- enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM
mpc85xx_smp_defconfig:
- enabled hugetlbfs, SPI, SDHC, Crypto/CAAM
Signed-off-by: Kumar Gala
---
arch/powerpc
On Dec 7, 2011, at 1:50 PM, Andy Fleming wrote:
> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The driver
On Dec 1, 2011, at 12:03 AM, Kumar Gala wrote:
> There is an issue on FSL-BookE 64-bit devices (P5020) in which PCIe
> devices that are capable of doing 64-bit DMAs (like an Intel e1000) do
> not function and crash the kernel if we have >4G of memory in the system.
>
> The
On Dec 5, 2011, at 10:41 AM, Paul Gortmaker wrote:
> The commit 883c2cfc8bcc0fd00c5d9f596fb8870f481b5bda:
>
> "fix of_flat_dt_is_compatible() to match the full compatible string"
>
> causes silent boot death on the sbc8349 board because it was
> just looking for 8349 and not 8349E -- as origina
On Dec 8, 2011, at 1:11 AM, Kumar Gala wrote:
> corenet64_smp_defconfig:
> - enabled rapidio
>
> corenet32_smp_defconfig:
> - enabled hugetlbfs, rapidio
>
> mpc85xx_smp_defconfig:
> - enabled P1010RDB, hugetlbfs, SPI, SDHC, Crypto/CAAM
>
> mpc85xx_smp_defconf
alak/powerpc.git merge
Andy Fleming (1):
powerpc: Add TBI PHY node to first MDIO bus
Kumar Gala (2):
powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
powerpc/fsl: Update defconfigs to enable some standard FSL HW features
Paul Gortmaker (1):
sbc834x:
On Dec 7, 2011, at 9:13 AM, Timur Tabi wrote:
> On Dec 7, 2011, at 1:27 AM, Jia Hongtao-B38951 wrote:
>
>> Is this the patch you mentioned?
>> http://patchwork.ozlabs.org/patch/128806/
>>
>> I applied this patch but the issue was still there.
>
> This is not the patch I am talking about. Unf
):
powerpc: Add TBI PHY node to first MDIO bus
Julia Lawall (1):
arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
Kumar Gala (3):
powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
powerpc/fsl: Update defconfigs to enable some standard FSL HW
On Dec 22, 2011, at 10:25 AM, Kyle Moffett wrote:
> The MPIC code checks for a "big-endian" property and sets the flag
> MPIC_BIG_ENDIAN if one is present. Unfortunately, the PowerQUICC-III
> compatible device-tree does not specify it, so all of the board ports
> need to manually set that flag w
The following changes since commit a0e86bd4252519321b0d102dc4ed90557aa7bee9:
audit: always follow va_copy() with va_end() (2012-01-08 14:15:21 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
Michael Neuling (1):
power
on a older snapshot of linus's
tree that doesn't have this fix.
commit 13020be8be2d5843c3810169cdbcc51f07ff020f
Author: Kumar Gala
Date: Thu Nov 24 09:40:07 2011 +
powerpc: Fix compiliation with hugetlbfs enabled
- k
___
Linuxppc-dev ma
On Jan 13, 2012, at 12:21 AM, Benjamin Herrenschmidt wrote:
> Hi Linus !
>
> Please pull this couple of important bug fixes (a commit
> that went in breaks booting on some machines, this fixes
> it properly).
>
> Thanks !
>
> Cheers,
> Ben.
>
> The following changes since commit 7b3480f8b7011
On Jan 9, 2012, at 7:10 PM, Scott Wood wrote:
> On 01/09/2012 06:24 AM, Prabhakar Kushwaha wrote:
>> 1) OOB area should be updated irrespective of NAND page size. Earlier it was
>> updated only for 512byte NAND page.
>>
>> 2) During OOB update fbcr should be equal to OOB size.
>>
>> Signed-off-
Ben,
Pulled in a few other minor fixes, in addition the the compile issue on
p1022.
- k
The following changes since commit c2bc3a316a7281f67e36b34dac2802cbe36a9128:
Merge branch 'x86/rdrand' of
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (2012-01-16 18:23:09
-0800)
are available
On Jan 4, 2012, at 7:40 PM, wrote:
> From: Jerry Huang
>
> Accordint to latest kernel, the auto-cmd12 property should be
> "sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
> the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
> "fsl,mpc8536-esdh
On Jan 12, 2012, at 4:04 AM, Zhicheng Fan wrote:
> nand: Sync base address with U-boot
> sdhc: Add suppot auto cmd12
>
> Signed-off-by: Zhicheng Fan
> ---
> arch/powerpc/boot/dts/fsl/p1020si-post.dtsi |3 +++
> arch/powerpc/boot/dts/p1020rdb.dts |2 +-
> arch/powerpc/boot/dts/p10
On Jan 12, 2012, at 3:55 AM, Julia Lawall wrote:
> From: Julia Lawall
>
> Add missing iounmap in error handling code, in a case where the function
> already preforms iounmap on some other execution path.
>
> A simplified version of the semantic match that finds this problem is as
> follows: (h
On Jan 17, 2012, at 11:50 PM, Ramneek Mehresh wrote:
> Enable USB2 controller node for P1020RDB. USB2 controller is used only
> when board boots from SPI or SD as it is muxed with eLBC
>
> Signed-off-by: Ramneek Mehresh
> ---
> Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powe
On Jan 18, 2012, at 12:48 AM, Ramneek Mehresh wrote:
> Add usb2 controller node for P1020RDB, P2020RDB, P2020DS, P1021MDS
>
> Signed-off-by: Ramneek Mehresh
> ---
> Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> (branch next)
>
> arch/powerpc/boot/dts/p1020rdb.dts
Ben,
Dropped the P1020RDB device tree patch as it was for the wrong board
revision and pulled in some additional usb device tree fixes.
- k
The following changes since commit c2bc3a316a7281f67e36b34dac2802cbe36a9128:
Merge branch 'x86/rdrand' of
git://git.kernel.org/pub/scm/linux/kernel/git
The registers that describe size supported by TLB are different on MMU
v2 as well as we support power of two page sizes. For now we continue
to assume that FSL variable size array supports all page sizes up to the
maximum one reported in TLB1PS.
Signed-off-by: Kumar Gala
---
arch/powerpc
Add basic support for e6500 core in its single threaded mode.
Signed-off-by: Kumar Gala
---
arch/powerpc/include/asm/cputable.h | 12
arch/powerpc/kernel/cputable.c | 18 ++
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc
On Jan 21, 2012, at 9:50 AM, Paul Gortmaker wrote:
> On Sat, Jan 21, 2012 at 9:52 AM, Paul Gortmaker
> wrote:
>> Using the configs/mpc85xx_smp_defconfig shows this build error:
>>
>> arch/powerpc/platforms/85xx/p1022_ds.c:341: error: 'udbg_progress'
>> undeclared here (not in a function)
>>
>
On Jan 19, 2012, at 7:23 PM, Paul Gortmaker wrote:
> The SERIAL_8250_EXTENDED option just enables access to other
> less regularly used options, like SERIAL_8250_SHARE_IRQ.
> Select it to get rid of this warning when selecting the child
> option living underneath it.
>
> warning: (FSL_SOC_BOOKE
On Jan 31, 2012, at 3:51 AM, Zhicheng Fan wrote:
> From: Zhicheng Fan
>
> P1025RDB Overview
> --
> 1Gbyte DDR3 SDRAM
> 32 Mbyte NAND flash
> 16Mbyte NOR flash
> 16 Mbyte SPI flash
> SD connector to interface with the SD memory card
> Real-time clock on I2C bus
>
> PCIe:
> - x1
On Jan 31, 2012, at 1:10 PM, Scott Wood wrote:
> On 01/31/2012 09:55 AM, Kumar Gala wrote:
>>
>> On Jan 31, 2012, at 3:51 AM, Zhicheng Fan wrote:
>>> Signed-off-by: Zhicheng Fan
>>> ---
>>> arch/powerpc/boot/dts/fsl/p1025si-post.dtsi | 228 +
On Mon, 6 Feb 2012, Timur Tabi wrote:
> Add a defintion of register PAMUBYPENR (offset 0x604) to the global
> utilities structure.
>
> PAMUBYPENR is the PAMU bypass enable register. It contains control
> bits for enabling bypass mode on each PAMU.
>
> Signed-off-by: Timur Tabi
> ---
> arch/po
On Jul 5, 2012, at 5:07 PM, Timur Tabi wrote:
> This reverts commit 96cc017c5b7ec095ef047d3c1952b6b6bbf98943.
>
> The P3060 was cancelled before it went into production, so there's no point
> in supporting it.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/fsl/p3060si-post.dtsi |
On Jul 5, 2012, at 11:02 PM, Sethi Varun-B16395 wrote:
>
>
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Tuesday, June 19, 2012 12:53 AM
>> To: Sethi Varun-B16395
>> Cc: Wood Scott-B07421; Kumar Gala; Linuxppc-dev@lists.ozlabs.org
>
On Mar 21, 2012, at 11:54 PM, Prabhakar Kushwaha wrote:
> BSC9131RDB is a Freescale reference design board for BSC9131 SoC.The BSC9131
> is integrated SoC that targets Femto base station market. It combines Power
> Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F
> bas
On Jul 5, 2012, at 5:07 PM, Timur Tabi wrote:
> This reverts commit 96cc017c5b7ec095ef047d3c1952b6b6bbf98943.
>
> The P3060 was cancelled before it went into production, so there's no point
> in supporting it.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/fsl/p3060si-post.dtsi |
On Jul 5, 2012, at 10:08 AM, Timur Tabi wrote:
> In order to enable the DIU video controller on the P1022DS, the FPGA needs
> to be switched to "indirect mode", where the localbus is disabled and
> the FPGA is accessed via writes to localbus chip select signals CS0 and CS1.
>
> To obtain the add
On Jul 9, 2012, at 3:45 AM, Varun Sethi wrote:
> Previously, these interrupts would be mapped, but the offset
> calculation was broken, and only the first group was initialized.
>
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/include/asm/mpic.h |5 +++
> arch/powerpc/sysdev/mpic.c |
On Jul 9, 2012, at 3:46 AM, Varun Sethi wrote:
> We should use the MPIC_LARG_VECTORS flag while intializing the MPIC.
> This prevents us from eating in to hardware vector number space (MSIs)
> while setting up internal sources.
>
> Signed-off-by: Varun Sethi
> ---
> arch/powerpc/sysdev/mpic.c
On Jul 9, 2012, at 11:43 AM, Scott Wood wrote:
> On 07/09/2012 09:12 AM, Kumar Gala wrote:
>>
>> On Jul 9, 2012, at 3:45 AM, Varun Sethi wrote:
>>
>>> Previously, these interrupts would be mapped, but the offset
>>> calculation was broken, a
On Jul 9, 2012, at 3:47 AM, Varun Sethi wrote:
> All SOC device error interrupts are muxed and delivered to the core as a
> single
> MPIC error interrupt. Currently all the device drivers requiring access to
> device
> errors have to register for the MPIC error interrupt as a shared interrupt.
On Jul 9, 2012, at 3:22 PM, Scott Wood wrote:
> On 07/09/2012 02:03 PM, Kumar Gala wrote:
>>
>> On Jul 9, 2012, at 3:47 AM, Varun Sethi wrote:
>>
>>> +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
>>> +{
>>
>> Why can
On May 8, 2012, at 10:46 PM, Bhushan Bharat-R65777 wrote:
>> .org] On Behalf Of Shaohui Xie
>> Sent: Tuesday, May 08, 2012 11:37 AM
>> To: linux-watch...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
>> Cc: Xie Shaohui-B21989
>> Subject: [PATCH 1/2] powerpc/watchdog: move boo
On Jul 10, 2012, at 5:22 AM, Xie Shaohui-B21989 wrote:
> Hi, All,
>
> Is there any concern for this patch, it's been a long time.
> Thanks!
>
>
> Best Regards,
> Shaohui Xie
As commented, we should use PPC_FSL_BOOK3E, not CONFIG_PPC_FSL_BOOK3E.
- k
>
>
>> -Original Message-
>> F
On Jul 10, 2012, at 6:40 AM, Kumar Gala wrote:
>
> On Jul 10, 2012, at 5:22 AM, Xie Shaohui-B21989 wrote:
>
>> Hi, All,
>>
>> Is there any concern for this patch, it's been a long time.
>> Thanks!
>>
>>
>> Best Regards,
>> Sha
Shaohui Xie
> Signed-off-by: Minghuan Lian
> Signed-off-by: Kumar Gala
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/configs/corenet32_smp_defconfig | 22 +-
> 1 files changed, 21 insertions(+), 1 deletions(-)
Is this patch really against upstream? W
* Enable ePAPR HV support
> * Enable PCI-E support
>
> Signed-off-by: Haiying Wang
> Signed-off-by: Laurentiu Tudor
> Signed-off-by: Harninder Rai
> Signed-off-by: Minghuan Lian
> Signed-off-by: Kumar Gala
> Signed-off-by: Shengzhou Liu
> ---
&
On Jul 10, 2012, at 4:39 AM, Sethi Varun-B16395 wrote:
>
>
>> -Original Message-----
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Tuesday, July 10, 2012 7:17 AM
>> To: Wood Scott-B07421
>> Cc: Sethi Varun-B16395; Ham
On Jul 10, 2012, at 3:39 AM, Xu Jiucheng wrote:
> P1021RDB-PC Overview
> -
> 1Gbyte DDR3 (on board DDR)
> 16Mbyte NOR flash
> 32Mbyte eSLC NAND Flash
> 256 Kbit M24256 I2C EEPROM
> 128 Mbit SPI Flash memory
> Real-time clock on I2C bus
> SD/MMC connector to interface with the SD m
We need to use CONFIG_FSL_SOC_BOOKE instead of CONFIG_PPC_85xx as
CONFIG_PPC_85xx isn't defined when we build support for 64-bit embedded
FSL PPC SoCs.
Signed-off-by: Kumar Gala
---
drivers/usb/host/ehci-fsl.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/driver
On Feb 29, 2012, at 7:20 PM, Olivia Yin wrote:
> From: Liu Yu
>
> So that we can call it when improving SPE switch like book3e did for fp
> switch.
>
> Signed-off-by: Liu Yu
> Signed-off-by: Olivia Yin
> ---
> v2: add Signed-off-by
>
> arch/powerpc/kernel/head_fsl_booke.S | 23 ++--
On Jul 9, 2012, at 3:46 AM, Varun Sethi wrote:
> We should use the MPIC_LARG_VECTORS flag while intializing the MPIC.
> This prevents us from eating in to hardware vector number space (MSIs)
> while setting up internal sources.
>
> Signed-off-by: Varun Sethi
> ---
> arch/powerpc/sysdev/mpic.c
On May 11, 2012, at 12:33 AM, Shaohui Xie wrote:
> CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
> defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
> driver work in 32-bit & 64-bit.
>
> Signed-off-by: Shaohui Xie
> ---
> changes for v2:
> use PPC_FS
On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:
> The issue log on core1 is:
> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
> net eth0: could not attach to PHY
> SIOCSIFFLAGS: No such device
>
> To attach PHY node mdio@24520 should not be disabled in dts of core1.
> Because all PHYs are contro
On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:
> With 2-cell format interrupts of MSI PCIe ethernet card can not work.
>
> Signed-off-by: Li Yang
> Signed-off-by: Jia Hongtao
> ---
> arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts |8
> arch/powerpc/boot/dts/mpc8572ds_camp_core1.dt
On Nov 11, 2011, at 10:05 AM, Kokoris, Ioannis wrote:
> Hi,
>
> QE Microcode Initialization using qe_upload_microcode() does not work on
> P1021 if the IRAM-Ready register is not set after the microcode upload. This
> patch adds a definition for the "I-RAM Ready" register and sets it uppon
>
On Jul 10, 2012, at 2:52 AM, Zhicheng wrote:
> From: Zhicheng Fan
>
> Signed-off-by: Zhicheng Fan
> ---
> arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 16 ++-
> arch/powerpc/boot/dts/p1025rdb.dtsi | 40 +++
> 2 files changed, 55 insertions(+), 1 delet
On Mar 30, 2012, at 12:38 AM, Shawn Guo wrote:
> Freescale PowerPC SoCs share a number of IP blocks with Freescale
> ARM/IMX SoCs, FlexCAN, SSI, FEC, eSDHC, USB, etc. There are some
> effort consolidating those drivers to make them work for both
> architectures.
>
> One outstanding difference b
On Jul 10, 2012, at 10:31 AM, Scott Wood wrote:
> On 07/10/2012 01:13 AM, Liu Shengzhou-B36685 wrote:
>>
>>
>>> -Original Message-
>>> From: Wood Scott-B07421
>>> Sent: Tuesday, July 10, 2012 12:39 AM
>>> To: Liu Shengzhou-B36685
>>> Cc: bhelg...@google.com; linux-...@vger.kernel.org; l
On Jun 27, 2012, at 6:50 PM, Scott Wood wrote:
> Similar to how the primary PCI bridge is identified by looking
> for an isa subnode, we determine whether to apply uli exclusions
> by looking for a uli subnode.
>
> Signed-off-by: Scott Wood
> ---
> Besides being an example of a real-hardware bo
On Jul 11, 2012, at 4:58 AM, Jiucheng Xu wrote:
>
>
> On Tue, 2012-07-10 at 06:48 -0500, Kumar Gala wrote:
>> On Jul 10, 2012, at 3:39 AM, Xu Jiucheng wrote:
>>> ---
>>> arch/powerpc/boot/dts/p1021rdb-pc.dtsi| 236
>>> ++
On Jul 10, 2012, at 3:39 AM, Xu Jiucheng wrote:
> P1021RDB-PC Overview
> -
> 1Gbyte DDR3 (on board DDR)
> 16Mbyte NOR flash
> 32Mbyte eSLC NAND Flash
> 256 Kbit M24256 I2C EEPROM
> 128 Mbit SPI Flash memory
> Real-time clock on I2C bus
> SD/MMC connector to interface with the SD m
On Jul 11, 2012, at 5:40 AM, Shengzhou Liu wrote:
> - Enable NAND support
> - Enable CONFIG_PCI_MSI and CONFIG_MMC_SDHCI_OF
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/configs/corenet32_smp_defconfig |8
> 1 files changed, 8 insertions(+), 0 deletions(-)
applied to next
On Jul 11, 2012, at 5:40 AM, Shengzhou Liu wrote:
> Enable USB, MMC, SATA, LBC, MTD, NAND, SPI, PCIe, EDAC, VFAT, NFS, etc.
>
> Signed-off-by: Shengzhou Liu
> ---
> arch/powerpc/configs/corenet64_smp_defconfig | 59 -
> 1 files changed, 56 insertions(+), 3 deletions(-)
On Jul 11, 2012, at 4:56 AM, Shaohui Xie wrote:
> Currently, BOOKE watchdog code for checking "wdt" and "wdt_period" is
> in setup_32.c, it cannot be used in 64-bit, so move it to a common place
> setup-common.c, which will be shared by 32-bit and 64-bit.
>
> Also, replace the simple_strtoul wit
On Jul 10, 2012, at 7:26 PM, Scott Wood wrote:
> Similar to how the primary PCI bridge is identified by looking
> for an isa subnode, we determine whether to apply uli exclusions
> by looking for a uli subnode.
>
> Signed-off-by: Scott Wood
> ---
> v2: Rebased on Kumar's next
>
> arch/powerpc/
On Jul 10, 2012, at 7:26 PM, Scott Wood wrote:
> This gives the kernel a paravirtualized machine to target, without
> requiring both sides to pretend to be targeting a specific board
> that likely has little to do with the host in KVM scenarios. This
> avoids the need to add new boards to QEMU j
On Jul 10, 2012, at 7:26 PM, Scott Wood wrote:
> As an alternative incremental starting point to Jia Hongtao's patchset,
> get the FSL PCI init out of the board files, but do not yet convert to a
> platform driver.
>
> Rather than having each board supply a magic register offset for
> determinin
On Jul 11, 2012, at 9:24 AM, Joakim Tjernlund wrote:
> Joakim Tjernlund/Transmode wrote on 2012/06/04 11:06:41:
>>
>> Benjamin Herrenschmidt wrote on 2012/06/02
>> 23:21:16:
>>>
>>> On Sat, 2012-06-02 at 20:29 +0200, Joakim Tjernlund wrote:
hmm, where does this go w.r.t the patch?
On Jul 10, 2012, at 7:25 AM, Tabi Timur-B04825 wrote:
> On Tue, Jul 10, 2012 at 3:39 AM, Xu Jiucheng
> wrote:
>> Create the dts files for each core and splits the devices between
>> the two cores for P1021RDB-PC.
>>
>> Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
>> sdhc, c
On Jul 11, 2012, at 9:49 AM, Timur Tabi wrote:
> Kumar Gala wrote:
>> Since we already have P1021RDB-PC w/AMP support in upstream I agree we don't
>> need another example on P1021RDB-PC.
>
> Would you accept a patch that removes all AMP device trees from upstream?
On Jul 11, 2012, at 9:56 AM, Timur Tabi wrote:
> Kumar Gala wrote:
>> No, I think we should have at least one or two examples of AMP dts in
>> upstream.
>
> We have more than that:
>
> ./p2020rdb_camp_core1.dts
> ./p1020rdb-pc_camp_core1.dt
On Jul 11, 2012, at 10:53 PM, Tabi Timur-B04825 wrote:
> Kumar Gala wrote:
>>>>
>>>> ./p2020rdb_camp_core1.dts
>>>> ./p1020rdb-pc_camp_core1.dts
>>>> ./mpc8572ds_camp_core1.dts
>>>> ./p2020rdb_camp_core0.dts
&g
On Jul 12, 2012, at 5:02 AM, Shengzhou Liu wrote:
> On some platforms, in RC mode, root port has neither MSI/MSI-X nor INTx
> interrupt generated, which are available only in EP mode on those platform.
> In this case, we try to use other interrupt for port service driver to have
> AER, Hot-plug,
On Jul 12, 2012, at 5:28 AM, Jia Hongtao-B38951 wrote:
> Note that this patch works with uboot update.
> Please refer to:
> http://patchwork.ozlabs.org/patch/170627/
>
> -Hongtao.
Will RGMII still work with this patch if I dont update u-boot?
I'm assuming yes.
- k
>
>> -Original Message
On Jul 12, 2012, at 4:36 AM, Jia Hongtao wrote:
> In SGMII riser card different PHY chip are used with different external
> IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we
> should add another group of PHY nodes for SGMII mode.
>
> For MPC8572DS IRQ6 is used for PHY0~PHY1,
The following changes since commit db9112173b185995b80f56e136bd2ae44e4e6366:
powerpc: Turn on BPF_JIT in ppc64_defconfig (2012-07-10 19:19:02 +1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next
Christian Herzig (1):
powerp
On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
> of timer can not reset by software after set to a non-zero value.
> Which means software can not reset the timeout behaviour of watchdog timer.
>
> This patch selects WATCHDOG_NOWA
ad(),
> + * which makes the delay in generic_cpu_die() not happen.
> + */
> +void generic_set_cpu_up(unsigned int cpu)
> +{
> + per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
> +}
> +
> int generic_check_cpu_restart(unsigned int cpu)
> {
> return per_cpu(cpu_state
On Jun 26, 2012, at 5:25 AM, Zhao Chenhui wrote:
> From: Li Yang
>
> In sleep PM mode, the clocks of e500 core and unused IP blocks is
> turned off. IP blocks which are allowed to wake up the processor
> are still running.
>
> Some Freescale chips like MPC8536 and P1022 has deep sleep PM mode
On Jul 13, 2012, at 7:25 AM, Josh Boyer wrote:
> On Fri, Jul 13, 2012 at 7:50 AM, Kumar Gala wrote:
>>
>> On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
>>
>>> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
>>> of timer can not reset by
Is the functionality of all of these SDK patches upstream now?
[ ignore commit id's ]
b257909 powerpc/85xx: p1022ds: disable the NAND flash node if video is enabled
ee260f4 powerpc/mpc85xx: p1022ds support the MTD for NOR and NAND flash
4be8bb6 powerpc/mpc85xx: 32bit address support for p1022ds
2
On Jul 13, 2012, at 8:01 AM, Kumar Gala wrote:
> Is the functionality of all of these SDK patches upstream now?
>
> [ ignore commit id's ]
>
> b257909 powerpc/85xx: p1022ds: disable the NAND flash node if video is enabled
> ee260f4 powerpc/mpc85xx: p1022ds support t
On Jul 12, 2012, at 9:27 PM,
wrote:
> From: Tang Yuantian
>
> The following platforms are supported:
> mpc8544, mpc8572, mpc8536, p1021, p1025, p1024, p1010.
>
> Signed-off-by: Tang Yuantian
> ---
> arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 10 ++
> 1 files changed, 10 insertions(+)
On Jul 12, 2012, at 9:27 PM,
wrote:
> From: Tang Yuantian
>
> Signed-off-by: Tang Yuantian
> ---
> arch/powerpc/boot/dts/p2020rdb-pc_32b.dts |4 ++--
> arch/powerpc/boot/dts/p2020rdb-pc_36b.dts |4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
applied to next
- k
_
On Jul 16, 2012, at 2:06 PM, Stuart Yoder wrote:
> From: Stuart Yoder
>
> without setting the stack limit like this there is the possibility
> of stack overflow which corrupts the thread info but
> is not detected by stack overflow detection
>
> Signed-off-by: Stuart Yoder
> ---
> arch/powerp
On Jul 17, 2012, at 2:18 AM, Shaohui Xie wrote:
> Default CCB on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB,
> so we need to slow down the clock rate of espi to 35MHz to make it work stable
> with the CCB.
>
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/boot/dts/p3041ds.dt
On Jul 13, 2012, at 5:40 PM, Timur Tabi wrote:
> We only need two examples of CAMP device trees in the upstream kernel.
>
> Co-operative Asymmetric Multi-Processing (CAMP) is a technique where two
> or more operating systems (typically multiple copies of the same Linux kernel)
> are loaded into
On Jul 13, 2012, at 2:28 PM, Timur Tabi wrote:
> The Freescale P1022 has a unique pin muxing "feature" where the DIU video
> controller's video signals are muxed with 24 of the local bus address signals.
> When the DIU is enabled, the bulk of the local bus is disabled, preventing
> access to memo
On Jul 19, 2012, at 5:28 AM, Claudiu Manoil wrote:
> The sram_offset parameter represents a physical address
> and should be of type phys_addr_t. As part of this fix,
> the extraction of sram_params is being cleaned-up and
> fixed.
> This patch fixes now the case when the offset value of
> 0xfff0
On Jul 20, 2012, at 2:17 AM, Joakim Tjernlund wrote:
>
> Hi Guys
>
> I see that you have been hacking Freescale PCI before so I send this to
> you(and the list)
>
> We are using PCIe(as RC) on P2010(basically a mpc85xx) and have PCI device
> that
> started from user space (needs advance cloc
On Jul 25, 2012, at 1:17 PM, Timur Tabi wrote:
> Add support for the Freescale P5040DS Reference Board ("Superhydra"), which
> is similar to the P5020DS. Features of the P5040 are listed below, but
> not all of these features (e.g. DPAA networking) are currently supported.
>
> Four P5040 single
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