Ville,
On Mon, 10 Sep 2018, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> This reverts commit 608008a45798fe9e2aee04f99b5270ea57c1376f.
>
> It breaks wifi on my pentium 3 Fujitsu-Siemens Lifebook S6010
> laptop. Scanning for APs doesn't seem to work most of the time,
> and, even when it manag
On Mon, Sep 10, 2018 at 12:33:22PM +0100, Mark Rutland wrote:
> On Fri, Sep 07, 2018 at 06:48:10PM +0300, Andrey Ryabinin wrote:
> > On 09/07/2018 05:56 PM, Will Deacon wrote:
> > > I don't understand this bit: efistub uses the __pi_ prefixed
> > > versions of the routines, so why do we need to dec
On Mon, 10 Sep 2018, Pavel Machek wrote:
>
> Next -0910 seems to boot ok... but when I hit the power button to
> suspend the machine... Full dmesg is in the attachment.
Is this a next only issue or is this happening on Linus tree as well?
Thanks,
tglx
This patch attempts to enable RCU-walk for fscrypt.
It looks harmless at glance and could have better
performance than do ref-walk only.
Signed-off-by: Gao Xiang
---
fs/crypto/crypto.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/fs/crypto/crypto.c
* Nadav Amit wrote:
> Ping.
Masahiro Yamada noted that some Reviewed-by tags were not added - could you
please double check
past mails and add them and re-send against the latest kernel?
Thanks,
Ingo
It seems there is no need to take d_lock when
accessing dentry->d_flags & DCACHE_ENCRYPTED_WITH_KEY
in fscrypt_d_revalidate. It only needs to be
serialized for updating.
Signed-off-by: Gao Xiang
---
Hi,
At glance, I have no idea why fscrypt_d_revalidate disables
RCU-lookup. Therefore I made patc
On Mon, Sep 10, 2018 at 01:53:03PM +0100, Mark Rutland wrote:
> On Mon, Sep 10, 2018 at 12:33:22PM +0100, Mark Rutland wrote:
> > On Fri, Sep 07, 2018 at 06:48:10PM +0300, Andrey Ryabinin wrote:
> > > On 09/07/2018 05:56 PM, Will Deacon wrote:
> > > > I don't understand this bit: efistub uses the _
Am Donnerstag, 6. September 2018, 17:39:47 CEST schrieb Katsuhiro Suzuki:
> This patch fixes pin assign of vcc_host1_5v. This regulator is
> controlled by USB20_HOST_DRV signal.
>
> ROCK64 schematic says that GPIO0_A2 pin is used as USB20_HOST_DRV.
> GPIO0_D3 pin is for SPDIF_TX_M0.
>
> ROCK64 sc
This patch attempts to enable RCU-walk for fscrypt.
It looks harmless at glance and could have better
performance than do ref-walk only.
Signed-off-by: Gao Xiang
---
change log v2:
- READ_ONCE(dir->d_parent) -> READ_ONCE(dentry->d_parent)
fs/crypto/crypto.c | 22 +-
On Mon, 2018-09-10 at 14:04 +0200, Borislav Petkov wrote:
> On Fri, Sep 07, 2018 at 12:57:29PM -0500, Brijesh Singh wrote:
> >
> > Commit: 368a540e0232 (x86/kvmclock: Remove memblock dependency)
> > caused SEV guest regression.
> When mentioning a commit in the commit message, put it on a separate
On 9/10/18 7:27 AM, Borislav Petkov wrote:
> On Fri, Sep 07, 2018 at 12:57:30PM -0500, Brijesh Singh wrote:
>> Currently, the per-cpu pvclock data is allocated dynamically when
>> cpu > HVC_BOOT_ARRAY_SIZE.
> Well no, you need to write this correctly - what is "cpu >
> HVC_BOOT_ARRAY_SIZE" ?!
>
Add x86 architecture support for new processor Hygon Dhyana Family
18h. Rework to create a separated file(arch/x86/kernel/cpu/hygon.c)
from the AMD one(arch/x86/kernel/cpu/amd.c) to initialize Dhyana.
In this way we can remove old AMD architecture support codes and
generate a clear initialization f
As a new x86 CPU Vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon)
is a Joint Venture between AMD and Haiguang Information Technology Co.,
Ltd., and aims at providing high performance x86 processor for China
server market.
The first generation Hygon's processor(Dhyana) originates from AMD
techno
The Hygon Dhyana CPU has topology extensions bit in CPUID. With this
bit, the kernel can get the cache information. So add support in
cpuid4_cache_lookup_regs() to get the correct cache size.
The Hygon Dhyana CPU also discovers num_cache_leaves via CPUID leaf
0x801d, so add support to it in fi
The Hygon Dhyana CPU have a special magic MSR way to force WB for
memory >4GB, and support TOP_MEM2. Therefore, it is necessary to
add Hygon Dhyana support in amd_special_default_mtrr().
The number of variable MTRRs for Hygon is 2 as AMD's.
Signed-off-by: Pu Wen
---
arch/x86/kernel/cpu/mtrr/cle
The Hygon Dhyana CPU use no delay in smp_quirk_init_udelay(),
and return in mwait_play_dead() as AMD does.
Reviewed-by: Borislav Petkov
Signed-off-by: Pu Wen
---
arch/x86/kernel/smpboot.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86
The PMU architecture for Hygon Dhyana CPU is similar to the AMD Family
17h one. To support Hygon Dhyana PMU, call amd_pmu_init() to share
AMD PMU initialization flow, and change the PMU name to "HYGON".
The Hygon Dhyana CPU support both legacy and extension PMC MSRs(perf
counter registers and even
The ideal_nops for Hygon Dhyana CPU should be p6_nops.
Reviewed-by: Borislav Petkov
Signed-off-by: Pu Wen
---
arch/x86/kernel/alternative.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index b9d5e7c..184e9a0 100644
--- a/a
As Hygon registered its PCI Vendor ID as a new one 0x1d94, and there
are PCI Devices 0x1450/0x1463/0x1464 for Host bridge on Hygon Dhyana
platforms, so add Hygon Dhyana support to the PCI and north bridge
subsystem by using the code path of AMD family 17h.
Acked-by: Bjorn Helgaas# pci_ids.h
Si
Add Hygon Dhyana support to the APIC subsystem as it use modern APIC.
When running on 32 bit mode, bigsmp should be enabled if there are
more than 8 cores online.
Signed-off-by: Pu Wen
---
arch/x86/kernel/apic/apic.c | 13 +++--
arch/x86/kernel/apic/probe_32.c | 1 +
2 files changed
The Hygon Dhyana CPU has the same speculative execution as AMD family
17h, so share AMD spectre mitigation code for Hygon Dhyana.
Also Hygon Dhyana is not affected by meltdown vulnerability as AMD,
so add the exception for Hygon Dhyana.
Signed-off-by: Pu Wen
---
arch/x86/kernel/cpu/bugs.c | 6
[Cc Pavel]
On Mon 10-09-18 14:35:27, Mikhail Zaslonko wrote:
> If memory end is not aligned with the linux memory section boundary, such
> a section is only partly initialized. This may lead to VM_BUG_ON due to
> uninitialized struct pages access from is_mem_section_removable() or
> test_pages_in_
The Hygon Dhyana CPU has the SVM feature as AMD family 17h does.
So enable the KVM infrastructure support to it.
Reviewed-by: Borislav Petkov
Signed-off-by: Pu Wen
---
arch/x86/include/asm/kvm_emulate.h | 4
arch/x86/include/asm/virtext.h | 5 +++--
arch/x86/kvm/emulate.c
The machine check architecture for Hygon Dhyana CPU is similar to the
AMD family 17h one. To make MCE working on Hygon platforms, add vendor
checking for Hygon Dhyana to share the code path of AMD family 17h.
Signed-off-by: Pu Wen
---
arch/x86/include/asm/mce.h| 2 ++
arch/x86/k
Hi Ville,
The failure is surprising, because the commit is tiny, and almost does
not change the code logic.
From looking through the commit, the only functional difference this
commit makes is:
static_branch_enable(&__use_tsc) was called unconditionally from
tsc_init(), but after the commit onl
Hi, Ludovic,
On 06/09/2018 15:42, Ludovic Desroches wrote:
> From: Nicolas Ferre
>
> When mode is set in atmel_config_iso7816() we backup last RS232 mode
> for coming back to this mode if requested.
> Also allow setup of T=0 and T=1 parameter and basic support in set_termios
> function as well.
To make AMD64 EDAC and MCE drivers working on Hygon platforms, add
support for Hygon Dhyana CPU by using the code path of AMD family
17h.
Signed-off-by: Pu Wen
---
drivers/edac/amd64_edac.c | 8 +++-
drivers/edac/mce_amd.c| 4 +++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff
As the Hygon Dhyana CPU support ACPI P-States feature, and there is
SMBus device(PCI device ID 0x790b) on Hygon platform, so add Hygon
Dhyana support to the cpufreq driver by using the code path of AMD
family 17h.
Acked-by: Rafael J. Wysocki
Signed-off-by: Pu Wen
---
drivers/cpufreq/acpi-cpufre
The Hygon Dhyana CPU has NONSTOP TSC feature, so enable the ACPI
driver support to it.
Acked-by: Rafael J. Wysocki
Signed-off-by: Pu Wen
---
drivers/acpi/acpi_pad.c | 1 +
drivers/acpi/processor_idle.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/acpi/acpi_pad.c b/drivers
Tool cpupower is useful to get CPU frequency information and monitor
power stats on Hygon Dhyana platforms. So add Hygon Dhyana support to
it by checking vendor and family to share the code path of AMD family
17h.
Signed-off-by: Pu Wen
---
tools/power/cpupower/utils/cpufreq-info.c
On 08/27/2018 09:51 AM, Cornelia Huck wrote:
On Mon, 27 Aug 2018 09:47:58 -0400
Tony Krowiak wrote:
On 08/27/2018 04:33 AM, Cornelia Huck wrote:
On Thu, 23 Aug 2018 10:16:59 -0400
Tony Krowiak wrote:
On 08/23/2018 06:25 AM, Cornelia Huck wrote:
On Wed, 22 Aug 2018 15:16:19 -0400
Tony Kr
On 08.09.2018 05:57, Masami Hiramatsu wrote:
> On Fri, 7 Sep 2018 14:50:59 +0200
> Peter Oberparleiter wrote:
>
>> On 06.09.2018 18:42, Masami Hiramatsu wrote:
>>> Peter Oberparleiter wrote:
I've attached a quick fix that should address both problems. I'd
appreciate if this patch could
On Mon, 2018-09-10 at 08:15 -0500, Brijesh Singh wrote:
>
> On 9/10/18 7:27 AM, Borislav Petkov wrote:
> >
> > On Fri, Sep 07, 2018 at 12:57:30PM -0500, Brijesh Singh wrote:
> > >
> > > diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
> > > index 376fd3a..6086b56 100644
> > >
On Sat, Sep 08, 2018 at 12:46:35PM +0200, Thomas Gleixner wrote:
> On Thu, 6 Sep 2018, Christoph Hellwig wrote:
>
> > Just as before: NAK to entirely pointless abstractions. Please stop
> > beating the dead horse.
>
> I disagree. These interrupts very well fit into the percpu interupt
> mechani
On Mon, 10 Sep 2018, Sean Christopherson wrote:
> On Mon, 2018-09-10 at 14:04 +0200, Borislav Petkov wrote:
> > On Fri, Sep 07, 2018 at 12:57:29PM -0500, Brijesh Singh wrote:
> > >
> > > Commit: 368a540e0232 (x86/kvmclock: Remove memblock dependency)
> > > caused SEV guest regression.
> > When me
On Mon, Sep 10, 2018 at 01:31:08PM +0200, Gert Wollny wrote:
> Am Montag, den 10.09.2018, 12:53 +0200 schrieb Gerd Hoffmann:
> >
> > By default qemu doesn't use memfd for backing storage, you have to
> > explicitly configure qemu that way (see qemu commit log of the test
> > branch):
> >
> >
On Mon, 10 Sep 2018, Christoph Hellwig wrote:
> On Sat, Sep 08, 2018 at 12:46:35PM +0200, Thomas Gleixner wrote:
> > On Thu, 6 Sep 2018, Christoph Hellwig wrote:
> >
> > > Just as before: NAK to entirely pointless abstractions. Please stop
> > > beating the dead horse.
> >
> > I disagree. These
On Sun, Sep 9, 2018 at 6:52 PM Al Viro wrote:
>
> */
> +#ifndef INIT_C_CC_VDISCARD
> +#define INIT_C_CC_VDISCARD 'O'-0x40
> +#endif
Just change everybody to do the same, nobody cares about VDISCARD.
We can change the value of VDISCARD because it doesn't actually have
anything connected to it, s
On Thu, Sep 06, 2018 at 04:15:14PM +0530, Anup Patel wrote:
> This patch is doing two things:
> 1. Allow IRQCHIP driver to provide IPI trigger mechanism
And the big questions is why do we want that? The last thing we
want is for people to "innovate" on how they deliver IPIs. RISC-V
has defined a
On Thu, Sep 06, 2018 at 05:23:07PM +0530, Anup Patel wrote:
> > And we reject that driver approach for good reason and are now
> > doing the architectualy low-level irq handling in common code
> > without any need whatsover to duplicate information in the
> > privileged spec in DT.
>
> In other wo
On Mon, 10 Sep 2018, Thomas Gleixner wrote:
> On Mon, 10 Sep 2018, Christoph Hellwig wrote:
> > On Sat, Sep 08, 2018 at 12:46:35PM +0200, Thomas Gleixner wrote:
> > > On Thu, 6 Sep 2018, Christoph Hellwig wrote:
> > >
> > > > Just as before: NAK to entirely pointless abstractions. Please stop
>
On Wed, Sep 05, 2018 at 02:37:31PM -0500, Rob Herring wrote:
> Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
> has the side effect of defaulting to iterating using "cpu" node names in
> preference to the deprecated (for FDT) device_type == "cpu".
>
> Cc: Palmer Dabbelt
> C
On 09/06/2018 04:49 AM, Pierre Morel wrote:
On 13/08/2018 23:48, Tony Krowiak wrote:
From: Tony Krowiak
Registers the matrix device created by the VFIO AP device
driver with the VFIO mediated device framework.
Registering the matrix device will create the sysfs
structures needed to create medi
Hi Michael,
Do you plan to pull it for 4.20 ?
Cheers,
Laurent.
On 20/08/2018 16:29, Laurent Dufour wrote:
> On very large system we could see soft lockup fired when a process is
> exiting
>
> watchdog: BUG: soft lockup - CPU#851 stuck for 21s! [forkoff:215523]
> Modules linked in: pseries_rng r
On Mon, Sep 10, 2018 at 03:37:31PM +0200, Thomas Gleixner wrote:
> > > Just a few weeks ago you said the contrary:
> > >
> > > http://lists.infradead.org/pipermail/linux-riscv/2018-August/000943.html
> >
> > Sigh. Yes. Now that you remind me.
>
> Just for clarification. I had the impression tha
/commits/Baoquan-He/x86-mm-KASLR-Fix-the-wrong-calculation-of-kalsr-region-initial-size/20180910-205421
config: i386-randconfig-x077-201836 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All error
On Mon, 10 Sep 2018, Nicolas Ferre wrote:
> Hi Lee,
>
> On 10/09/2018 at 11:48, Lee Jones wrote:
> > On Tue, 04 Sep 2018, Radu Pirea wrote:
> > > Well, this is the 12th version of this patch series.
> > > In this version I fixed a warning from kbuild-robot and I have no idea
> > > how I forgot to
On Mon, 10 Sep 2018, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 03:37:31PM +0200, Thomas Gleixner wrote:
> > > > Just a few weeks ago you said the contrary:
> > > >
> > > > http://lists.infradead.org/pipermail/linux-riscv/2018-August/000943.html
> > >
> > > Sigh. Yes. Now that you remind
On 9/10/18 9:17 AM, Michal Hocko wrote:
> [Cc Pavel]
>
> On Mon 10-09-18 14:35:27, Mikhail Zaslonko wrote:
>> If memory end is not aligned with the linux memory section boundary, such
>> a section is only partly initialized. This may lead to VM_BUG_ON due to
>> uninitialized struct pages access
On Mon, Sep 10, 2018 at 4:51 AM Andre Kalb wrote:
>
> Hi Frank,
>
> > -Ursprüngliche Nachricht-
> > Von: Frank Rowand [mailto:frowand.l...@gmail.com]
> > Gesendet: Freitag, 7. September 2018 22:01
> > An: Andre Kalb; robh...@kernel.org; devicet...@vger.kernel.org; linux-
> > ker...@vger.ke
On Fri, Sep 07, 2018 at 06:14:29PM +0530, Anup Patel wrote:
> This patch provides arch_show_interrupts() implementation to
> show IPI stats via /proc/interrupts.
>
> Now the contents of /proc/interrupts" will look like below:
>CPU0 CPU1 CPU2 CPU3
> 8: 17
On Mon, 10 Sep 2018, Benson Leung wrote:
> On Mon, Sep 10, 2018 at 5:12 PM Lee Jones wrote:
> >
> > On Fri, 07 Sep 2018, Benson Leung wrote:
> >
> > > Hi Enric,
> > >
> > > On Wed, Jul 18, 2018 at 06:09:56PM +0200, Enric Balletbo i Serra wrote:
> > > > cros-ec includes inside the MFD subsystem, s
Em Mon, Sep 10, 2018 at 12:31:54PM +0200, Jiri Olsa escreveu:
> On Mon, Sep 10, 2018 at 03:28:11PM +0530, Ravi Bangoria wrote:
> > We don't have perf test available to test watchpoint functionality.
> > Add simple set of tests:
> > - Read only watchpoint
> > - Write only watchpoint
> > - Read /
On Fri 07-09-18 16:30:59, Shuah Khan wrote:
> On 09/07/2018 02:34 AM, Michal Hocko wrote:
> > On Thu 06-09-18 15:53:34, Shuah Khan wrote:
> > [...]
> >> A few critical allocations could be satisfied and root cgroup prevails. It
> >> is not the
> >> intent to have exclusivity at the expense of the
On 2018/9/8 22:17, Jonathan Cameron wrote:
> On Sat, 8 Sep 2018 17:59:13 +0530
> Himanshu Jha wrote:
>
>> On Sat, Sep 08, 2018 at 06:57:36PM +0800, zhong jiang wrote:
>>> The iterator in for_each_set_bit is never null, therefore, remove
>>> the redundant conditional judgment.
>>>
>>> Signed-off-by
On Mon, Sep 10, 2018 at 03:45:42PM +0200, Thomas Gleixner wrote:
> > He has an irqchip that is called from the RISC-V exception handler
> > when the interrupt flag is set in scause and then dispatches to one
> > of: IPI, timer, actual irqchip.
>
> So the per cpu timer is the only per cpu interrup
From: Linus Torvalds
> ...
> You could literally do something like
>
> /* Make it canonical in case we flipped the high bit */
> addr = (long)(addr<<1)>>1;
Isn't it safer to use a mask and let the compiler decide if two
shifts are a good implementation?
addr &= ~HIGH_MAGIC_BIT;
On Mon, Sep 10, 2018 at 8:38 AM Christoph Hellwig wrote:
>
> On Wed, Sep 05, 2018 at 02:37:31PM -0500, Rob Herring wrote:
> > Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
> > has the side effect of defaulting to iterating using "cpu" node names in
> > preference to the dep
On Sat, Sep 8, 2018 at 7:15 AM Thomas Gleixner wrote:
>
> On Mon, 27 Aug 2018, Rob Herring wrote:
>
> > In preparation to remove the node name pointer from struct device_node,
> > convert printf users to use the %pOFn format specifier.
> >
> > Cc: Thomas Gleixner
> > Cc: Jason Cooper
> > Cc: Mar
It was possible that sync_rcu_exp_select_cpus() enqueued something on
CPU0 while CPU0 was offline. Such a work item wouldn't be processed
until CPU0 gets back online. This problem was addressed in commit
fcc6354365015 ("rcu: Make expedited GPs handle CPU 0 being offline"). I
don't think the issue f
On Sat, Aug 11, 2018 at 11:00:37AM +0800, Jia-Ju Bai wrote:
You forgot to Cc the person who wrote this code...
> kernel/locking/rtmutex.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c
> index 2823d4163a37..8f25
Hi,
Am Donnerstag, 6. September 2018, 18:39:56 CEST schrieb Katsuhiro Suzuki:
> This patch adds port and endpoint of i2s and spdif nodes for rk3328.
> Because to use modern sound card interface such as audio-graph-card.
>
> Signed-off-by: Katsuhiro Suzuki
> ---
> arch/arm64/boot/dts/rockchip/rk
Em Mon, Sep 10, 2018 at 02:06:43PM +0200, Ingo Molnar escreveu:
> * Alexey Budankov wrote:
> > On 10.09.2018 12:18, Ingo Molnar wrote:
> > > * Alexey Budankov wrote:
> > >> Currently in record mode the tool implements trace writing serially.
> > >> The algorithm loops over mapped per-cpu data bu
On Tue, 14 Aug 2018, michael.henner...@analog.com wrote:
> From: Michael Hennerich
>
> no functional changes
>
> Signed-off-by: Michael Hennerich
> ---
> drivers/mfd/adp5520.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Techni
On Mon 10-09-18 13:46:45, Pavel Tatashin wrote:
>
>
> On 9/10/18 9:17 AM, Michal Hocko wrote:
> > [Cc Pavel]
> >
> > On Mon 10-09-18 14:35:27, Mikhail Zaslonko wrote:
> >> If memory end is not aligned with the linux memory section boundary, such
> >> a section is only partly initialized. This ma
* Lee Jones [180910 11:18]:
> On Thu, 30 Aug 2018, Tony Lindgren wrote:
>
> > Lee,
> >
> > * Tony Lindgren [180425 07:31]:
> > > It currently only works if the parent bus uses "simple-bus". We
> > > currently try to probe children with non-existing compatible values.
> > > And we're missing .pr
On Tue, 14 Aug 2018, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Actually honor probe deferral in trying to get the GPIO interrupt as
> of_get_named_gpio_flags() in stmpe_of_probe() may as well just do so.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
> drivers/mfd/stmpe.c | 2 ++
> 1
On 2018-08-30 09:55:03 [+0200], To K. Y. Srinivasan wrote:
> On !RT the header file get_irq_regs() gets pulled in via other header files.
> On
> RT it does not and the build fails:
>
> drivers/hv/vmbus_drv.c:975 implicit declaration of function
> ‘get_irq_regs’ [-Werror=implicit-function-dec
On Mon, Sep 10, 2018 at 02:48:45PM +0200, Thomas Gleixner wrote:
> Ville,
>
> On Mon, 10 Sep 2018, Ville Syrjala wrote:
>
> > From: Ville Syrjälä
> >
> > This reverts commit 608008a45798fe9e2aee04f99b5270ea57c1376f.
> >
> > It breaks wifi on my pentium 3 Fujitsu-Siemens Lifebook S6010
> > lapt
Hi Michal,
It is tricky, but probably can be done. Either change
memmap_init_zone() or its caller to also cover the ends and starts of
unaligned sections to initialize and reserve pages.
The same thing would also need to be done in deferred_init_memmap() to
cover the deferred init case.
For hotp
On Thu, Aug 09, 2018 at 02:57:53PM +0100, Dietmar Eggemann wrote:
> LB_BIAS allows the adjustment on how conservative load should be
> balanced.
> It is very likely that LB_BIAS' influence on load balancing can be
> neglected (see test results below). This is further supported by:
>
> (1) Weighte
On Mon, Sep 10, 2018 at 10:42:05AM +0100, Vladimir Murzin wrote:
>On 02/09/18 14:07, Sasha Levin wrote:
>> From: Vladimir Murzin
>>
>> [ Upstream commit c803ce3f18bd93b3b4a15d1da0c5b5ebc60e0b85 ]
>>
>> ARMv8R adds support for VBAR and updates ID_PFR1 with the new filed
>> Sec_frac (bits [23:20]):
The if condition can be removed if we use BUG_ON directly.
The issule is detected with the help of Coccinelle.
Signed-off-by: zhong jiang
---
mm/memory_hotplug.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 38d94b7..280b26c
Hi!
> > Next -0910 seems to boot ok... but when I hit the power button to
> > suspend the machine... Full dmesg is in the attachment.
>
> Is this a next only issue or is this happening on Linus tree as well?
I believe this only happens in next. I'm pretty sure v4.19-rc1 was
ok. Let me check v4.
Am Montag, den 10.09.2018, 15:30 +0200 schrieb Gerd Hoffmann:
> On Mon, Sep 10, 2018 at 01:31:08PM +0200, Gert Wollny wrote:
> > Am Montag, den 10.09.2018, 12:53 +0200 schrieb Gerd Hoffmann:
> > >
> > > By default qemu doesn't use memfd for backing storage, you have
> > > to
> > > explicitly confi
Em Mon, Sep 10, 2018 at 10:47:54AM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Sep 10, 2018 at 12:31:54PM +0200, Jiri Olsa escreveu:
> > On Mon, Sep 10, 2018 at 03:28:11PM +0530, Ravi Bangoria wrote:
> > > We don't have perf test available to test watchpoint functionality.
> > > Add simple
On 29 June 2018 at 08:19, Viresh Kumar wrote:
> Multiple generic power domains for a device are supported with the help
> of virtual devices, which are created for each device-genpd pair. These
What "device-genpd" pair are you referring to?
> are the device structures which are attached to the p
On Mon 10-09-18 14:11:45, Pavel Tatashin wrote:
> Hi Michal,
>
> It is tricky, but probably can be done. Either change
> memmap_init_zone() or its caller to also cover the ends and starts of
> unaligned sections to initialize and reserve pages.
>
> The same thing would also need to be done in def
On Sat, Sep 08, 2018 at 04:36:19PM +0800, zhong jiang wrote:
> kmemdup has implemented the function that kzalloc() + memcpy() will
> do. and we prefer to use the kmemdup rather than the open coded
> implementation.
Please submit patches using subject lines reflecting the style for the
subsystem.
On Mon, 2018-09-10 at 08:38 +, Tianyu Lan wrote:
> Add flush range call back in the kvm_x86_ops and platform can use it
> to register its associated function. The parameter "kvm_tlb_range"
> accepts a single range and flush list which contains a list of ranges.
>
> Signed-off-by: Lan Tianyu
>
On Sat, 8 Sep 2018 at 22:17, Valentin Schneider
wrote:
>
> Hi Vincent,
>
> On 07/09/18 08:40, Vincent Guittot wrote:
> > When CPUs have different capacity because of RT/DL tasks or
> > micro-architecture or max frequency differences, there are situation where
> > the imbalance is not correctly set
On 2018-09-10 16:56, Mark Brown wrote:
On Mon, Sep 10, 2018 at 09:27:09AM +0530, dk...@codeaurora.org wrote:
> The thing is, we want it to be 100% reliable, not 99.9% reliable. Is
> it somehow wrong to add the spinlock? ...or are you noticing
> performance problems with the spinlock there? I
On Mon 10-09-18 22:03:17, zhong jiang wrote:
> The if condition can be removed if we use BUG_ON directly.
> The issule is detected with the help of Coccinelle.
typo here
Is this really worth changing? If anything I would really love to see
the BUG_ON going away rather than make a cosmetic changes
On Mon, Sep 10, 2018 at 7:19 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 03:45:42PM +0200, Thomas Gleixner wrote:
>> > He has an irqchip that is called from the RISC-V exception handler
>> > when the interrupt flag is set in scause and then dispatches to one
>> > of: IPI, timer, actual
On Mon, Sep 10, 2018 at 10:19 AM Michal Hocko wrote:
>
> On Mon 10-09-18 14:11:45, Pavel Tatashin wrote:
> > Hi Michal,
> >
> > It is tricky, but probably can be done. Either change
> > memmap_init_zone() or its caller to also cover the ends and starts of
> > unaligned sections to initialize and r
Em Fri, Sep 07, 2018 at 11:51:16AM +0300, Adrian Hunter escreveu:
> Commit 1c5aae7710bb ("perf machine: Create maps for x86 PTI entry
> trampolines") revealed a problem with maps__find_symbol_by_name() that
Can we have this with a Fixes: 1c5aae7710bb?
So that that, combined with the CC: stable, t
Jacek
On 09/08/2018 02:53 PM, Jacek Anaszewski wrote:
> Dan,
>
> On 09/07/2018 03:52 PM, Dan Murphy wrote:
> [...]
>>>
And I think Jacek pointed out that the bindings references in this bindings
don't even exist.
I am thinking we need to deprecate this MFD driver and consolida
On Thu, Sep 6, 2018 at 5:50 PM Paul Burton wrote:
>
> Hi Jim,
>
> On Thu, Sep 06, 2018 at 04:42:57PM -0400, Jim Quinlan wrote:
> > Adds the PCIe nodes for the Broadcom STB PCIe root complex.
> >
> > Signed-off-by: Jim Quinlan
> > ---
> > arch/mips/boot/dts/brcm/bcm7425.dtsi | 28
On Mon, 20 Aug 2018, RaviChandra Sadineni wrote:
> Currently on every resume we check for mkbp events and notify the
> clients. This helps in identifying the wakeup sources. But on devices
> that do not support mkbp protocol, we might end up querying key state of
> the keyboard in a loop which blo
Hi,
I'm mounting an ext4 filesystem residing on an AHCI SATA disk via loop:
losetup -o 64424509440 --sizelimit 34359738368 /dev/loop0 /dev/sda
mount -t ext4 /dev/loop0 /mnt
Works perfectly on <= 4.4.155 (latest version on 4.4.x longterm branch)
On 4.9.126 (longterm branch) I get these error
On Mon 10-09-18 14:32:16, Pavel Tatashin wrote:
> On Mon, Sep 10, 2018 at 10:19 AM Michal Hocko wrote:
> >
> > On Mon 10-09-18 14:11:45, Pavel Tatashin wrote:
> > > Hi Michal,
> > >
> > > It is tricky, but probably can be done. Either change
> > > memmap_init_zone() or its caller to also cover the
On Thu, Sep 6, 2018 at 5:46 PM Paul Burton wrote:
>
> Hi Jim,
>
> On Thu, Sep 06, 2018 at 04:42:56PM -0400, Jim Quinlan wrote:
> > Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add
> > generation of msi.h in the MIPS arch.
>
> I guess the second part of this probably became untrue after
When CPUs have different capacity because of RT/DL tasks or
micro-architecture or max frequency differences, there are situation where
the imbalance is not correctly set to migrate waiting task on the idle CPU.
The UC uses the force_balance case :
if (env->idle != CPU_NOT_IDLE && group_has
This driver was originally written by ST in 2016 as a misc input device,
and hasn't been maintained for a long time. I grabbed some code from
it's API and reformed it to a iio proximity device driver.
This version of driver uses i2c bus to talk to the sensor and
polling for measuring completes, so
On Mon, Sep 10, 2018 at 03:33:45AM -1000, Linus Torvalds wrote:
> On Sun, Sep 9, 2018 at 6:52 PM Al Viro wrote:
> >
> > */
> > +#ifndef INIT_C_CC_VDISCARD
> > +#define INIT_C_CC_VDISCARD 'O'-0x40
> > +#endif
>
> Just change everybody to do the same, nobody cares about VDISCARD.
>
> We can chang
On Mon, Sep 10, 2018 at 09:54:47AM +0200, Linus Walleij wrote:
> On Wed, Sep 5, 2018 at 5:04 PM William Breathitt Gray
> wrote:
> > On Wed, May 16, 2018 at 04:03:51PM +0200, Linus Walleij wrote:
> > >On Tue, May 15, 2018 at 6:22 PM, William Breathitt Gray
> > > wrote:
> > >
> > >> For example, sup
On Mon, Sep 10, 2018 at 05:07:10PM +0300, Ville Syrjälä wrote:
> You're reading way too much into this. The revert is just a point to
> start the conversion. I've found that it's the best way to get the
> attention of the relevant developers. Other kind of regression
> reports have an unfortunate h
From: Masayoshi Mizuma
Physical package id 0 is not always exists. We should use
boot_cpu_data.phys_proc_id here.
Signed-off-by: Masayoshi Mizuma
---
arch/x86/events/intel/uncore_snbep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_snbep.c
b
Hi Ingo,
On 10.09.2018 15:06, Ingo Molnar wrote:
>
> * Alexey Budankov wrote:
>
>> Hi Ingo,
>>
>> On 10.09.2018 12:18, Ingo Molnar wrote:
>>>
>>> * Alexey Budankov wrote:
>>>
Currently in record mode the tool implements trace writing serially.
The algorithm loops over mapped pe
On Tue, 14 Aug 2018, Enric Balletbo i Serra wrote:
> The "atomic" API allows us to configure PWM period and duty_cycle and
> enable it in one call.
>
> The patch also moves the pwm_init_state just before any use of the
> pwm_state struct, this fixes a potential bug where pwm_get_state
> can be ca
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