Add Hygon Dhyana support to the APIC subsystem as it use modern APIC.
When running on 32 bit mode, bigsmp should be enabled if there are
more than 8 cores online.

Signed-off-by: Pu Wen <pu...@hygon.cn>
---
 arch/x86/kernel/apic/apic.c     | 13 +++++++++++--
 arch/x86/kernel/apic/probe_32.c |  1 +
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 84132ed..709daf2 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -224,6 +224,11 @@ static int modern_apic(void)
        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
            boot_cpu_data.x86 >= 0xf)
                return 1;
+
+       /* Hygon systems use modern APIC */
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+               return 1;
+
        return lapic_get_version() >= 0x14;
 }
 
@@ -1211,9 +1216,11 @@ void __init sync_Arb_IDs(void)
 {
        /*
         * Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 And not
-        * needed on AMD.
+        * needed on AMD or Hygon.
         */
-       if (modern_apic() || boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+       if (modern_apic() ||
+           boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+           boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
                return;
 
        /*
@@ -1912,6 +1919,8 @@ static int __init detect_init_APIC(void)
                    (boot_cpu_data.x86 >= 15))
                        break;
                goto no_apic;
+       case X86_VENDOR_HYGON:
+               break;
        case X86_VENDOR_INTEL:
                if (boot_cpu_data.x86 == 6 || boot_cpu_data.x86 == 15 ||
                    (boot_cpu_data.x86 == 5 && boot_cpu_has(X86_FEATURE_APIC)))
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 02e8acb..47ff297 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -185,6 +185,7 @@ void __init default_setup_apic_routing(void)
                                break;
                        }
                        /* If P4 and above fall through */
+               case X86_VENDOR_HYGON:
                case X86_VENDOR_AMD:
                        def_to_bigsmp = 1;
                }
-- 
2.7.4

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