Hi Jim,
On Sat, Jan 9, 2016 at 12:47 AM, Jim Wilson wrote:
> On Thu, Jan 7, 2016 at 5:09 PM, Shawn Guo wrote:
>> We have a AARCH64 verification platform (FPGA) which is built without
>> NEON unit. Is there any prebuilt AARCH64 rootfs (busybox, debian ...)
>> that can be
Hi,
We have a AARCH64 verification platform (FPGA) which is built without
NEON unit. Is there any prebuilt AARCH64 rootfs (busybox, debian ...)
that can be used on such platform? Or is it possible to build an
AARCH64 rootfs with -mgeneral-regs-only flag to avoid using NEON unit?
Thanks.
Shawn
Hi Albert,
On Thu, Nov 12, 2015 at 08:20:18AM +0100, Albert ARIBAUD wrote:
> Can you provide the target name and commit ID that you are building,
> s well as the version of the toolchain that you are building with?
> Without being able to reproduce your issue, it's kind of hard to
> diagnose it.
On Thu, Nov 12, 2015 at 07:36:02AM +0100, Ard Biesheuvel wrote:
> On 12 November 2015 at 06:43, Shawn Guo wrote:
> > Here are my questions:
> >
> > - Is this only because that ARM 64-bit toolchain doesn't show the real
> > value of the pointers, or there are so
Hi,
I need some help to understand aarch64-linux-gnu-objdump output in .data
section as below. It's part of the dump of u-boot image with command
'aarch64-linux-gnu-objdump -D -z u-boot'.
Disassembly of section .data:
35039898 :
35039948 :
35039948:
Hi Andy,
On Wed, Apr 22, 2015 at 11:53:37AM -0500, Andy Doan wrote:
> The Systems team has been working on making clone/pull operations
> work better for people in different geographical regions:
>
> https://wiki.linaro.org/Platform/Systems/GitHA
>
> We currently have a DNS test alias named "g
On Tue, Dec 02, 2014 at 06:29:52PM +0800, Jisheng Zhang wrote:
> On Tue, 2 Dec 2014 02:24:03 -0800
> Arnd Bergmann wrote:
> > Yes, that's definitely possible. Any idea how the android folks build their
> > kernel?
>
> copied from https://android.googlesource.com/toolchain/build/+/HEAD/README
>
>
On Tue, Dec 02, 2014 at 11:24:03AM +0100, Arnd Bergmann wrote:
> > > I tracked it a little bit with debug_ll routine printch() and found it
> > > dies at the first pr_info() call in arch/arm/kernel/setup.c:
> > >
> > > pr_info("Booting Linux on physical CPU 0x%x\n", mpidr);
> > >
> > > And
+ LAKML and more people.
On Mon, Dec 01, 2014 at 05:38:38PM +0100, Arnd Bergmann wrote:
> On Monday 01 December 2014 16:32:21 Shawn Guo wrote:
> > Is it a valid or supported use case to build LSK 3.14 kernel with
> > android-toolchain? I can build a LSK 3.14 kernel with Linux to
Hi all,
Is it a valid or supported use case to build LSK 3.14 kernel with
android-toolchain? I can build a LSK 3.14 kernel with Linux toolchain
gcc-linaro-arm-none-eabi-4.9-2014.09, which boots fine on my board.
When I build the same kernel with
android-toolchain-eabi-4.9-2014.09-x86, the kernel
On 10 January 2013 16:05, Viresh Kumar wrote:
> Another thing, can i have a tested-by from you for both my patches ? remove
> and
> add dev?
>
For both:
Tested-by: Shawn Guo
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On Wed, Jan 09, 2013 at 04:50:44PM +0530, Viresh Kumar wrote:
> @Shawn: I believe your driver don't require that ugly code anymore (Though i
> know there is a situation for that to happen, if we have two cpus, you remove
> second one and then add it back. With this cpufreq_add_dev() would call init
On 4 July 2012 15:37, Uwe Kleine-König wrote:
> I want to push that forward. What is the state of these patches on your
> end? Did you start to address the comments? Are there more recent
> patches than the ones in this thread?
>
> Whatever you might have it would be great if you could share it to
Hi Subodh,
On 11 May 2012 18:03, Subodh Nijsure wrote:
>
> Sounds like a very basic question, I would like to test some of the recent
> patches related to mx28 for freescale EVK board.
> ( Some thing like - https://lkml.org/lkml/2012/3/13/176 )
>
> Is there specific branch one should be looking
On Sun, May 06, 2012 at 10:08:25PM -0700, Mike Turquette wrote:
> If no one complains about these then I'll commit them to clk-next and
> (finally) send my pull request to Arnd.
>
On mach-mxs:
Tested-by: Shawn Guo
Mike,
I haven't seen too many outstanding comments on these
On 2 May 2012 21:59, Rob Lee wrote:
>>> + ret = cpuidle_register_device(dev);
>>> + if (ret) {
>>> + pr_err("%s: Failed to register cpu %u\n",
>>> + __func__, cpu_id);
>>
>> Nit: print ret (error code) too?
>>
>
> I added the
On Wed, May 02, 2012 at 08:50:20AM -0500, Rob Lee wrote:
> >> --- a/arch/arm/mach-imx/mach-imx6q.c
> >> +++ b/arch/arm/mach-imx/mach-imx6q.c
> >> @@ -21,6 +21,9 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >> +#include
> >> +#include
> >> #include
> >> #include
> >> #
On Tue, May 01, 2012 at 09:12:40PM -0500, Robert Lee wrote:
> Add basic imx6q cpuidle driver. For now, only basic WFI state is
> supported. Deeper idle states will be added in the future.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/mach-imx/cpuidle-imx6q.c | 33 +++
On Tue, May 01, 2012 at 09:12:38PM -0500, Robert Lee wrote:
> Add common cpuidle init functionality that can be used by various
> imx platforms.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/plat-mxc/Makefile |1 +
> arch/arm/plat-mxc/cpuidle.c | 80
> +
On Tue, May 01, 2012 at 09:12:37PM -0500, Robert Lee wrote:
> Add common imx cpuidle initialization functionality and add a i.MX5 and i.MX6Q
> platform cpuidle implementation.
>
> Based on v3.4-rc5 plus recently submitted device tree late_initcall patch:
Just to clarify, this is not a device tree
On 25 April 2012 03:51, Russell King - ARM Linux wrote:
> On Tue, Apr 24, 2012 at 10:40:35AM -0500, Rob Lee wrote:
>> Thanks for the attention on this. From what I've understood, I will
>> send another submission that includes the imx cpuidle patchset and
>> Shawn's device tree late initcall patc
On Tue, Apr 24, 2012 at 08:54:26AM +0100, Russell King - ARM Linux wrote:
> On Tue, Apr 24, 2012 at 09:38:43AM +0800, Shawn Guo wrote:
> > On Mon, Apr 23, 2012 at 10:45:02AM -0500, Rob Lee wrote:
> > > >> Let me try last time. What about having a late_initcall hook
On Mon, Apr 23, 2012 at 10:45:02AM -0500, Rob Lee wrote:
> >> Let me try last time. What about having a late_initcall hook in
> >> machine_desc?
> >
> > Also fine with me.
> >
>
> Shall I add Shawn's patch to my imx cpuidle patchset or should the
> arch/arm/kernel/setup.c and arch.h changes be su
On Mon, Apr 23, 2012 at 08:56:23AM +0200, Sascha Hauer wrote:
> On Mon, Apr 23, 2012 at 02:53:01PM +0800, Shawn Guo wrote:
> > On Mon, Apr 23, 2012 at 08:27:39AM +0200, Sascha Hauer wrote:
> > > On Mon, Apr 23, 2012 at 01:18:21PM +0800, Shawn Guo wrote:
> > > > On S
On Mon, Apr 23, 2012 at 08:27:39AM +0200, Sascha Hauer wrote:
> On Mon, Apr 23, 2012 at 01:18:21PM +0800, Shawn Guo wrote:
> > On Sun, Apr 22, 2012 at 11:44:39PM -0500, Rob Lee wrote:
> > > >> I don't think we need a cpu_is_imx6q(), but having some i.MX6 specific
>
On Sun, Apr 22, 2012 at 11:44:39PM -0500, Rob Lee wrote:
> >> I don't think we need a cpu_is_imx6q(), but having some i.MX6 specific
> >> hook at device_initcall time can't be too wrong. Shawn?
> >>
> > Yep, it works for me.
> >
> Sascha, Shawn, thanks for the response.
>
> Since device_initcall i
On Thu, Apr 19, 2012 at 08:43:08AM +0200, Sascha Hauer wrote:
> > Sascha or Shawn, any further comments on my question?
>
Sorry for the late response, Rob.
> I don't think we need a cpu_is_imx6q(), but having some i.MX6 specific
> hook at device_initcall time can't be too wrong. Shawn?
>
Yep, it
On 17 April 2012 11:50, Turquette, Mike wrote:
> That is a good question. I think it is worth waiting on Saravana's
> patch which exposes non-private members of struct clk via struct
> clk_hw. This will have an effect on both platform clock data and
> code.
Saravana,
(*nudge*) (*nudge*) goes t
On 17 April 2012 07:10, Turquette, Mike wrote:
...
> Yes, this was a braindead change on my part. I'll remove the kstrdup
> in my next series (the rest of this patch will stay in).
>
Do you have an ETA on that? A few platform porting are waiting for a
stable branch with all necessary fixup/clean
On Sat, Apr 14, 2012 at 09:39:06PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> This patch adds device-tree support for dialog MFD and the binding
> documentations.
>
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Cc: Samuel Ortiz
&g
On Thu, Apr 12, 2012 at 11:14:38AM +, Arnd Bergmann wrote:
> On Thursday 12 April 2012, Mike Turquette wrote:
> > This series collects many of the fixes posted for the recently merged
> > common clock framework as well as some general clean-up. Most of the
> > code classifies as a clean-up mor
On Wed, Apr 11, 2012 at 06:02:51PM -0700, Mike Turquette wrote:
...
> @@ -175,23 +188,32 @@ struct clk *clk_register_divider(struct device *dev,
> const char *name,
> div->flags = clk_divider_flags;
> div->lock = lock;
>
> + /* allocate the temporary parent_names */
> if (p
On Fri, Mar 30, 2012 at 09:46:53PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Add anatop regulators to imx6q.dtsi for all imx6q platforms.
>
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Signed-off-by: Richard Zhao
> Cc: Shawn
On Fri, Mar 30, 2012 at 04:09:17PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> (2012年03月22日 15:45), Shawn Guo wrote:
> >> + };
> >> +
> >> + regulator-1p1@110 {
> >> +
documentation.
>
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Cc: Shawn Guo
> Cc: Mark Brown
> Cc: Liam Girdwood
Acked-by: Shawn Guo
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iver supports device tree bindings.
Then, you need to have a document in Documentation/devicetree/bindings.
> It only uses the RTC hw in non-secure mode.
>
> Signed-off-by: Anish Trivedi
> Signed-off-by: Eric Miao
> Signed-off-by: Anson Huang
> Signed-off-by: Ying-Chun Liu (Pa
vices sharing the same register they
can be sorted by anatop-vol-bit-shift.
I'm looking at the IMX6DQRM Rev. C, and commenting the differences
I'm seeing from the document below.
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Signed-off-by: Richard Zhao
> Cc: Shawn Guo
>
On Thu, Mar 22, 2012 at 02:49:36PM +0800, Ying-Chun Liu (PaulLiu) wrote:
...
> Ouch. I'll prepare a separate patch to add back the documentation.
>
I just gave a quick testing on the driver with the dts change you
posted on imx6. There is some little problem we may need to address.
prom_parse: B
ntrols 1P1, 2P5, 3P0 (USB).
> This patch adds the Anatop regulator driver.
>
> Signed-off-by: Nancy Chen
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Acked-by: Shawn Guo
> Reviewed-by: Axel Lin
> Cc: Mark Brown
> Cc: Liam Girdwood
> Cc: Samuel Ortiz
> Cc: Jean-
On 21 March 2012 07:46, Turquette, Mike wrote:
...
> As mentioned above, you'll still need to check for CLK_SET_RATE_PARENT
> in your .round_rate implementation with __clk_get_flags(hw->clk).
>
For my particular case, the clk is PLL with fixed rate clk
(oscillator) as parent. It's known that flag
On Thu, Mar 15, 2012 at 11:11:19PM -0700, Mike Turquette wrote:
...
> +struct clk_ops {
> + int (*prepare)(struct clk_hw *hw);
> + void(*unprepare)(struct clk_hw *hw);
> + int (*enable)(struct clk_hw *hw);
> + void(*disable)(struct clk
On Fri, Mar 16, 2012 at 08:23:57PM -0700, Saravana Kannan wrote:
> On 03/07/2012 01:20 PM, Turquette, Mike wrote:
...
> >Admittedly I think that the OMAP code could migrate some of these bits
> >to a lazy-registration model, specifically the hwmod object instances,
> >but that requires an awful lot
On Fri, Mar 09, 2012 at 10:25:00AM -0800, Turquette, Mike wrote:
...
> However if you have the ability to use the clk_foo_register functions
> please do use them in place of static initialization. The static init
> stuff is only for folks backed into a corner and forced to use it...
> for now. I'
On Fri, Mar 16, 2012 at 08:23:57PM -0700, Saravana Kannan wrote:
...
> Hi Mike,
>
> I already took a quick look at the v7 series, but I thought this
> thread has more relevant context for my response. So, responding
> here.
>
> I'm with Sascha on creating a clk_internal/clk_initializer and
> remo
Another trivial comment. But if there is an incremental patch, maybe
consider to include it.
On Thu, Mar 15, 2012 at 11:11:19PM -0700, Mike Turquette wrote:
...
> +#ifdef CONFIG_COMMON_CLK_DISABLE_UNUSED
> +static int clk_disable_unused(void)
> +{
> + struct clk *clk;
> + struct hlist_nod
Reading the documentation of function clk_set_rate(), I'm not sure
it exactly matches what the code does.
If there is mismatch, it might be worth sending an incremental patch
to update the documentation and avoid the confusion?
On Thu, Mar 15, 2012 at 11:11:19PM -0700, Mike Turquette wrote:
> +/*
On Mon, Mar 05, 2012 at 11:07:28PM +0800, Ying-Chun Liu (PaulLiu) wrote:
...
> +MODULE_AUTHOR("Nancy Chen ");
> +MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) ");
I meant something like:
MODULE_AUTHOR("Nancy Chen , "
"Ying-Chun Liu (Paul
ntrols 1P1, 2P5, 3P0 (USB).
> This patch adds the Anatop regulator driver.
>
> Signed-off-by: Nancy Chen
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Cc: Mark Brown
> Cc: Liam Girdwood
> Cc: Samuel Ortiz
> Cc: Shawn Guo
> ---
> .../bindings/regulator/anatop-regul
Sorry, one more missing ...
On Sun, Mar 04, 2012 at 01:39:12AM +0800, Ying-Chun Liu (PaulLiu) wrote:
...
> +static int of_anatop_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + void *ioreg;
> + struct anat
On Sun, Mar 04, 2012 at 01:39:12AM +0800, Ying-Chun Liu (PaulLiu) wrote:
...
> +static int of_anatop_probe(struct platform_device *pdev)
__devinit
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + void *ioreg;
> + struct anatop *drvdata;
> +
e mfd device.
>
> Signed-off-by: Ying-Chun Liu (PaulLiu)
> Cc: Samuel Ortiz
> Cc: Mark Brown
> Cc: Shawn Guo
A few trivial comments below, otherwise
Acked-by: Shawn Guo
> Cc: Venu Byravarasu
> Cc: Peter Korsgaard
> ---
> drivers/mfd/Kconfig|6 ++
&
On Thu, Feb 09, 2012 at 04:51:26AM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Anatop is an integrated regulator inside i.MX6 SoC.
> There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
> And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
On Thu, Feb 09, 2012 at 04:51:25AM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Anatop is a mfd chip embedded in Freescale i.MX6Q SoC.
> Anatop provides regulators and thermal.
> This driver handles the address space and the operation of the mfd device.
>
> Signed-
On Thu, Jan 12, 2012 at 04:04:23PM -0800, Saravana Kannan wrote:
> While the original clk_hw suggestion was well intentioned, it just
> forces too many unnecessary dereferences and indirection. It also
> prevents static init of some fields as others have mentioned.
> Overall, it made the MSM clock
On Fri, Jan 06, 2012 at 08:56:50AM +0800, Richard Zhao wrote:
> Hi Sascha & Shawn,
>
> Could you look and ack the patch?
>
The patch looks good to me. But it really depends on how the patch #1
looks to Russell.
--
Regards,
Shawn
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Hi Dave,
On Thu, Dec 29, 2011 at 02:21:03PM +0800, Richard Zhao wrote:
> There's still a bug that, after rmmod module, cpu0 still has cpufreq
> sysfs entry.
>
> cpufreq_unregister_driver can not clean up everything.
>
Is this an known issue to cpufreq core?
--
Regards,
Shawn
On Wed, Dec 28, 2011 at 12:54:21PM +, Mark Brown wrote:
> On Wed, Dec 28, 2011 at 09:06:20PM +0800, Shawn Guo wrote:
> > On Wed, Dec 28, 2011 at 12:47:40PM +, Mark Brown wrote:
>
> > > > One word. You mean I have to always depends on REGULATOR config, right?
>
On Wed, Dec 28, 2011 at 12:47:40PM +, Mark Brown wrote:
> > One word. You mean I have to always depends on REGULATOR config, right?
>
> Yes.
I do not care too much. But it puts the driver on an interesting
position, that is it can work without a regulator driver backing the
cpu voltage but i
On Wed, Dec 28, 2011 at 10:01:13AM +0800, Shawn Guo wrote:
> Here is my tag on this patch.
>
> Acked-by: Shawn Guo
>
For record, this tag is only valid with the following conditions.
* Fix the failure of pm-qa case cpufreq_01
* Fix the failure of module build
* Remove the d
ts" "test -d
> $CPU_PATH/cpufreq/conservative"
> This driver assume all cpu cores to share the same freq and voltage. The
> affected
> cpu is all other cpus. They also share one single governor. The test case
> does not
> suit this driver and not for most ar
Hi Richard,
On Tue, Dec 27, 2011 at 04:24:19PM +0800, Richard Zhao wrote:
> The driver get cpu operation point table from device tree cpu0 node,
> and adjusts operating points using clk and regulator APIs.
>
> It support single core and multi-core ARM SoCs. But currently it assume
> all cores sha
On Tue, Dec 27, 2011 at 06:16:34PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Anatop is an integrated regulator inside i.MX6 SoC.
> There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
> And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
Hi Richard,
Whenever we invent some new device tree binding support, we need to
Cc devicetree-disc...@lists.ozlabs.org (Cc-ed).
On Thu, Dec 15, 2011 at 07:16:36PM +0800, Richard Zhao wrote:
> Signed-off-by: Richard Zhao
> ---
> arch/arm/boot/dts/imx6q.dtsi |2 ++
> 1 files changed, 2 insert
One comment was missed.
On Mon, Nov 21, 2011 at 05:40:46PM -0800, Mike Turquette wrote:
[...]
> +struct clk_hw_ops clk_hw_gate_set_enable_ops = {
const?
> + .enable = clk_hw_gate_enable_set,
> + .disable = clk_hw_gate_disable_clear,
> + .recalc_rate = clk_hw_gate_recalc_rate,
> +
On Mon, Nov 21, 2011 at 05:40:46PM -0800, Mike Turquette wrote:
> Many platforms support simple gateable clks and fixed-rate clks that
> should not be re-implemented by every platform.
>
> This patch introduces a gateable clk with a common programming model of
> gate control via a write of 1 bit t
On Mon, Nov 21, 2011 at 05:40:45PM -0800, Mike Turquette wrote:
[...]
> +/**
> + * DOC: Using the CLK_PARENT_SET_RATE flag
> + *
> + * __clk_set_rate changes the child's rate before the parent's to more
> + * easily handle failure conditions.
> + *
> + * This means clk might run out of spec for a s
On Wed, Nov 23, 2011 at 12:33:47PM -0800, Turquette, Mike wrote:
> On Tue, Nov 22, 2011 at 6:03 PM, Saravana Kannan
> wrote:
> > On 11/21/2011 05:40 PM, Mike Turquette wrote:
[...]
> >> +is modified slightly for brevity:
> >> +
> >> +struct clk {
> >> + const char *name;
> >>
On Mon, Nov 21, 2011 at 05:40:42PM -0800, Mike Turquette wrote:
[...]
> .the most notable change is the removal of struct clk_hw.
Happy to see that.
> This extra
> layer of abstraction is only necessary if we want hide the definition of
> struct clk from platform code. Many developers express
On Mon, Nov 21, 2011 at 05:40:43PM -0800, Mike Turquette wrote:
> The common clk framework provides clk_prepare and clk_unprepare
> implementations. Create an entry for HAVE_CLK_PREPARE so that
> GENERIC_CLK can select it.
>
> Signed-off-by: Mike Turquette
> ---
Acked-by: S
I'm running v3.2-rc1 kernel with CONFIG_PROVE_LOCKING enabled on imx6
and imx5 with Linaro rootfs (nano, developer) and seeing a circular
locking dependency warning.
---8<
[3.520947] Freeing init memory: 260K
Loading, please wait...
[3.713140]
[3.714647] ==
On Thu, Sep 22, 2011 at 03:26:58PM -0700, Mike Turquette wrote:
> From: Jeremy Kerr
>
> Signed-off-by: Jeremy Kerr
> Signed-off-by: Mark Brown
> Signed-off-by: Mike Turquette
> ---
> Changes since v1:
> Add copyright header
>
> drivers/clk/Kconfig |4
> drivers/clk/Makefile|
On Thu, Sep 22, 2011 at 03:26:57PM -0700, Mike Turquette wrote:
> From: Jeremy Kerr
>
> Implement clk_set_rate by adding a set_rate callback to clk_hw_ops.
> Rates are propagated down the clock tree and recalculated. Also adds a
> flag for signaling that parents must change rates to achieve the
Hi Mike,
Some random comments/nits ...
On Thu, Sep 22, 2011 at 03:26:56PM -0700, Mike Turquette wrote:
> +struct clk *clk_register(const struct clk_hw_ops *ops, struct clk_hw *hw,
> + const char *name)
> +{
> + struct clk *clk;
> +
> + clk = kzalloc(sizeof(*clk), GFP_KERNEL);
On Thu, Oct 20, 2011 at 04:18:49PM +0200, Linus Walleij wrote:
> On Thu, Oct 20, 2011 at 3:10 PM, Shawn Guo wrote:
>
> >> without the common definition from PIN_CONFIG_PULL to
> >> PIN_CONFIG_USER, many platforms will need to definite them repeatedly.
> >>
On Thu, Oct 20, 2011 at 10:26:43AM -0700, Stephen Warren wrote:
> Shawn Guo wrote at Wednesday, October 19, 2011 8:32 PM:
> > On Wed, Oct 19, 2011 at 06:21:14PM +0200, Linus Walleij wrote:
> ...
> > > +int pin_config_group(struct pinctrl_dev *pctldev,
On Thu, Oct 20, 2011 at 05:17:08PM +0800, Barry Song wrote:
> >> +enum pin_config_param {
> >> + PIN_CONFIG_BIAS_UNKNOWN,
> >> + PIN_CONFIG_BIAS_FLOAT,
> >> + PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
> >> + PIN_CONFIG_BIAS_PULL_UP,
> >> + PIN_CONFIG_BIAS_PULL_DOWN,
> >> + PIN_CONFIG_
On Wed, Oct 19, 2011 at 04:04:29PM -0700, Stephen Warren wrote:
> > @@ -113,6 +204,10 @@ extern struct pinctrl_dev *pinctrl_register(struct
> > pinctrl_desc *pctldesc,
> ...
> > +extern int pin_config(struct pinctrl_dev *pctldev, int pin,
> > + enum pin_config_param param, unsigned
On Wed, Oct 19, 2011 at 06:21:14PM +0200, Linus Walleij wrote:
> From: Linus Walleij
>
> This add per-pin and per-group pin control interfaces for biasing,
> driving and other such electronic properties. The intention is
> clearly to enumerate all things you can do with pins, hoping that
> these
On Mon, Oct 17, 2011 at 08:51:11AM -0700, Stephen Warren wrote:
> Shawn Guo wrote at Friday, October 14, 2011 9:12 PM:
> > On Fri, Oct 14, 2011 at 08:53:33AM -0700, Stephen Warren wrote:
> ...
> > > Having the driver expose a list of all possible combinations of pin
>
On Fri, Oct 14, 2011 at 08:53:33AM -0700, Stephen Warren wrote:
> Shawn Guo wrote at Friday, October 14, 2011 8:59 AM:
> > It might be a good place for me to catch up the pinctrl subsystem
> > discussion, as far as imx migration concerned.
> >
> > I have not read the
It might be a good place for me to catch up the pinctrl subsystem
discussion, as far as imx migration concerned.
I have not read the backlog of all the previous discussion, so please
excuse me if something I put here have been discussed.
On Thu, Oct 13, 2011 at 01:59:55PM -0700, Stephen Warren wr
On Mon, Oct 10, 2011 at 10:23:53AM +0200, Linus Walleij wrote:
> On Sun, Oct 9, 2011 at 11:36 AM, Shawn Guo wrote:
>
> >> + * @hog_on_boot: if this is set to true, the regulator subsystem will
> >> itself
> > ^^
On Mon, Oct 03, 2011 at 10:17:42AM +0200, Linus Walleij wrote:
[...]
> diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h
> new file mode 100644
> index 000..2cd4033
> --- /dev/null
> +++ b/include/linux/pinctrl/machine.h
> @@ -0,0 +1,107 @@
> +/*
> + * Machine inter
On Tue, Jul 05, 2011 at 08:07:00PM +0530, ashishj3 wrote:
> The DA9052 is a highly integrated PMIC subsystem with supply domain
> flexibility
> to support wide range of high performance application.
>
> It provides voltage regulators, GPIO controller, Touch Screen, RTC, Battery
> control and othe
On Tue, Jul 05, 2011 at 08:07:00PM +0530, ashishj3 wrote:
> The DA9052 is a highly integrated PMIC subsystem with supply domain
> flexibility
> to support wide range of high performance application.
>
> It provides voltage regulators, GPIO controller, Touch Screen, RTC, Battery
> control and othe
On Wed, Jul 20, 2011 at 03:01:25PM +0800, Shawn Guo wrote:
> On Tue, Jul 19, 2011 at 03:17:00PM +0200, Zygmunt Krynicki wrote:
> > Hello everyone.
> >
> > I was wondering if anyone is using the SATA port on IMX53 loco (aka
> > the quick start). The obvious issue is th
On Tue, Jul 19, 2011 at 03:17:00PM +0200, Zygmunt Krynicki wrote:
> Hello everyone.
>
> I was wondering if anyone is using the SATA port on IMX53 loco (aka
> the quick start). The obvious issue is that of no power to drive the
> hard disk or SSD. Unless you have an eSATA enclosure and an
> appropr
Due to the issue reported with ESDHC_CD_CONTROLLER mode as below,
GPIO mode becomes the best choice for card detection before the
issue gets addressed.
http://article.gmane.org/gmane.linux.ports.arm.kernel/120790
Signed-off-by: Shawn Guo
---
Actually the issue has been fixed with the v3 of the
):
mmc: Replace SDHCI_QUIRK_FORCE_BLK_SZ_2048 with a platform hook.
mmc: Replace SDHCI_QUIRK_NO_MULTIBLOCK with a platform hook.
Shawn Guo (9):
mmc: sdhci: make sdhci-pltfm device drivers self registered
mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
mmc: sdhci: make
On Mon, Jun 13, 2011 at 07:32:15AM -0600, Grant Likely wrote:
[...]
> +About now is a good time to lay out an example. Here is part of the
> +device tree for the NVIDIA Tegra board.
> +
> +/{
> + compatible = "nvidia,harmony", "nvidia,tegra250";
> + #address-cells = <1>;
> + #size-cell
Hi Grant,
On Mon, Jun 13, 2011 at 07:32:15AM -0600, Grant Likely wrote:
[...]
> +Linux board support code calls of_platform_populate(NULL, NULL, NULL)
> +to kick of discovery of devices at the root of the tree. The
> +parameters are all NULL because when starting from the root of the
> +tree, the
On Fri, May 27, 2011 at 04:52:38PM +0800, Barry Song wrote:
> Hi all,
> i am using linaro uboot(u-boot-linaro-stable.git). i have let our
> prima2 board support device tree with some workaround in uboot. two
> problems i have meet:
> 1. device tree without ramdisk
> now uboot used commands like
>
On Thu, May 26, 2011 at 11:37:17AM +0800, Jello huang wrote:
> Dear all,
>
>
> i need to test for the arm platform,but I do not find the git tree of
> powertop on launchpad.net,or the tree is located on linaro.org?
http://git.linaro.org/gitweb?p=tools/powertop.git;a=summary
--
Regards,
Shawn
On Tue, May 24, 2011 at 07:42:43PM -0700, Deepak Saxena wrote:
> Hi all,
>
> The Kernel Working Group is getting ready to release the first of our new
> monthly development snapshot in a few days and we would like folks
> to do some quick sanity boot testing on their boards. Please
> grab or updat
On Wed, May 25, 2011 at 12:59:54PM +0200, Dirk Behme wrote:
> On Wed, May 25, 2011 at 8:31 AM, Shawn Guo wrote:
> > On Tue, May 24, 2011 at 06:40:28PM -0400, James Westby wrote:
> >> On Sat, 14 May 2011 23:45:35 +0200, Jeremiah Foster
> >> wrote:
> >> > It
On Tue, May 24, 2011 at 06:40:28PM -0400, James Westby wrote:
> On Sat, 14 May 2011 23:45:35 +0200, Jeremiah Foster
> wrote:
> > It certainly is technically possible. The git-http-backend file allows
> > one to use http and https as transports. Whoever is the admin for the
> > Linaro git repos wo
Hi Paul,
Since LTP is being used by Validation team, I would really like to
link my effort with your team.
On Mon, May 02, 2011 at 07:30:39AM -0500, Paul Larson wrote:
> http://validation.linaro.org/launch-control/dashboard/test-runs/fccb906e-7301-11e0-816b-2e4070f01206/has
> the results from a r
On Mon, May 02, 2011 at 11:00:48AM +0200, Zygmunt Krynicki wrote:
> W dniu 02.05.2011 10:59, Shawn Guo pisze:
> >I'm drafting the blueprint [1], and need your favors to collect LTP
> >(Linux Test Project [2]) result on boards that Linaro supports with
> >Natty kernel runn
I'm drafting the blueprint [1], and need your favors to collect LTP
(Linux Test Project [2]) result on boards that Linaro supports with
Natty kernel running on.
The example steps of the testing (I did on i.mx51 babbage with Beta-2
linaro-n-developer) are documented on Whiteboard of [1]. Please he
On Fri, Apr 29, 2011 at 10:10:57AM +0200, Arnd Bergmann wrote:
> On Friday 29 April 2011 09:23:23 Shawn Guo wrote:
> >
> > I have one 35MB tarball to share with Linaro folks. It's too big to
> > distribute through email. Is there any infrastructural solution for
>
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