On 1 October 2017 at 13:52, wrote:
> From: Keith Packard
>
> Validate that the leasing API creates leases that allow access to a
> subset of the available resources and that lease revocation works.
These don't test the GET and LIST_LEASES interfaces
At least some basic test coverage for those
On 2 October 2017 at 21:13, Petri Latvala wrote:
> On Sat, Sep 30, 2017 at 12:35:33PM -0700, kei...@keithp.com wrote:
>> From: Keith Packard
>>
>> These ioctls replace drmWaitVBlank and add ns time resolution and
>> 64-bit sequence numbers to comply with the Vulkan API specifications.
>>
>> The t
== Series Details ==
Series: series starting with [1/2] drm/i915: Allow null render state
batchbuffers bigger than one page
URL : https://patchwork.freedesktop.org/series/31614/
State : success
== Summary ==
shard-hswtotal:2482 pass:1347 dwarn:23 dfail:0 fail:9 skip:1103
time:94
On Thursday, September 14, 2017 5:34:24 PM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> tools/aubdump.c | 26 --
> 1 file changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index 788bed13..893ddf93 100644
> -
== Series Details ==
Series: series starting with [1/2] drm/i915: Preallocate our mmu notifier
workequeu to unbreak cpu hotplug deadlock
URL : https://patchwork.freedesktop.org/series/31601/
State : success
== Summary ==
Test gem_userptr_blits:
Subgroup map-fixed-invalidate-overlap-gu
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: 72872c99b6dbc80362965cd30489c849f0663140
commit: 72872c99b6dbc80362965cd30489c849f0663140 [7/7] drm/i915: Check
PIN_NONFAULT overlaps in evict_for_node
config: x86_64-randconfig-x018-201741 (attached as .config)
compiler:
On 10/04/2017 06:50 AM, Michal Wajdeczko wrote:
On Wed, 04 Oct 2017 00:56:38 +0200, Sujaritha Sundaresan
wrote:
The Additional Data Struct (ADS) contains objects that are required by
guc post FW load and are not necessarily submission-only (although
that's
our current only use-case). If i
== Series Details ==
Series: series starting with [1/2] drm/i915: Allow null render state
batchbuffers bigger than one page
URL : https://patchwork.freedesktop.org/series/31614/
State : success
== Summary ==
Series 31614v1 series starting with [1/2] drm/i915: Allow null render state
batchbuf
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: 72872c99b6dbc80362965cd30489c849f0663140
commit: 72872c99b6dbc80362965cd30489c849f0663140 [7/7] drm/i915: Check
PIN_NONFAULT overlaps in evict_for_node
config: x86_64-randconfig-x011-201741 (attached as .config)
compiler:
From: Oscar Mateo
The new batchbuffer for CNL surpasses the 4096 byte mark.
Cc: Mika Kuoppala
Cc: Ben Widawsky
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_gem_render_state.c | 40 +++-
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/driver
Auto generated from IGT containing Oscar's patches:
tools/null_state_gen: Automatically generate the copyright header
tools/null_state_gen: Add GEN10 golden context batch buffer creation
I'm now convinced that the safiest approach is to include
the golden null context.
Apparently not every usersp
On 10/9/2017 11:41 AM, Daniele Ceraolo Spurio wrote:
On 09/10/17 07:52, Michał Winiarski wrote:
We were using first page of kernel context render state for sharing data
with GuC. While it's justified by the fact that those pages are not used
(note, GuC still enforces this layout and refuses to
== Series Details ==
Series: drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put() (rev3)
URL : https://patchwork.freedesktop.org/series/31283/
State : success
== Summary ==
Test kms_setmode:
Subgroup basic:
pass -> FAIL (shard-hsw) fdo
== Series Details ==
Series: igt/gem_workarounds: Test all types of workarounds
URL : https://patchwork.freedesktop.org/series/31612/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
f1e77e83d620f66f98401854a63b93dc4cead880 tests/kms_draw_crc: Skip tests for
On 10/9/2017 1:58 PM, Oscar Mateo wrote:
Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware,
there is no need to save space for them in the list of context workarounds.
> Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
Is it worth mention the commit that cha
== Series Details ==
Series: series starting with [1/2] drm/i915: Reuse normal state readout for
LVDS/DVO fixed mode
URL : https://patchwork.freedesktop.org/series/31599/
State : success
== Summary ==
Test perf:
Subgroup blocking:
pass -> FAIL (shard-hsw) f
== Series Details ==
Series: Refactor HW workaround code
URL : https://patchwork.freedesktop.org/series/31611/
State : warning
== Summary ==
Series 31611v1 Refactor HW workaround code
https://patchwork.freedesktop.org/api/1.0/series/31611/revisions/1/mbox/
Test chamelium:
Subgroup dp-
Quoting Oscar Mateo (2017-10-09 21:58:51)
> Apart from context based workarounds, we can now also test for global
> MMIO and whitelisting ones.
One thing to note here is that using the kernel list still has the
reliance on it being trustworthy and complete. You already noted one w/a
that is applie
== Series Details ==
Series: Fix HDMI as dual display on CNL.
URL : https://patchwork.freedesktop.org/series/31352/
State : warning
== Summary ==
Series 31352v1 Fix HDMI as dual display on CNL.
https://patchwork.freedesktop.org/api/1.0/series/31352/revisions/1/mbox/
Test chamelium:
Su
Quoting Oscar Mateo (2017-10-09 21:58:15)
> Currently, deciding how/where to apply new workarounds is challenging. Often,
> workarounds end up applied incorrectly and get lost under certain
> circumstances
> (e.g. a context switch or a GPU reset). This is a proposal to attempt to
> eliminate some
Quoting Oscar Mateo (2017-10-09 21:58:17)
> This has grown to be a sizable amount of code, so move it to
> its own file before we try to refactor anything. For the moment,
> we are leaving behind the WA BB code and the WAs that get applied
> (incorrectly) in init_clock_gating, but we will deal with
This has grown to be a sizable amount of code, so move it to
its own file before we try to refactor anything. For the moment,
we are leaving behind the WA BB code and the WAs that get applied
(incorrectly) in init_clock_gating, but we will deal with it later.
Signed-off-by: Oscar Mateo
Cc: Chris
By doing this, we can dump these workarounds in debugfs for validation (which,
at the moment, we are only able to do for the contexts WAs).
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.c | 5 +
drivers/gpu/drm/i915/i915_drv.h
Currently, deciding how/where to apply new workarounds is challenging. Often,
workarounds end up applied incorrectly and get lost under certain circumstances
(e.g. a context switch or a GPU reset). This is a proposal to attempt to
eliminate some of this pain, by clarifying the current classificatio
Let's try to make sure that all WAs are applied correctly and survive
resumes, resets, etc... (with some help from a companion i-g-t patch).
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 48 ++---
1 file
Apart from context based workarounds, we can now also test for global
MMIO and whitelisting ones.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
tests/gem_workarounds.c | 194 ++--
1 file changed, 156 insertions(+), 38 deletions(-)
Some WAs touch registers that get saved/restored together with the logical
context.
Make this very explicit by renaming a few things in the code.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 +--
drivers/gpu/drm/i915/i915_drv.
Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware,
there is no need to save space for them in the list of context workarounds.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 8 +---
1 file changed, 1 insertion(+), 7
There are different kind of workarounds (those that modify registers that
live in the context image, those that modify global registers, those that
whitelist registers, etc...) and they have different requirements in terms
of where they are applied and how. Also, by splitting them apart, it should
Same as we have been doing for other types, this allow us to dump
the whole list of workarounds to debugs, for validation purposes.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3
GEN8_CONFIG0 (0xD00) is a protected by a lock (bit 31) which is set by
the BIOS, so there is no way we can enable the three chicken bits
mandated by the WA (the BIOS should be doing it instead).
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_reg.h
Does what it says on the tin (plus a few fixes in some old comments).
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_workarounds.c | 45 -
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm
Since we are trying to put all WA stuff together, do not forget about the BB
WAs.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_workarounds.c | 254
drivers/gpu/drm/i915/i915_workarounds.h | 3 +
drivers/gpu/drm/
I'm not sure why some WAs have historically been applied in init_clock_gating
and some others in the engine setup (GT vs. display? context vs. global
registers?) but it does not look like the best place to apply workarounds:
the name is confusing, it's a display function (even though some GT WAs
al
Quoting Michał Winiarski (2017-10-09 15:52:57)
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 947af576563b..418451755145 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
>
== Series Details ==
Series: drm/i915: Fix eviction when the GGTT is idle but full
URL : https://patchwork.freedesktop.org/series/31592/
State : failure
== Summary ==
Test kms_universal_plane:
Subgroup universal-plane-pipe-A-functional:
pass -> DMESG-WARN (shard-h
On Mon, Oct 9, 2017 at 4:59 AM, Daniel Vetter wrote:
> On Sun, Oct 08, 2017 at 03:43:35PM +0100, Chris Wilson wrote:
>> Quoting Harsha Sharma (2017-10-08 15:04:07)
>> > @@ -624,7 +624,7 @@ static bool intel_fbdev_init_bios(struct drm_device
>> > *dev,
>> > ifbdev->preferred_bpp = fb->base
== Series Details ==
Series: drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put() (rev3)
URL : https://patchwork.freedesktop.org/series/31283/
State : success
== Summary ==
shard-hswtotal:2446 pass:1329 dwarn:6 dfail:0 fail:8 skip:1103
time:10077s
== Logs
== Series Details ==
Series: series starting with [1/2] tests/kms_setmode: Request the intiial vbl
count with RELATIVE instead of ABSOLUTE
URL : https://patchwork.freedesktop.org/series/31600/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
f1e77e83d620f66f
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@intel.com]
> Sent: Monday, October 09, 2017 5:30 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: jani.nik...@intel.com; Deucher, Alexander; Thierry Reding; Rob Clark;
> Sean Paul; Manasi Navare; dri-de...@lists.freedesktop.org
> Su
== Series Details ==
Series: series starting with [1/2] drm/i915: Preallocate our mmu notifier
workequeu to unbreak cpu hotplug deadlock
URL : https://patchwork.freedesktop.org/series/31601/
State : success
== Summary ==
Series 31601v1 series starting with [1/2] drm/i915: Preallocate our mmu
On 09/10/17 07:52, Michał Winiarski wrote:
We were using first page of kernel context render state for sharing data
with GuC. While it's justified by the fact that those pages are not used
(note, GuC still enforces this layout and refuses to work if we remove
the extra page in front), it's also
>-Original Message-
>From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com]
>Sent: Thursday, October 5, 2017 11:30 PM
>To: Srivatsa, Anusha ; Tvrtko Ursulin
>; intel-gfx@lists.freedesktop.org
>Cc: Daniel Vetter ; Sundaresan, Sujaritha
>
>Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i9
== Series Details ==
Series: drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put() (rev3)
URL : https://patchwork.freedesktop.org/series/31283/
State : success
== Summary ==
Series 31283v3 drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put()
https:/
>-Original Message-
>From: Hiler, Arkadiusz
>Sent: Wednesday, October 4, 2017 11:51 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Srivatsa, Anusha
>Subject: Re: [Intel-gfx] ✓ Fi.CI.BAT: success for igt/kms_rotation_crc: Add
>horizontal flip subtest.
>
>On Thu, Oct 05, 2017 at 01:08:56AM +
On Tue, Sep 19, 2017 at 10:44:09PM +0300, Juha-Pekka Heikkila wrote:
> This is to use clipped y coordinate here. I left get_crtc_fence_y_offset()
> function itself in place as oneliner to maintain comment above it why this
> is done.
>
> Signed-off-by: Juha-Pekka Heikkila
> ---
> drivers/gpu/drm
On Tue, Sep 19, 2017 at 10:44:08PM +0300, Juha-Pekka Heikkila wrote:
> Move u32 dspaddr_offset from struct intel_crtc member into local
> variable in i9xx_update_primary_plane()
I would reorder the series so that this is done before you eliminate the
SKL primary plane functions. Would make it more
On Tue, Sep 19, 2017 at 10:44:05PM +0300, Juha-Pekka Heikkila wrote:
> Signed-off-by: Juha-Pekka Heikkila
> ---
> drivers/gpu/drm/i915/i915_drv.h | 8
> drivers/gpu/drm/i915/intel_display.c | 10 ++
> drivers/gpu/drm/i915/intel_drv.h | 2 --
> drivers/gpu/drm/i915/inte
== Series Details ==
Series: series starting with [1/2] drm/i915: Reuse normal state readout for
LVDS/DVO fixed mode
URL : https://patchwork.freedesktop.org/series/31599/
State : success
== Summary ==
Series 31599v1 series starting with [1/2] drm/i915: Reuse normal state readout
for LVDS/DVO
On Mon, Oct 09, 2017 at 05:24:29PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2017-10-09 17:18:17)
> > On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> > > Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > > > From: Ville Syrjälä
> > > >
> > > > Eliminate the
On Thu, Sep 28, 2017 at 11:21:57AM +0300, Jani Nikula wrote:
> While technically CHV isn't DDI, we do look at the VBT based DDI port
> info for HDMI DDC pin and DP AUX channel. (We call these "alternate",
> but they're really just something that aren't platform defaults.)
>
> In commit e4ab73a1329
4.14-rc1 gained the fancy new cross-release support in lockdep, which
seems to have uncovered a few more rules about what is allowed and
isn't.
This one here seems to indicate that allocating a work-queue while
holding mmap_sem is a no-go, so let's try to preallocate it.
Of course another way to
stop_machine is not really a locking primitive we should use, except
when the hw folks tell us the hw is broken and that's the only way to
work around it.
This patch tries to address the locking abuse of stop_machine() from
commit 20e4933c478a1ca694b38fa4ac44d99e659941f5
Author: Chris Wilson
Dat
== Series Details ==
Series: drm/i915: s/sg_mask/sg_page_sizes/
URL : https://patchwork.freedesktop.org/series/31585/
State : success
== Summary ==
Test perf:
Subgroup polling:
fail -> PASS (shard-hsw) fdo#102252
Test kms_cursor_legacy:
Subgroup curs
== Series Details ==
Series: Preemption with GuC, second try (rev2)
URL : https://patchwork.freedesktop.org/series/31591/
State : failure
== Summary ==
Series 31591v2 Preemption with GuC, second try
https://patchwork.freedesktop.org/api/1.0/series/31591/revisions/2/mbox/
Test gem_sync:
From: Ville Syrjälä
Asking for the initial vblank count by specifying and absolute vblank count of 0
doesn't make much sense. Switch to a relative query instead.
Signed-off-by: Ville Syrjälä
---
tests/kms_flip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/kms_flip
From: Ville Syrjälä
Asking for the initial vblank count by specifying and absolute vblank count of 0
doesn't make much sense. Switch to a relative query instead.
Signed-off-by: Ville Syrjälä
---
tests/kms_setmode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/kms_s
Quoting Ville Syrjälä (2017-10-09 17:18:17)
> On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> > Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > > From: Ville Syrjälä
> > >
> > > Eliminate the duplicate code for pipe timing readout in
> > > intel_crtc_mode_get() by
From: Ville Syrjälä
With intel_encoder_current_mode() using the normal state readout code it
actually works on PCH platforms as well. So let's nuke the PCH check from
intel_lvds_init(). I suppose there aren't any machines that actually
need this, but at least we get to eliminate a few lines of co
From: Ville Syrjälä
Reuse the normal state readout code to get the fixed mode for LVDS/DVO
encoders. This removes some partially duplicated state readout code
from LVDS/DVO encoders. The duplicated code wasn't actually even
populating the negative h/vsync flags, leading to possible state checker
From: Michał Winiarski
Also:
Revert "drm/i915/guc: Assert that we switch between known ggtt->invalidate
functions"
This reverts commit 04f7b24eccdfae680a36e9825fe0d61dcd5ed528.
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
drivers/gpu/drm/i915/i915_params.h | 4 ++--
2 files changed,
On 09/10/17 07:52, Michał Winiarski wrote:
Since it's a two-step process, we can have a cleaner error handling in
the caller if we do the allocations in a helper.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
Cc: Jeff McGee
Cc: Michal Wajdeczko
Cc: Oscar Mate
On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > From: Ville Syrjälä
> >
> > Eliminate the duplicate code for pipe timing readout in
> > intel_crtc_mode_get() by using the functions we use for the normal state
> > read
Quoting Chris Wilson (2017-10-09 15:57:28)
> @@ -190,19 +191,33 @@ i915_gem_evict_something(struct i915_address_space *vm,
> if (!i915_is_ggtt(vm) || flags & PIN_NONBLOCK)
> return -ENOSPC;
>
> + /*
> +* Not everything in the GGTT is tracked via VMA using
> +
== Series Details ==
Series: Preemption with GuC, second try
URL : https://patchwork.freedesktop.org/series/31591/
State : warning
== Summary ==
Series 31591v1 Preemption with GuC, second try
https://patchwork.freedesktop.org/api/1.0/series/31591/revisions/1/mbox/
Test debugfs_test:
S
== Series Details ==
Series: drm/i915: Fix eviction when the GGTT is idle but full
URL : https://patchwork.freedesktop.org/series/31592/
State : success
== Summary ==
Series 31592v1 drm/i915: Fix eviction when the GGTT is idle but full
https://patchwork.freedesktop.org/api/1.0/series/31592/rev
Quoting Michał Winiarski (2017-10-09 15:52:56)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 9a7aec2c1771..4f9f12e3c7f6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -354,7 +354,7 @@ static void unwind_w
On Sat, Oct 07, 2017 at 09:33:09AM +0100, Chris Wilson wrote:
> Quoting Sagar Arun Kamble (2017-10-07 08:07:23)
> > With GuC based SLPC, frequency control will be moved to GuC and Host will
> > continue to control RC6 and LLC ring frequency setup. This needs separate
> > handling of RPS, RC6 and LL
We also want to support preemption with GuC submission backend.
In order to do that, we need to remember the priority, like we do on
execlists path.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
Cc: Jeff McGee
Cc: Joonas Lahtinen
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_guc
Pretty similar to what we have on execlists.
We're reusing most of the GEM code, however, due to GuC quirks we need a
couple of extra bits.
Preemption is implemented as GuC action, and actions can be pretty slow.
Because of that, we're using a mutex to serialize them. Since we're
requesting preempt
Also:
Revert "drm/i915/guc: Assert that we switch between known ggtt->invalidate
functions"
This reverts commit 04f7b24eccdfae680a36e9825fe0d61dcd5ed528.
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
drivers/gpu/drm/i915/i915_params.h | 4 ++--
2 files changed, 4 insertions(+), 8 deleti
We would also like to make use of execlist_cancel_port_requests and
unwind_incomplete_requests in GuC preemption backend.
Let's rename the functions to use the correct prefixes, so that we can
simply add the declarations in the following patch.
Similar thing for applies for can_preempt, except we'r
We shouldn't inspect ELSP context status (or any other bits depending on
specific submission backend) when using GuC submission.
Let's use another piece of HWSP for preempt context, to write its bit of
information, meaning that preemption has finished, and hardware is now
idle.
Signed-off-by: Mich
Let's separate the "emit" part from touching any internal structures,
this way we can have a generic "emit coherent GGTT write" function.
We would like to reuse this functionality for emitting HWSP write, to
confirm that preempt-to-idle has finished.
v2: Reorder args to match emit_pipe_control, s/
In the full-ppgtt world, we can fill the GGTT full of context objects.
These context objects are currently implicitly tracked by the requests
that pin them i.e. they are only unpinned when the request is completed
and retired, but we do not have the link from the vma to the request
(anymore). In or
We're using a special preempt context for HW to preempt into. We don't
want to emit any requests there, but we still need to wrap this context
into a valid GuC work item.
Let's cleanup the functions operating on GuC work items.
We can extract guc_request_add - responsible for adding GuC work item a
From: Dave Gordon
This second client is created with priority KMD_HIGH, and marked
as preemptive. This will allow us to request preemption using GuC actions.
v2: Extract clients creation into a helper, debugfs fixups. (Michał)
Recreate doorbell on init. (Daniele)
Move clients into an array.
Sig
We're using GuC action to request preemption. However, after requesting
preemption we need to wait for GuC to finish its own post-processing
before we start submitting our requests. Firmware is using shared
context to report its status.
Let's update GuC firmware interface with those new definitions
Now that we're handling request resubmission the same way as regular
submission (from the tasklet), we can move GuC initialization earlier,
before restarting the engines. This way, we're no longer being in the
state of flux during engine restart - we're already in user requested
submission mode.
S
We were using first page of kernel context render state for sharing data
with GuC. While it's justified by the fact that those pages are not used
(note, GuC still enforces this layout and refuses to work if we remove
the extra page in front), it's also confusing (why are we using this
particular pa
Since it's a two-step process, we can have a cleaner error handling in
the caller if we do the allocations in a helper.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
Cc: Jeff McGee
Cc: Michal Wajdeczko
Cc: Oscar Mateo
---
drivers/gpu/drm/i915/i915_guc_submissio
I've included most of the review feedback, some of which caused additional
patches to appear. We're now using a separate object for GuC shared data (while
I was there I also added cleanup to guc stage desc pool creation). Since I
needed to iterate over clients in one additional place, I've converte
== Series Details ==
Series: drm/i915/cnl: Symmetric scalers for each pipe
URL : https://patchwork.freedesktop.org/series/31589/
State : warning
== Summary ==
Series 31589v1 drm/i915/cnl: Symmetric scalers for each pipe
https://patchwork.freedesktop.org/api/1.0/series/31589/revisions/1/mbox/
Quoting Joonas Lahtinen (2017-10-09 14:00:56)
> On Mon, 2017-10-09 at 12:00 +0100, Matthew Auld wrote:
> > It's a little unclear what the sg_mask actually is, so prefer the more
> > meaningful name of sg_page_sizes.
> >
> > Suggested-by: Joonas Lahtinen
> > Signed-off-by: Matthew Auld
> > Cc: Jo
== Series Details ==
Series: drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put() (rev3)
URL : https://patchwork.freedesktop.org/series/31283/
State : warning
== Summary ==
Series 31283v3 drm/i915: Replace *_reference/unreference() or *_ref/unref with
_get/put()
https:/
Quoting Joonas Lahtinen (2017-10-09 14:36:27)
> Title: s/thresh/thrash/
>
> On Wed, 2017-08-23 at 13:55 +0100, Chris Wilson wrote:
> > At the moment, the verify tests use an extremely brutal write-read of
> > every dword, degrading performance to UC. If we break those up into
> > cachelines, we ca
Quoting Patchwork (2017-10-09 11:16:29)
> == Series Details ==
>
> Series: series starting with [1/7] drm/i915: Pin fence for iomap
> URL : https://patchwork.freedesktop.org/series/31575/
> State : success
>
> == Summary ==
>
> Test kms_setmode:
> Subgroup basic:
> fail
== Series Details ==
Series: series starting with [1/3] drm/dp: WARN about invalid/unknown link
rates and bw codes
URL : https://patchwork.freedesktop.org/series/31579/
State : failure
== Summary ==
Test kms_atomic_transition:
Subgroup plane-all-transition-nonblocking:
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: Make i915_engine_info pretty
printer to standalone
URL : https://patchwork.freedesktop.org/series/31586/
State : warning
== Summary ==
Series 31586v1 series starting with [v2,1/5] drm/i915: Make i915_engine_info
pretty prin
Quoting Joonas Lahtinen (2017-10-09 13:17:24)
> On Mon, 2017-10-09 at 09:43 +0100, Chris Wilson wrote:
> > If the caller says that he doesn't want to evict any other faulting
> > vma, honour that flag. The logic was used in evict_something, but not
> > the more specific evict_for_node, now being us
Title: s/thresh/thrash/
On Wed, 2017-08-23 at 13:55 +0100, Chris Wilson wrote:
> At the moment, the verify tests use an extremely brutal write-read of
> every dword, degrading performance to UC. If we break those up into
> cachelines, we can do a wcb write/read at a time instead, roughly 8x
> fast
On Thu, Oct 05, 2017 at 06:38:41PM -0300, Paulo Zanoni wrote:
> Don't call it when we can do like the other functions and just look at
> port->port. Also rename the intel_digital_port variable to make it
> look like the other functions.
>
> My main goal here is to prevent the copy-pasters from pro
On 9 October 2017 at 13:07, Ville Syrjälä wrote:
> On Mon, Oct 02, 2017 at 03:31:44PM +0300, Joonas Lahtinen wrote:
>> On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote:
>> > When SW enables the use of 2M/1G pages, it must disable the GTT cache.
>> >
>> > v2: don't disable for Cherryview which
On Mon, 2017-10-09 at 10:20 +0100, Chris Wilson wrote:
> We only apply the hugepage PD redirection inside the ppGTT, so during
> i915_vma_insert() we want to exclude the GGTT from the additional
> alignment constraints (thereby avoiding the extra GTT pressure from
> fragmentation). Add an assert to
On Mon, 2017-10-09 at 12:00 +0100, Matthew Auld wrote:
> It's a little unclear what the sg_mask actually is, so prefer the more
> meaningful name of sg_page_sizes.
>
> Suggested-by: Joonas Lahtinen
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> @@ -2489,16 +2489,16
== Series Details ==
Series: drm/i915: s/sg_mask/sg_page_sizes/
URL : https://patchwork.freedesktop.org/series/31585/
State : success
== Summary ==
Series 31585v1 drm/i915: s/sg_mask/sg_page_sizes/
https://patchwork.freedesktop.org/api/1.0/series/31585/revisions/1/mbox/
Test kms_pipe_crc_basi
On Fri, 06 Oct 2017, Paulo Zanoni wrote:
> Em Qui, 2017-10-05 às 14:49 -0700, Rodrigo Vivi escreveu:
>> On Thu, Oct 05, 2017 at 09:38:41PM +, Paulo Zanoni wrote:
>> > Don't call it when we can do like the other functions and just look
>> > at
>> > port->port. Also rename the intel_digital_port
On Thu, 05 Oct 2017, Paulo Zanoni wrote:
> Don't call it when we can do like the other functions and just look at
> port->port. Also rename the intel_digital_port variable to make it
> look like the other functions.
I guess the question is, *which* other functions. A quick rough grep
gives me:
$
On Mon, 2017-10-09 at 09:44 +0100, Chris Wilson wrote:
> Currently, we reject attempting to pin a large bo into the mappable
> aperture, but only after trying to create the vma. Under debug kernels,
> repeatedly creating and freeing that vma for an oversized bo consumes
> one-third of the runtime f
For Cannonlake the number of scalers for each pipe is 2. Let's increase
the number of scalers for pipe C.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_device_info.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/dr
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