On Wed, 10 Nov 2021, Martin Sebor wrote:
> On 11/10/21 3:09 AM, Richard Biener via Gcc-patches wrote:
> > This XFAILs the bogus diagnostic test and rectifies the expectation
> > on the optimization.
> >
> > Tested on x86_64-unknown-linux-gnu, pushed.
> >
> > 2021-11-10 Richard Biener
> >
> >
Hi!
Bootstrapped/regtested now successfully on x86_64-linux and i686-linux,
verified the
struct S { int e; int a : 1, b : 7, c : 8, d : 16; } s;
struct T { int a : 1, b : 7; long long c : 8; int d : 16; } t;
int
main ()
{
s.c = 0x55;
s.d = 0x;
t.c = 0x55;
t.d = 0x;
s.e++;
}
test
This removes now useless wrappers around get_immediate_dominator.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-11-11 Richard Biener
* cfganal.c (find_pdom): Remove.
(control_dependences::find_control_dependence): Remove
special-casing of entry bloc
On 11/10/21 18:18, Richard Sandiford wrote:
Martin Liška writes:
On 11/8/21 11:43, Richard Sandiford via Gcc-patches wrote:
|Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?|
I think the patch causes the following on x86_64-linux-gnu:
FAIL: gfortran.dg/inline_matmul_17.f90
On Wednesday, 8 September 2021 15:49:27 CET Matthias Kretz wrote:
> On Wednesday, 8 September 2021 15:44:28 CEST Jason Merrill wrote:
> > On 9/8/21 5:37 AM, Matthias Kretz wrote:
> > > On Tuesday, 7 September 2021 19:36:22 CEST Jason Merrill wrote:
> > >>> case PAREN_EXPR:
> > >>> - RETURN (fi
On Thu, 11 Nov 2021, Jakub Jelinek wrote:
> Hi!
>
> Bootstrapped/regtested now successfully on x86_64-linux and i686-linux,
> verified the
> struct S { int e; int a : 1, b : 7, c : 8, d : 16; } s;
> struct T { int a : 1, b : 7; long long c : 8; int d : 16; } t;
>
> int
> main ()
> {
> s.c = 0x
Hi.
CPP/CPPFLAGS were changed by commit
84401ce5fb4ecab55decb472b168100e7593e01f. That commit uses CPP as a
default for CPP_FOR_BUILD. Unless CPP is defined, GNU make defaults CPP
as `$(CC) -E'. Given the context, this is now incorrect, since
CC_FOR_BUILD should be used.
Fixes PR103011.
Hi!
In OpenMP 5.1, num_teams clause can accept either one expression as before,
but it in that case changed meaning, rather than create <= expression
teams it is now create == expression teams. Or it accepts two expressions
separated by :, with the meaning that the first is low bound and second u
On Tue, 9 Nov 2021 at 20:27, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > On Thu, 4 Nov 2021 at 14:19, Richard Sandiford
> > wrote:
> >>
> >> Prathamesh Kulkarni writes:
> >> > On Wed, 20 Oct 2021 at 15:05, Richard Sandiford
> >> > wrote:
> >> >>
> >> >> Prathamesh Kulkarni wr
For integer vector division we only checked for all zero vector
constants rather than checking whether any element in the constant
vector is zero.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-11-11 Richard Biener
PR middle-end/103181
* tree-eh.c (operation
> > >
> > > I think the patch causes the following on x86_64-linux-gnu:
> > > FAIL: gfortran.dg/inline_matmul_17.f90 -O scan-tree-dump-times
> > > optimized "matmul_r4" 2
> >
> > I get that failure even with d70ef65692f (from before the patches
> > I committed today).
>
> Sorry, you are rig
Hi,
This patch declares type-qualified builtins and uses them for MLA/MLS
Neon intrinsics that operate on unsigned types. This eliminates lots of
casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
On Thu, Nov 11, 2021 at 10:45 AM Jan Hubicka via Gcc-patches
wrote:
>
> > > >
> > > > I think the patch causes the following on x86_64-linux-gnu:
> > > > FAIL: gfortran.dg/inline_matmul_17.f90 -O scan-tree-dump-times
> > > > optimized "matmul_r4" 2
> > >
> > > I get that failure even with d70
Hi,
This patch declares poly type-qualified builtins and uses them for
PMUL[L] Neon intrinsics. This removes the need for casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-11-08 Jonathan Wri
Hi,
This patch declares unsigned type-qualified builtins and uses them for
XTN[2] Neon intrinsics. This removes the need for casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-11-08 Jonathan
Jonathan Wright writes:
> Hi,
>
> This patch declares type-qualified builtins and uses them for MLA/MLS
> Neon intrinsics that operate on unsigned types. This eliminates lots of
> casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master
Jonathan Wright writes:
> Hi,
>
> This patch declares poly type-qualified builtins and uses them for
> PMUL[L] Neon intrinsics. This removes the need for casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
Hi,
Thus patch declares unsigned type-qualified builtins and uses them for
[R]SHRN[2] Neon intrinsics. This removes the need for casts in
arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-11-08 Jonat
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them for
> XTN[2] Neon intrinsics. This removes the need for casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonatha
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement widening-add Neon intrinsics. This removes the need for
many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement widening-subtract Neon intrinsics. This removes the need
for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLo
Jonathan Wright writes:
> Hi,
>
> Thus patch declares unsigned type-qualified builtins and uses them for
> [R]SHRN[2] Neon intrinsics. This removes the need for casts in
> arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> J
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement (rounding) halving-add Neon intrinsics. This removes the
need for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/Cha
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement halving-subtract Neon intrinsics. This removes the need for
many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement (rounding) halving-narrowing-add Neon intrinsics. This
removes the need for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
--
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement widening-subtract Neon intrinsics. This removes the need
> for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for ma
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement (rounding) halving-add Neon intrinsics. This removes the
> need for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok f
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement (rounding) halving-narrowing-subtract Neon intrinsics. This
removes the need for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonatha
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement halving-subtract Neon intrinsics. This removes the need for
> many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for mas
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement the pairwise addition Neon intrinsics. This removes the need
for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/Chan
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement (rounding) halving-narrowing-add Neon intrinsics. This
> removes the need for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues
On Wed, Nov 10, 2021 at 1:44 PM Richard Sandiford via Gcc-patches
wrote:
>
> This patch adds conditional forms of FMAX and FMIN, following
> the pattern for existing conditional binary functions.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
OK.
Thanks,
Richard.
> Richar
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement the vector reduction Neon intrinsics. This removes the need
for many casts in arm_neon.h.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/Chang
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement (rounding) halving-narrowing-subtract Neon intrinsics. This
> removes the need for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> i
On Thu, Nov 11, 2021 at 8:30 AM Richard Biener
wrote:
>
> On Wed, Nov 10, 2021 at 9:42 PM Jeff Law wrote:
> >
> >
> >
> > On 11/10/2021 11:20 AM, Aldy Hernandez via Gcc-patches wrote:
> > > As discussed in the PR, the loop header copying pass avoids doing so
> > > when optimizing for size. Howev
Hi,
This patch declares unsigned and polynomial type-qualified builtins and
uses them to implement the LD1/ST1 Neon intrinsics. This removes the
need for many casts in arm_neon.h.
The new type-qualified builtins are also lowered to gimple - as the
unqualified builtins are already.
Regression tes
Hi,
This patch declares unsigned and polynomial type-qualified builtins for
vcombine_* Neon intrinsics. Using these builtins removes the need for
many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeL
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement the pairwise addition Neon intrinsics. This removes the need
> for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok fo
Hi,
This patch declares unsigned and polynomial type-qualified builtins for
vget_low_*/vget_high_* Neon intrinsics. Using these builtins removes
the need for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement the vector reduction Neon intrinsics. This removes the need
> for many casts in arm_neon.h.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
> issues.
>
> Ok for
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned and polynomial type-qualified builtins and
> uses them to implement the LD1/ST1 Neon intrinsics. This removes the
> need for many casts in arm_neon.h.
>
> The new type-qualified builtins are also lowered to gimple - as the
> unqualifie
On Wed, Nov 10, 2021 at 1:46 PM Richard Sandiford via Gcc-patches
wrote:
>
> code_helper and gimple_match_op seem like generally useful ways
> of summing up a gimple_assign or gimple_call (or gimple_cond).
> This patch adds a gimple_extract_op function that can be used
> for that.
>
> Tested on aa
On Wed, Nov 10, 2021 at 1:47 PM Richard Sandiford via Gcc-patches
wrote:
>
> code_helper provides conversions to tree_code and combined_fn.
> Now that the codebase is C++11, we can mark these conversions as
> explicit. This avoids accidentally using code_helpers with
> functions that take tree_co
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned and polynomial type-qualified builtins for
> vcombine_* Neon intrinsics. Using these builtins removes the need for
> many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for m
On Wed, Nov 10, 2021 at 1:51 PM Richard Sandiford via Gcc-patches
wrote:
>
> Mark IFN_COMPLEX_MUL as commutative.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
OK
> Richard
>
>
> gcc/
> * internal-fn.c (commutative_binary_fn_p): Handle IFN_COMPLEX_MUL.
>
> gcc/tes
Jonathan Wright writes:
> Hi,
>
> This patch declares unsigned and polynomial type-qualified builtins for
> vget_low_*/vget_high_* Neon intrinsics. Using these builtins removes
> the need for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
On Wed, Nov 10, 2021 at 1:50 PM Richard Sandiford via Gcc-patches
wrote:
>
> This patch uses information about internal functions to canonicalize
> the argument order of calls.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
OK. Note the gimple_resimplifyN functions also ca
On Thu, Nov 11, 2021 at 11:33 AM Aldy Hernandez wrote:
>
> On Thu, Nov 11, 2021 at 8:30 AM Richard Biener
> wrote:
> >
> > On Wed, Nov 10, 2021 at 9:42 PM Jeff Law wrote:
> > >
> > >
> > >
> > > On 11/10/2021 11:20 AM, Aldy Hernandez via Gcc-patches wrote:
> > > > As discussed in the PR, the loo
on 2021/11/10 下午6:03, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Nov 10, 2021 at 05:39:27PM +0800, Kewen.Lin wrote:
>> @@ -27779,10 +27779,10 @@ Enable/disable the @var{__float128} keyword for
>> IEEE 128-bit floating point
>> and use either software emulation for IEEE 128-bit floating point or
On Wed, Nov 10, 2021 at 1:43 PM Jan Hubicka via Gcc-patches
wrote:
>
> Hi,
> this patch implements DSE using modref summaries: if function has no side
> effects
> besides storing to memory pointed to by its argument and if we can prove
> those stores
> to be dead, we can optimize out. So we hand
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/frv/frv.md (*abssi2_internal, *minmax_
Hi,
This trivial patch series is the secondary product from the previous
investigation to see how many define_insn_and_split cases where
split_condition isn't applied on top of condition for define_insn
part and doesn't contain it, when there were some discussions on
whether we should warn for emp
This patch is to fix one non-robust split condition, to make
it applied on top of the corresponding condition for define_insn
part, otherwise the splitting could perform unexpectedly.
gcc/ChangeLog:
* config/rx/rx.md (cstoresf4): Fix split condition.
---
gcc/config/rx/rx.md | 2 +-
1 fil
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/m32c/cond.md (stzx_reversed_, movhicc_
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/s390/s390.md (*cstorecc_z13): Fix spli
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/v850/v850.md (cbranchsf4, cbranchdf4,
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/xtensa/xtensa.md (movdi_internal, movd
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/visium/visium.md (*add3_insn, *addsi3_
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/alpha/alpha.md (*movtf_internal, *movt
This patch is to fix one non-robust split condition, to make
it applied on top of the corresponding condition for define_insn
part, otherwise the splitting could perform unexpectedly.
gcc/ChangeLog:
* config/arm/arm.md (*minmax_arithsi_non_canon): Fix split condition.
---
gcc/config/arm/
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/bfin/bfin.md (movdi_insn, movdf_insn):
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/ia64/vect.md (*vec_extractv2sf_0_le, *
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/i386/i386.md (*add3_doubleword, *addv4
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/mips/mips.md (*udivmod4, udivmod4_mips
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/sh/sh.md (call_pcrel, call_value_pcrel
This patch is to fix some non-robust split conditions in some
define_insn_and_splits, to make each of them applied on top of
the corresponding condition for define_insn part, otherwise the
splitting could perform unexpectedly.
gcc/ChangeLog:
* config/csky/csky.md (*cskyv2_adddi3, *ck801_a
> > + /* Unlike alias oracle we can not skip subtrees based on TBAA check.
> > + Count the size of the whole tree to verify that we will not need too
> > many
> > + tests. */
> > + FOR_EACH_VEC_SAFE_ELT (summary->stores->bases, i, base_node)
> > +FOR_EACH_VEC_SAFE_ELT (base_node->re
On Thu, Nov 11, 2021 at 1:07 PM Jan Hubicka wrote:
>
> > > + /* Unlike alias oracle we can not skip subtrees based on TBAA check.
> > > + Count the size of the whole tree to verify that we will not need
> > > too many
> > > + tests. */
> > > + FOR_EACH_VEC_SAFE_ELT (summary->stores->ba
Hi,
>
> No, I think if it turns out useful then we want a way to have such ref
> represented by an ao_ref. Note that when we come from a
> ref tree we know handled-components only will increase offset,
> only the base MEM_REF can contain a pointer subtraction (but
> the result of that is the base
Hi,
This patch enables optimization of stores that are killed by calls.
Modref summary is extended by array containing list of access ranges, relative
to function parameters, that are known to be killed by the function.
This array is collected during local analysis and optimized (so separate
stores
On Tue, Nov 9, 2021 at 8:50 AM Xi Ruoyao via Gcc-patches
wrote:
>
> POSIX says:
>
> On some implementations, if buf is a null pointer, getcwd() may obtain
> size bytes of memory using malloc(). In this case, the pointer returned
> by getcwd() may be used as the argument in a subsequent
On Wed, Nov 10, 2021 at 03:28:18PM -0600, Bill Schmidt wrote:
> On 11/10/21 2:33 AM, Segher Boessenkool wrote:
> > On Tue, Nov 09, 2021 at 03:46:54PM -0600, Bill Schmidt wrote:
> >>* config/rs6000/rs6000-builtin-new.def (CMPB): Flag as no32bit.
> >>(BPERMD): Flag as 32bit.
So, change this
Hi!
On 2021-10-18T15:03:08+0200, Jakub Jelinek via Gcc-patches
wrote:
> On Fri, Oct 15, 2021 at 12:26:34PM -0700, sunil.k.pandey wrote:
>> 4764049dd620affcd3e2658dc7f03a6616370a29 is the first bad commit
>> commit 4764049dd620affcd3e2658dc7f03a6616370a29
>> Author: Jakub Jelinek
>> Date: Fri
Hi Jonathan,
> -Original Message-
> From: Jonathan Wright
> Sent: Thursday, November 11, 2021 10:18 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Sandiford ; Kyrylo Tkachov
>
> Subject: [PATCH] aarch64: Use type-qualified builtins for UADD[LW][2] Neon
> intrinsics
>
> Hi,
>
> This pat
Hi!
When thinking about GOMP_teams3, I've realized that using global variables
for the values returned by omp_get_num_teams()/omp_get_team_num() calls
is incorrect even with our right now dumb way of implementing host teams.
The problems are two, one is if host teams is used from multiple pthread_
On Thu, Nov 11, 2021 at 1:42 PM Jan Hubicka wrote:
>
> Hi,
> >
> > No, I think if it turns out useful then we want a way to have such ref
> > represented by an ao_ref. Note that when we come from a
> > ref tree we know handled-components only will increase offset,
> > only the base MEM_REF can co
Ah yes that particular test checks the vector code.
I see that the function wasn't vectorized but that the scalar replacement was
done.
_15 = _4 > 0;
So the test is checking if (-x >> bitsize-1) gets optimized to -(x > 0)
I see that the replacement was made on the scalar correctly so I will
> > Hmm, I could try to do this, but possibly incrementally?
>
> You mean handle a &decl argument specially for unknown param offset?
> Yeah, I guess so.
I think it is also pointer that was allocated and is going to be
freed...
>
> > Basically I want to have
> >
> > foo (&decl)
> > decl = {}
> >
Hi,
this patch fixes ipa-pure-const handling of noreturn flags. It is not
safe to set it for interposable symbols and we should also set it for
aliases (just like we do for other flags). This patch merely copies other
flag handling and implements it here.
Bootstrapped/regtested x86_64-linux, wil
Hi,
We make self recursive functions as looping of fear of endless recursion.
This is done correctly for local pure/const and for non-trivial SCCs in
callgraph, but for trivial SCCs we miss the flag.
I think it is bad decision since infinite recursion will run out of stack,
but changing it upsets
Hi!
On Wed, Nov 10, 2021 at 06:59:23PM -0300, Raphael Moreira Zinsly wrote:
> At the end of the backtrace stream _Unwind_Find_FDE() may not be able
> to find the frame unwind info and will later call the backtrace fallback
> instead of finishing. This occurs when using an old libc on ppc64 due to
The following splits loop header copying into an analysis phase
that uses ranger and a transform phase that can do without to avoid
running ranger on IL that has SSA form not updated.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-11-11 Richard Biener
PR tree-optimi
The RISC-V Zbb extension adds an XLEN (i.e. SImode for rv32, DImode
for rv64) bswap instruction (rev8). While, with the current master,
SImode is synthesized correctly from DImode, HImode is not.
This change adds an appropriate expansion for a HImode bswap, if a
wider bswap is available.
Without
This series provides assorted improvements for the RISC-V Zb[abcs]
support collected over the last year and a half and forward-ported to
the recently merged upstream support for the Zb[abcs] extensions.
Improvements include:
- synthesis of HImode bswap from SImode/DImode rev8
- cost-model chan
The BSWAP operation is not handled in rtx_costs. Add it.
gcc/ChangeLog:
* config/riscv/riscv.c (rtx_costs): Add BSWAP.
Signed-off-by: Philipp Tomsich
---
gcc/config/riscv/riscv.c | 8
1 file changed, 8 insertions(+)
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/ri
The strength-reduction implementation in expmed.c will assess the
profitability of using shift-and-add using a RTL expression that wraps
a MULT (with a power-of-2) in a PLUS. Unless the RISC-V rtx_costs
function recognizes this as expressing a sh[123]add instruction, we
will return an inflated cos
The SINGLE_BIT_MASK_OPERAND() is overly restrictive, triggering for
bits above 31 only (to side-step any issues with the negative SImode
value 0x8000). This moves the special handling of this SImode
value (i.e. the check for -2147483648) to riscv.c and relaxes the
SINGLE_BIT_MASK_OPERAND() tes
This change improves rotate instructions (motivated by a review of the
code generated for OpenSSL): rotate-left by a constant are synthesized
using a rotate-right-immediate to avoid putting the shift-amount into
a temporary; to do so, we allow either a register or an immediate for
the expansion of
Consider creating a polarity-reversed mask from a set-bit (i.e., if
the bit is set, produce all-ones; otherwise: all-zeros). Using Zbb,
this can be expressed as bexti, followed by an addi of minus-one. To
enable the combiner to discover this opportunity, we need to split the
canonical expression
As a basis for optimized string functions (e.g., the by-pieces
implementations), we need orc.b available. This adds orc.b as an
unspec, so we can expand to it.
gcc/ChangeLog:
* config/riscv/bitmanip.md (orcb2): Add orc.b as an unspec.
* config/riscv/riscv.md: Add UNSPEC_ORC_B.
S
While min/minu/max/maxu instructions are provided for XLEN only, these
can safely operate on GPRs (i.e. SImode or DImode for RV64): SImode is
always sign-extended, which ensures that the XLEN-wide instructions
can be used for signed and unsigned comparisons on SImode yielding a
correct ordering of
Hi Segher,
On 11/11/2021 10:43, Segher Boessenkool wrote:
Hi!
On Wed, Nov 10, 2021 at 06:59:23PM -0300, Raphael Moreira Zinsly wrote:
At the end of the backtrace stream _Unwind_Find_FDE() may not be able
to find the frame unwind info and will later call the backtrace fallback
instead of finish
On Thu, Nov 11, 2021 at 2:41 PM Jan Hubicka via Gcc-patches
wrote:
>
> Hi,
> We make self recursive functions as looping of fear of endless recursion.
> This is done correctly for local pure/const and for non-trivial SCCs in
> callgraph, but for trivial SCCs we miss the flag.
>
> I think it is bad
Imports are our nomenclature for external SSA names to a block that
are used to calculate the outgoing edges for said block. For example,
in the following snippet:
:
_1 = b_10 == block_11;
_2 = b_10 != -1;
_3 = _1 & _2;
if (_3 != 0)
goto ; [INV]
else
goto ; [I
Changes since v1:
- Removed -Wmissing-prototypes fix.
- Fixed formatting of Changelog and patch.
--->8---
At the end of the backtrace stream _Unwind_Find_FDE() may not be able
to find the frame unwind info and will later call the backtrace fallback
instead of finishing. This occur
> On Thu, Nov 11, 2021 at 2:41 PM Jan Hubicka via Gcc-patches
> wrote:
> >
> > Hi,
> > We make self recursive functions as looping of fear of endless recursion.
> > This is done correctly for local pure/const and for non-trivial SCCs in
> > callgraph, but for trivial SCCs we miss the flag.
> >
> >
I've pushed the attached patch to clean up some test failures I've seen
on nios2-elf. This target defaults to -fno-delete-null-pointer-checks
so any optimization tests that depend on assumptions that valid pointers
are non-zero have to be marked explicitly. The others ought to be
obvious, exc
Hi,
I wrote script comparing modref pure/const discovery with ipa-pure-const
and found mistakes on both ends. I fixed ipa-pure-const in previous two
patches.
This plugs the case where modref was too optimistic in handling looping
pure consts which were previously missed due to early exits on ECF_
Just the Fortran FE work + Fortranized version for the C tests.
Tobias
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This makes sure to only assert we don't run into a asm goto when
inserting a stmt in reassoc, matching the condition in
can_reassociate_p. We can handle EH edges from an asm just like
EH edges from any other stmt.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-11-11 Richard B
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