Jonathan Wright <jonathan.wri...@arm.com> writes:
> Hi,
>
> This patch declares poly type-qualified builtins and uses them for
> PMUL[L] Neon intrinsics. This removes the need for casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-11-08 Jonathan Wright <jonathan.wri...@arm.com>
>
> * config/aarch64/aarch64-simd-builtins.def: Use poly type
> qualifier in builtin generator macros.
> * config/aarch64/arm_neon.h (vmul_p8): Use type-qualified
> builtin and remove casts.
> (vmulq_p8): Likewise.
> (vmull_high_p8): Likewise.
> (vmull_p8): Likewise.
OK, thanks.
Richard
>
> diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def
> b/gcc/config/aarch64/aarch64-simd-builtins.def
> index
> cdc44f0a22fd29715472e5b2dfe6a19ad0c729dd..35e065fe938e6a6d488dc1b0f084f6ddf2d3618f
> 100644
> --- a/gcc/config/aarch64/aarch64-simd-builtins.def
> +++ b/gcc/config/aarch64/aarch64-simd-builtins.def
> @@ -45,9 +45,9 @@
>
> BUILTIN_VDC (COMBINE, combine, 0, AUTO_FP)
> VAR1 (COMBINEP, combine, 0, NONE, di)
> - BUILTIN_VB (BINOP, pmul, 0, NONE)
> - VAR1 (BINOP, pmull, 0, NONE, v8qi)
> - VAR1 (BINOP, pmull_hi, 0, NONE, v16qi)
> + BUILTIN_VB (BINOPP, pmul, 0, NONE)
> + VAR1 (BINOPP, pmull, 0, NONE, v8qi)
> + VAR1 (BINOPP, pmull_hi, 0, NONE, v16qi)
> BUILTIN_VHSDF_HSDF (BINOP, fmulx, 0, FP)
> BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
> BUILTIN_VDQ_I (BINOP, addp, 0, NONE)
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index
> de29b3b7da9a2ab16f6c5bdc832907df5deb7d61..b4a8ec3e328b138c0f368f60bf2534fb10126bd5
> 100644
> --- a/gcc/config/aarch64/arm_neon.h
> +++ b/gcc/config/aarch64/arm_neon.h
> @@ -1007,8 +1007,7 @@ __extension__ extern __inline poly8x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vmul_p8 (poly8x8_t __a, poly8x8_t __b)
> {
> - return (poly8x8_t) __builtin_aarch64_pmulv8qi ((int8x8_t) __a,
> - (int8x8_t) __b);
> + return __builtin_aarch64_pmulv8qi_ppp (__a, __b);
> }
>
> __extension__ extern __inline int8x16_t
> @@ -1071,8 +1070,7 @@ __extension__ extern __inline poly8x16_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vmulq_p8 (poly8x16_t __a, poly8x16_t __b)
> {
> - return (poly8x16_t) __builtin_aarch64_pmulv16qi ((int8x16_t) __a,
> - (int8x16_t) __b);
> + return __builtin_aarch64_pmulv16qi_ppp (__a, __b);
> }
>
> __extension__ extern __inline int8x8_t
> @@ -7716,8 +7714,7 @@ __extension__ extern __inline poly16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vmull_high_p8 (poly8x16_t __a, poly8x16_t __b)
> {
> - return (poly16x8_t) __builtin_aarch64_pmull_hiv16qi ((int8x16_t) __a,
> - (int8x16_t) __b);
> + return __builtin_aarch64_pmull_hiv16qi_ppp (__a, __b);
> }
>
> __extension__ extern __inline int16x8_t
> @@ -7850,8 +7847,7 @@ __extension__ extern __inline poly16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vmull_p8 (poly8x8_t __a, poly8x8_t __b)
> {
> - return (poly16x8_t) __builtin_aarch64_pmullv8qi ((int8x8_t) __a,
> - (int8x8_t) __b);
> + return __builtin_aarch64_pmullv8qi_ppp (__a, __b);
> }
>
> __extension__ extern __inline int16x8_t
