[committed] testsuite: Require trampolines for gcc.dg/pr118325.c

. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr118325.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/pr118325.c b/gcc/testsuite/gcc.dg/pr118325.c index 74f92cc2bb6..7129bc9b9be 100644 --- a/gcc/testsuite/gcc.dg/pr118325.c +++ b/gcc/testsuite/gcc.dg/pr118325.c

Re: [PATCH 0/3] testsuite: RISC-V: Improve support for RV32E

On Tue, Jan 07, 2025 at 07:55:45AM -0800, Palmer Dabbelt wrote: > On Mon, 09 Dec 2024 08:13:22 PST (-0800), dimi...@dinux.eu wrote: > > Many test cases implicitly require some form of I ABI variant for > > RISC-V to be the default. Hence they fail when ILP32E is configured as > > the default ABI f

Re: [PATCH v2 1/4] testsuite: RISC-V: Add effective target for E ABI variant

On Mon, Jan 06, 2025 at 07:52:23AM -0700, Jeff Law wrote: > > > On 1/4/25 11:01 AM, Dimitar Dimitrov wrote: > > Add new effective target check for either ILP32E or ILP64E ABI variants. > > > > Initial implementation only checks for RV32E or RV64E ISA, which in t

[PATCH v2 2/4] testsuite: RISC-V: Skip V and Zvbb tests for ILP32E/ILP64E ABIs

.target/riscv/rvv/base/setmem-3.c: Ditto. * gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrolr-1.c | 2 +- gcc/testsuite/gcc.target/ri

[PATCH v2 3/4] testsuite: RISC-V: Skip tests using -mcpu= for ILP32E/ILP64E ABIs

139.c: Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/riscv/pr109508.c | 2 +- gcc/testsuite/gcc.target/riscv/pr114139.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/pr109508.c b/gcc/testsuite/gcc.target/riscv/pr109

[PATCH v2 1/4] testsuite: RISC-V: Add effective target for E ABI variant

widely used currently. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_riscv_abi_e): New procedure. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/lib/target-supports.exp | 20 1 file changed, 20 insertions(+) diff --git a/gcc

[PATCH v2 0/4] testsuite: RISC-V: Improve support for RV32E

071 # of unexpected failures401 # of expected failures 1060 # of unresolved testcases 55 # of unsupported tests 19811 Changes for patch series V2: - Used effective target check to disable tests, instead of manually selecting an ABI for each test. Dimitar D

Re: [PATCH] testsuite: generalized field-merge tests for <32-bit int [PR118025]

On Sun, Dec 22, 2024 at 08:59:00PM -0300, Alexandre Oliva wrote: > Hello, Dimitar, > > On Dec 22, 2024, Dimitar Dimitrov wrote: > > > On Sat, Dec 21, 2024 at 02:28:33AM -0300, Alexandre Oliva wrote: > >> On Dec 20, 2024, Jakub Jelinek wrote: > >> >

Re: [PATCH] testsuite: generalize ifcombine field-merge tests [PR118025]

On Sat, Dec 21, 2024 at 02:28:33AM -0300, Alexandre Oliva wrote: > On Dec 20, 2024, Jakub Jelinek wrote: > > > On Wed, Dec 18, 2024 at 12:59:11AM -0300, Alexandre Oliva wrote: > >> * gcc.dg/field-merge-16.c: New. > > > Note the test FAILs on i686-linux or on x86_64-linux with -m32. > > Also fix

[committed] testsuite: Require int32plus target for gcc.dg/pr117816.c

effective target int32plus. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr117816.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/pr117816.c b/gcc/testsuite/gcc.dg/pr117816.c index 6a9fc5fa141..bd37a5bb0e1 100644 --- a/gcc/testsuite/gcc.dg/pr117816

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

On Sat, Dec 14, 2024 at 10:17:44AM -0700, Jeff Law wrote: > > > On 12/10/24 12:48 PM, Dimitar Dimitrov wrote: > > On Mon, Dec 09, 2024 at 06:05:10PM +0100, Robin Dapp wrote: > > > > +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ >

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

On Mon, Dec 09, 2024 at 06:05:10PM +0100, Robin Dapp wrote: > > +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ > > +/* { dg-additional-options "-mabi=ilp32d" { target { rv32 } } } */ > > Wouldn't skipping those tests also be reasonable? > I.e. adding a target to the compile dir

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

On Mon, Dec 09, 2024 at 09:40:41AM -0800, Palmer Dabbelt wrote: > On Mon, 09 Dec 2024 09:05:10 PST (-0800), Robin Dapp wrote: > > > +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ > > > +/* { dg-additional-options "-mabi=ilp32d" { target { rv32 } } } */ > > > > Wouldn't skipping

[PATCH 2/3] testsuite: RISC-V: Explicitly specify ABI when passing -mcpu=

/riscv/pr114139.c: Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/riscv/pr109508.c | 2 +- gcc/testsuite/gcc.target/riscv/pr114139.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/pr109508.c b/gcc/testsuite/gcc.target/riscv

[PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

/rvv/base/setmem-3.c: Ditto. * gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c | 2 ++ gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrolr-1.c | 2 ++ gcc/testsuite/gcc.target/riscv/rvv

[PATCH 0/3] testsuite: RISC-V: Improve support for RV32E

224967 # of unexpected failures1899 # of expected failures 1084 # of unresolved testcases 298 # of unsupported tests 17711 Dimitar Dimitrov (3): testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options testsuite: RISC-V: Explicitly s

[committed] pru: Implement c and n asm operand modifiers

/ChangeLog: * gcc.target/pru/asm-op-modifier.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.cc | 12 ++- .../gcc.target/pru/asm-op-modifier.c | 32 +++ 2 files changed, 43 insertions(+), 1 deletion(-) create mode

Re: [patch,avr,testsuite,applied] gcc.c-torture/execute/memcpy-a*.c

On Sun, Dec 01, 2024 at 12:32:55PM +0100, Georg-Johann Lay wrote: > Am 01.12.24 um 05:45 schrieb Maciej W. Rozycki: > > On Sat, 30 Nov 2024, Georg-Johann Lay wrote: > > > > > The gcc.c-torture/execute/memcpy-a[1248].c tests consumed more time > > > than the whole rest of the test suite, just to co

[committed] testsuite: Silence gcc.dg/pr117806.c for default_packed

to trunk as obvious. gcc/testsuite/ChangeLog: * gcc.dg/pr117806.c: Test can spill excess errors for default_packed targets. Cc: Martin Uecker Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr117806.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc

[PATCH] testsuite: RISC-V: Fix vector flags handling [PR117603]

or trunk once CI is green? PR target/117603 gcc/testsuite/ChangeLog: * lib/target-supports.exp (riscv_get_arch): Add comment about function purpose. Add E ISA to list of possible modifiers. (check_vect_support_and_set_flags): Do not advertise vector

[committed] testsuite: pru: Fix pr64366.c for new -std=gnu23 default

Provide function declaration in order to fix the test case build with the new -std=gnu23 default. Pushed to trunk. gcc/testsuite/ChangeLog: * gcc.target/pru/pr64366.c (foobar): Provide full function delaration. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru

[PATCH v2] RISC-V: Tie MUL and DIV masks to the M extension

18958 The high number of failures is due to unrelated testsuite issue PR117603. Ok for trunk once CI is green? gcc/ChangeLog: * config/riscv/riscv.cc (riscv_override_options_internal): Set division option's default to disabled if multiplication is no

[PATCH] RISC-V: Tie MUL and DIV masks to the M extension

supported tests 18958 Ok for trunk? gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Tie both MUL and DIV to the M extension. Signed-off-by: Dimitar Dimitrov --- gcc/common/config/riscv/riscv-common.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --gi

[committed] testsuite: Require atomic operations for c2y-if-decls-*

/testsuite/ChangeLog: * gcc.dg/c2y-if-decls-1.c: Require target that supports atomic operations on int and long types. * gcc.dg/c2y-if-decls-11.c: Ditto. * gcc.dg/c2y-if-decls-4.c: Ditto. * gcc.dg/c2y-if-decls-8.c: Ditto. Cc: Marek Polacek Signed-off-by: Dimitar

[committed] testsuite: Require trampoline support for pr117245.c

target with trampolines. Cc: Martin Uecker Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr117245.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/pr117245.c b/gcc/testsuite/gcc.dg/pr117245.c index ebcc60b898f..bf2baad82f3 100644 --- a/gcc/testsuite/gcc.dg

[committed] testsuite: Require fpic support for pr116887.c

fpic. Cc: Xi Ruoyao Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr116887.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/pr116887.c b/gcc/testsuite/gcc.dg/pr116887.c index b7255e09a18..e22b944eade 100644 --- a/gcc/testsuite/gcc.dg/pr116887.c +++ b/gcc

[committed] testsuite: Require atomic operations for pr47333_0

/ChangeLog: * g++.dg/lto/pr47333_0.C: Require target that supports atomic operations on int and long types. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.dg/lto/pr47333_0.C | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/g++.dg/lto/pr47333_0.C b/gcc/testsuite/g

[committed] testsuite: Require effective target pie for pr113197

for x86_64-pc-linux-gnu passes with current mainline, and fails if the fix from r15-4018-g02f4efe3c12cf7 is reverted. Committed as obvious. PR ipa/113197 gcc/testsuite/ChangeLog: * gcc.dg/lto/pr113197_0.c: Require effective target pie. Signed-off-by: Dimitar Dimitrov --- gcc

Re: [PATCH] doc: Document struct-layout-1.exp for ABI checks

On Sun, Sep 08, 2024 at 08:48:57AM +0300, Dimitar Dimitrov wrote: > This test helped discover PR116621, so it is worth being documented. > > gcc/ChangeLog: > > * doc/sourcebuild.texi: Document struct-layout-1.exp. > > Signed-off-by: Dimitar Dimitrov > --- > gc

[PATCH] doc: Document struct-layout-1.exp for ABI checks

This test helped discover PR116621, so it is worth being documented. gcc/ChangeLog: * doc/sourcebuild.texi: Document struct-layout-1.exp. Signed-off-by: Dimitar Dimitrov --- gcc/doc/sourcebuild.texi | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a

Re: [PATCH] testsuite: Run array54.C only for sync_int_long targets

On Tue, Aug 06, 2024 at 10:16:36PM +0300, Dimitar Dimitrov wrote: > The test case uses "atomic", which fails to link on > pru-unknown-elf target due to missing __atomic_load_4 symbol. > > Fix by filtering for sync_int_long effective target. Ensured that the > test s

Re: Ping: [PATCH] testsuite: Fix struct size check [PR116155]

On Tue, Aug 13, 2024 at 07:34:09PM +0200, Hans-Peter Nilsson wrote: > > From: Sam James > > Date: Tue, 13 Aug 2024 18:17:29 +0100 > > > Hans-Peter Nilsson writes: > > > > > I stumbled on this being a regression for cris-elf as well; > > > the patch expectedly fixes the test-case for CRIS as wel

[PATCH] testsuite: Run array54.C only for sync_int_long targets

++.dg/init/array54.C: Require sync_int_long effective target. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.dg/init/array54.C | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/g++.dg/init/array54.C b/gcc/testsuite/g++.dg/init/array54.C index 5241e451d6d..d664b576984 100644

[PATCH] testsuite: Fix struct size check [PR116155]

targets. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/c-c++-common/fam-in-union-alone-in-struct-1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/c-c++-common/fam-in-union-alone-in-struct-1.c b/gcc/testsuite/c-c++-common/fam-in-union-alone-in-struct-1

[committed] testsuite: Add filters for default_packed targets [PR116155]

h any default packing value. * g++.dg/warn/Wpadded-1.C: Ignore warning for default_packed targets. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.dg/abi/nsdmi-aggr1a.C | 2 +- gcc/testsuite/g++.dg/abi/nullptr-align2.C | 2 +- gcc/testsuite/g++.dg/cpp1z/aligned-new9.

Re: [committed, v4] libstdc++: Handle encodings in localized chrono formatting [PR109162]

On Wed, Jul 31, 2024 at 09:26:43PM +0100, Jonathan Wakely wrote: > On Wed, 31 Jul 2024 at 19:18, Jonathan Wakely wrote: > > > > On Wed, 31 Jul 2024 at 19:17, Dimitar Dimitrov wrote: > > > > > > On Wed, Jul 31, 2024 at 05:09:52PM +0100, Jonathan Wakely wrote: &

Re: [committed, v4] libstdc++: Handle encodings in localized chrono formatting [PR109162]

On Wed, Jul 31, 2024 at 05:09:52PM +0100, Jonathan Wakely wrote: > It took a while, but I was finally happy with this v4 patch, so I pushed > it to trunk. Then I noticed silly mistake in the new test, which I'll > fix shortly. > ... > +#if defined _GLIBCXX_HAVE_ICONV > + ::iconv_t _M_cd = (::icon

[committed] pru: Enable section anchoring by default

: New test. Signed-off-by: Dimitar Dimitrov --- gcc/common/config/pru/pru-common.cc | 12 gcc/config/pru/pru.cc| 6 ++ gcc/testsuite/gcc.target/pru/section-anchors-1.c | 14 ++ gcc/testsuite/gcc.target/pru/section-anchors-2.c

[committed] testsuite: Fix for targets not passing argc/argv [PR116154]

/testsuite/ChangeLog: * gcc.dg/torture/pr67947.c: Use volatile variable instead of argc. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/torture/pr67947.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/torture/pr67947.c b/gcc/testsu

Re: [pushed 2/2] testsuite: check that generated .sarif files validate against the SARIF schema [PR109360]

On Fri, Jun 21, 2024 at 08:55:36AM -0400, David Malcolm wrote: > This patch extends the dg directive verify-sarif-file so that if > the "jsonschema" tool is available, it will be used to validate the > generated .sarif file. > > Tested with jsonschema 3.2 with Python 3.8 Hi David, The new testca

Re: [PATCH 31/52] pru: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

On Sun, Jun 02, 2024 at 10:01:21PM -0500, Kewen Lin wrote: > This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE > defines in pru port. > > gcc/ChangeLog: > > * config/pru/pru.h (FLOAT_TYPE_SIZE): Remove. > (DOUBLE_TYPE_SIZE): Likewise. > (LONG_DOUBLE_TYPE_SIZE): Likewise.

[COMMITTED] pru: Implement TARGET_CLASS_LIKELY_SPILLED_P to fix PR115013

(pru_class_likely_spilled_p): Implement to mark classes containing one SImode register as likely spilled. (TARGET_CLASS_LIKELY_SPILLED_P): Define. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.cc | 14 ++ 1 file changed, 14 insertions(+) diff --git a/gcc

[COMMITTED] pru: Fix register class checks in predicates

. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/predicates.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/pru/predicates.md b/gcc/config/pru/predicates.md index 77b3316b98e..55635599609 100644 --- a/gcc/config/pru/predicates.md +++ b/gcc/config/pru

Re: [PATCH 2/4] df: Add DF_LIVE_SUBREG problem

On Wed, May 08, 2024 at 11:34:48AM +0800, 陈硕 wrote: > Hi Dimitar > > > I send a patch just now, modifies accordingly > > > some comments: > > > >Nit: Should have two spaces after the dot, per GNU coding style.  > I'd suggest > >to run the contrib/check_GNU_style.py script on your patches. >

[COMMITTED 7/9] pru: Use HOST_WIDE_INT_1U macro

Use the HOST_WIDE_INT_1U macro instead of literal 1 when constructing constants for RTL. gcc/ChangeLog: * config/pru/pru.md (lshrdi3): Use HOST_WIDE_INT_1U macro. (ashldi3): Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.md | 6 -- 1 file changed, 4

[COMMITTED 9/9] pru: New validation pass for minrt

/pru/minrt-2.cc: New test. * g++.target/pru/minrt-3.cc: New test. * g++.target/pru/pru.exp: New test. * gcc.target/pru/minrt-1.c: New test. * gcc.target/pru/minrt-2.c: New test. * gcc.target/pru/minrt-3.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc

[COMMITTED 6/9] pru: Drop usage of ATTRIBUTE_UNUSED

ry): Ditto. (pru_builtin_decl): Ditto. (pru_expand_builtin): Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru-passes.cc | 2 +- gcc/config/pru/pru-pragma.cc | 2 +- gcc/config/pru/pru.cc| 24 +--- 3 files changed, 11 insertions(+), 17 deletions(-) di

[COMMITTED 4/9] pru: Add pattern variants for zero extending destination

. * gcc.target/pru/extzv-3.c: Ditto. * gcc.target/pru/zero_extend-op0.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/alu-zext.md| 38 --- gcc/testsuite/gcc.target/pru/extzv-1.c| 2 +- gcc/testsuite/gcc.target/pru/extzv-2

[COMMITTED 5/9] pru: Skip register save if function will not return

ported yet for PRU. gcc/ChangeLog: * config/pru/pru.cc (prologue_saved_reg_p): Skip saving if function will not return. gcc/testsuite/ChangeLog: * gcc.target/pru/noreturn-prologue-1.c: New test. * gcc.target/pru/noreturn-prologue-2.c: New test. Signed-off-by: Dimitar

[COMMITTED 8/9] pru: Refactor to use passes definition file

u-protos.h (pru_register_abicheck_pass): Remove. (make_pru_tiabi_check): Add declaration. * config/pru/pru.cc (pru_option_override): Remove explicit pass registration. * config/pru/t-pru: Register PRU passes definition file. * config/pru/pru-passes.def: New file. Signed-off-b

[COMMITTED 3/9] pru: Optimize the extzv and insv patterns

. * gcc.target/pru/extzv-2.c: New test. * gcc.target/pru/extzv-3.c: New test. * gcc.target/pru/insv-1.c: New test. * gcc.target/pru/insv-2.c: New test. * gcc.target/pru/insv-3.c: New test. * gcc.target/pru/insv-4.c: New test. Signed-off-by: Dimitar Dimitrov

[COMMITTED 2/9] pru: Implement zero fill for 64-bit registers

Loading a constant zero in a 64-bit register now takes one instead of two instructions. gcc/ChangeLog: * config/pru/pru.md: New pattern alternative for zero-filling 64-bit registers. gcc/testsuite/ChangeLog: * gcc.target/pru/mov-0.c: New test. Signed-off-by: Dimitar

[COMMITTED 0/9] Small cleanups and improvements for PRU backend

This patch set includes small cleanups and code generation improvements I implemented during stages 3 and 4. All patches have been regression-tested individually for pru-unknown-elf while being developed. And the entire set was tested again on GCC 15 mainline. Dimitar Dimitrov (9): pru

[COMMITTED 1/9] pru: Implement TARGET_ADDRESS_COST

when running embench-iot and building a few real-world firmware examples. gcc/ChangeLog: * config/pru/pru.cc (pru_address_cost): Implement address cost calculation. (TARGET_ADDRESS_COST): Define for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.cc

Re: [PATCH 2/4] df: Add DF_LIVE_SUBREG problem

On Wed, Apr 24, 2024 at 06:05:03PM +0800, Lehua Ding wrote: > This patch add a new DF problem, named DF_LIVE_SUBREG. This problem > is extended from the DF_LR problem and support track the subreg liveness > of multireg pseudo if these pseudo satisfy the following conditions: > > 1. the mode size

[committed] pru: Document how -mmcu option uses MCU specs

The plan to maintain PRU hardware-specific specs in newlib tree has been abandoned in favour of a new distinct GIT project. Update the documentation accordingly. gcc/ChangeLog: * doc/invoke.texi (-mmcu): Add information about MCU specs. Signed-off-by: Dimitar Dimitrov --- gcc/doc

[committed] pru: Document that arguments are not passed to main with -minrt

: * doc/invoke.texi (-minrt): Clarify that main must take no arguments. Signed-off-by: Dimitar Dimitrov --- gcc/doc/invoke.texi | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e18886e0ac7..69020245b25

[PATCH v2] testsuite: Mark non-optimized variants as expensive

trunk? PR middle-end/112344 gcc/testsuite/ChangeLog: * gcc.dg/torture/pr112344.c: Run non-optimized variants only if expensive tests are allowed. Signed-off-by: Dimitar Dimitrov --- Changes since V1: - Mark as expensive instead of outright disabling variants which are

Re: [PATCH] testsuite: Disable slow and unneeded test variants

On Fri, Feb 16, 2024 at 07:06:57PM +0100, Jakub Jelinek wrote: > On Fri, Feb 16, 2024 at 07:52:17PM +0200, Dimitar Dimitrov wrote: > > The issue in PR112344 is triggered only at -O2, so there is little value > > in running the test at lower optimization levels. At the same time t

[PATCH] testsuite: Disable slow and unneeded test variants

0m4,012s sys 0m2,178s 0m2,133s Ok for trunk? PR middle-end/112344 gcc/testsuite/ChangeLog: * gcc.dg/torture/pr112344.c: Run only for expensive speed optimizations. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/torture/pr112344.c | 2 ++ 1 file chang

Re: [RFA] New pass for sign/zero extension elimination

On Sun, Nov 19, 2023 at 05:47:56PM -0700, Jeff Law wrote: ... > +/* Process uses in INSN. Set appropriate bits in LIVENOW for any chunks of > + pseudos that become live, potentially filtering using bits from LIVE_TMP. > + > + If MODIFIED is true, then optimize sign/zero extensions to SUBREGs w

Re: [PATCH 1/2] gcov: Use unshare_expr() in gen_counter_update()

On Mon, Nov 20, 2023 at 03:33:30PM +0100, Sebastian Huber wrote: > This fixes issues like this: > > gcc/testsuite/gcc.dg/no_profile_instrument_function-attr-1.c: In function > 'main': > gcc/testsuite/gcc.dg/no_profile_instrument_function-attr-1.c:19:1: error: > incorrect sharing of tree node

Re: [PATCH 3/4] gcov: Add gen_counter_update()

On Tue, Nov 14, 2023 at 11:08:24PM +0100, Sebastian Huber wrote: > Move the counter update to the new gen_counter_update() helper function. Use > it in gimple_gen_edge_profiler() and gimple_gen_time_profiler(). The > resulting > gimple instructions should be identical with the exception of the r

Re: [PATCH] tree-optimization/112282 - wrong-code with ifcvt hoisting

On Wed, Nov 15, 2023 at 12:11:50PM +, Richard Biener wrote: > The following avoids hoisting of invariants from conditionally > executed parts of an if-converted loop. That now makes a difference > since we perform bitfield lowering even when we do not actually > if-convert the loop. if-conver

[committed] testsuite: Ignore warning for unsupported option

020206-1.c: Prune warning that -fprefetch-loop-arrays is not supported. CC: Florian Weimer Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/20020206-1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/20020206-1.c b/gcc/testsuite/gcc.dg/20020206-1.c index c8d8b61937a

Re: [PATCH V3 0/7] ira/lra: Support subreg coalesce

On Sun, Nov 12, 2023 at 08:08:10PM +0800, Lehua Ding wrote: > V3 Changes: > 1. fix three ICE. > 2. rebase > > Hi, > > These patchs try to support subreg coalesce feature in > register allocation passes (ira and lra). > Hi Lehua, V3 indeed fixes the arm-none-eabi build. It's also confirmed

Re: [PATCH 0/7] ira/lra: Support subreg coalesce

On Fri, Nov 10, 2023 at 04:53:57PM +0800, Lehua Ding wrote: > > > The divide by zero error above is interesting. I'm not sure why > > > ira_reg_class_max_nregs[] yields 0 for the pseudo register 168 in > > > the following rtx: > > > (debug_insn 168 167 169 19 (var_location:SI encoding (reg/v:SI 168

Re: [PATCH 0/7] ira/lra: Support subreg coalesce

On Wed, Nov 08, 2023 at 11:47:33AM +0800, Lehua Ding wrote: > Hi, > > These patchs try to support subreg coalesce feature in > register allocation passes (ira and lra). Hi Lehua, This patch set breaks the build for at least three embedded targets. See below. For avr the GCC build fails with: /m

[committed] pru: Implement TARGET_INSN_COST

, and committed to trunk. gcc/ChangeLog: * config/pru/pru.cc (pru_insn_cost): New function. (TARGET_INSN_COST): Define for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.cc | 36 1 file changed, 36 insertions(+) diff --git a/gcc

Re: [PATCH 3/3] [V2] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp

Hi, This patch appears to have caused PR 111259. Regards, Dimitar On Tue, Aug 29, 2023 at 08:37:46AM +, Fei Gao wrote: > From: Die Li > > Signed-off-by: Die Li > Co-Authored-By: Fei Gao > > gcc/ChangeLog: > > * config/riscv/peephole.md: New pattern. > * config/riscv/pre

[committed] pru: Add cstore expansion patterns

-by: Dimitar Dimitrov --- gcc/config/pru/predicates.md | 8 +++ gcc/config/pru/pru.md | 62 ++ gcc/testsuite/gcc.target/pru/pr106562-10.c | 8 +++ gcc/testsuite/gcc.target/pru/pr106562-11.c | 8 +++ gcc/testsuite/gcc.target/pru/pr106562-5.c

Re: [PATCH] riscv: Fix scope for memory model calculation

On Tue, Jun 06, 2023 at 08:38:14PM -0600, Jeff Law wrote: > > > > Regression tested for riscv32-none-elf. No changes in gcc.sum and > > g++.sum. I don't have setup to test riscv64. > > > > gcc/ChangeLog: > > > > * config/riscv/riscv.cc (riscv_print_operand): Calculate > > memmodel only

[PATCH] riscv: Fix scope for memory model calculation

lf. No changes in gcc.sum and g++.sum. I don't have setup to test riscv64. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_print_operand): Calculate memmodel only when it is valid. Signed-off-by: Dimitar Dimitrov --- gcc/config/riscv/riscv.cc | 13 + 1 file change

[PATCH] riscv: Fix insn cost calculation

element of a vector. Signed-off-by: Dimitar Dimitrov --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 3954c89a039..c15da1d0e30 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/confi

[committed] testsuite: Require trampolines for nestev-vla tests

: Ditto. * gcc.dg/nested-vla-3.c: Ditto. CC: Martin Uecker Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/nested-vla-1.c | 1 + gcc/testsuite/gcc.dg/nested-vla-2.c | 1 + gcc/testsuite/gcc.dg/nested-vla-3.c | 1 + 3 files changed, 3 insertions(+) diff --git a/gcc/testsuite

[committed] libgcc pru: Define TARGET_HAS_NO_HW_DIVIDE

cycles. Cherry-picked from the recent change for the CRIS port. Pushed to trunk. libgcc/ChangeLog: * config/pru/t-pru (HOST_LIBGCC2_CFLAGS): Add -DTARGET_HAS_NO_HW_DIVIDE. Signed-off-by: Dimitar Dimitrov --- libgcc/config/pru/t-pru | 3 +++ 1 file changed, 3 insertions(+) diff

[GCC-11][committed] pru: Fix CLZ expansion for QI and HI modes

rated code for QI and HI input modes. Signed-off-by: Dimitar Dimitrov (cherry picked from commit c517295940a23db8ca165dfd5d0edea4457eda49) --- gcc/config/pru/pru.h | 5 +++-- gcc/config/pru/pru.md | 15 --- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/g

[GCC-12][committed] pru: Fix CLZ expansion for QI and HI modes

rated code for QI and HI input modes. Signed-off-by: Dimitar Dimitrov (cherry picked from commit c517295940a23db8ca165dfd5d0edea4457eda49) --- gcc/config/pru/pru.h | 5 +++-- gcc/config/pru/pru.md | 15 --- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/g

[committed] pru: Fix CLZ expansion for QI and HI modes

* config/pru/pru.md (clz): Fix generated code for QI and HI input modes. gcc/testsuite/ChangeLog: * gcc.target/pru/clz-hi-2.c: New test. * gcc.target/pru/clz-hi.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.h| 5 ++-- gcc/config/

[PATCH] testsuite: Add filter for target socket support

* gcc.dg/analyzer/fd-symbolic-socket.c: Ditto. * lib/target-supports.exp (check_effective_target_sockets): New check. Signed-off-by: Dimitar Dimitrov --- gcc/doc/sourcebuild.texi | 3 +++ gcc/testsuite/gcc.dg/analyzer/fd-accept.c | 2 ++ gcc

[committed] pru: Add cbranchdi4 pattern

/pr106562-2.c: New test. * gcc.target/pru/pr106562-3.c: New test. * gcc.target/pru/pr106562-4.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru-protos.h | 1 + gcc/config/pru/pru.cc | 21 +++ gcc/config/pru/pru.md

[committed] pru: Optimize DI shifts

: * config/pru/pru.md (lshrdi3): New expand pattern. (ashldi3): Ditto. gcc/testsuite/ChangeLog: * gcc.target/pru/ashiftdi-1.c: New test. * gcc.target/pru/lshiftrtdi-1.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.md | 196

Re: [PATCH v4] eliminate mutex in fast path of __register_frame

On Fri, Sep 16, 2022 at 12:19:36PM +0200, Thomas Neumann via Gcc-patches wrote: > The __register_frame/__deregister_frame functions are used to register > unwinding frames from JITed code in a sorted list. That list itself > is protected by object_mutex, which leads to terrible performance > in mul

[committed] pru: Add mov variants to load const -1

. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.md | 25 ++--- gcc/testsuite/gcc.target/pru/mov-m1.c | 18 ++ 2 files changed, 32 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/gcc.target/pru/mov-m1.c diff --git a/gcc

[committed] PR target/106564: pru: Optimize 64-bit sign- and zero-extend

arget/pru/pr106564-3.c: New test. * gcc.target/pru/pr106564-4.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/constraints.md | 23 +++ gcc/config/pru/predicates.md | 22 +++ gcc/config/pru/pru-protos.h | 9 +- g

[committed] pru: Optimize 64-bit logical operations

, committed to mainline. gcc/ChangeLog: * config/pru/pru.md (pru_di3): New alternative for two operands but without earlyclobber. gcc/testsuite/ChangeLog: * gcc.target/pru/bitop-di.c: New test. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.md

[committed] testsuite: Require int128 for gcc.dg/pr106063.c

Require effective target int128 for gcc.dg/pr106063.c. Committed as obvious. PR tree-optimization/106063 gcc/testsuite/ChangeLog: * gcc.dg/pr106063.c: Require effective target int128. CC: Tamar Christina Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr106063.c

[PATCH v2] testsuite: Add new target check for no_alignment_constraints

with no_alignment_constraints. * gcc.dg/strlenopt-11.c: Ditto. * gcc.dg/strlenopt-13.c: Ditto. * lib/target-supports.exp (check_effective_target_no_alignment_constraints): New. Signed-off-by: Dimitar Dimitrov --- Changes since patch V1: - Documented the new check in gc

Re: [PATCH] testsuite: Add new target check for no_alignment_constraints

On Fri, Jun 24, 2022 at 08:58:49AM +0200, Richard Biener wrote: > On Fri, Jun 24, 2022 at 2:34 AM Andrew Pinski via Gcc-patches > wrote: > > > > On Thu, Jun 23, 2022 at 2:24 PM Dimitar Dimitrov wrote: > > > > > > A few testcases were marked fo

[PATCH] testsuite: Add new target check for no_alignment_constraints

. 2. default_packed Whether structures are packed by default is not necessarily the same as lacking constraints for any variable alignment. For example, BIGGEST_FIELD_ALIGNMENT or ADJUST_FIELD_ALIGN could be defined for a target. Ok for trunk? Signed-off-by: Dimitar Dimitrov ---

[PATCH] testsuite: Handle default_packed for gcc.dg/builtin-object-size-20.c

. Ok for trunk? gcc/testsuite/ChangeLog: * gcc.dg/builtin-object-size-20.c: Remove cases which work on default_packed targets. * gcc.dg/builtin-object-size-22.c: New test with the cases removed above. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg

[PATCH] testsuite: Rename test-defined macros

gcc.dg/sso/memcpy-1.c (__big_endian__, __little_endian__): Rename macros to avoid conflicts with predefined ones. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/sso/memcpy-1.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/gcc.dg/sso/mem

[PATCH] testsuite: Remove reliance on argc in lto/pr101868_0.c

/ChangeLog: * gcc.dg/lto/pr101868_0.c (zero): New volatile variable. (main): Use it instead of argc. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/lto/pr101868_0.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.dg/lto/pr101868_0

[PATCH] testsuite: Skip btf-bitfields-1.c if int is less than 32-bits

/ChangeLog: * gcc.dg/debug/btf/btf-bitfields-1.c: Skip if int is less than 32-bits. CC: Jose E. Marchesi Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-

[PATCH] testsuite: Adjust btf-bitfields-1.c for default_packed

: Jose E. Marchesi Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-1.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-1.c b/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-1.c index c6bf52130dc

[committed] testsuite: Skip vectorize tests for PRU

: Ditto. * gcc.dg/tree-ssa/gen-vect-25.c: Ditto. * gcc.dg/tree-ssa/gen-vect-26.c: Ditto. * gcc.dg/tree-ssa/gen-vect-28.c: Ditto. * gcc.dg/tree-ssa/gen-vect-32.c: Ditto. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c | 2 +- gcc

[committed] testsuite: Adjust pr91088.c for default_packed targets

Committed as obvious. PR ipa/91088 gcc/testsuite/ChangeLog: * gcc.dg/ipa/pr91088.c: Adjust member offset checks to accommodate targets which pack structures by default. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/ipa/pr91088.c | 3 ++- 1 file changed, 2

[committed] testsuite: Skip gcc.dg/pr46647.c for PRU

Like AVR and Cris, PRU has no alignment requirements. Thus it is also affected by PR53535. PR middle-end/53535 gcc/testsuite/ChangeLog: * gcc.dg/pr46647.c: Skip for pru target. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/pr46647.c | 4 ++-- 1 file changed, 2

[committed] testsuite: Skip ifcvt-4.c for PRU

PRU has no condition code and conditional moves. gcc/testsuite/ChangeLog: * gcc.dg/ifcvt-4.c: Skip for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/ifcvt-4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/ifcvt-4.c b/gcc

[committed] testsuite: Mark extra warnings for default_packed

-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/Warray-bounds-48-novec.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-48-novec.c b/gcc/testsuite/gcc.dg/Warray-bounds-48-novec.c index da179a2c0f5..5cae8566209 100644 --- a/gcc

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