Re: [WIP RFC] libstdc++: add module std

Jason Merrill writes: > On 10/18/24 11:21 AM, Patrick Palka wrote: >> On Fri, 18 Oct 2024, Jason Merrill wrote: >>> >>> Is it useful for std.cc to live in a subdirectory of c++23 as in this >>> patch, or >>> should it be in c++23 itself? Or elsewhere? >> IIUC the src/ subdirectory is for stuff

Re: [committed] c: Default to -std=gnu23

On Sat, Nov 16, 2024 at 3:58 AM Gerald Pfeifer wrote: > > On Fri, 15 Nov 2024, Joseph Myers wrote: > > Change the default language version for C compilation from -std=gnu17 > > to -std=gnu23. > : > > Bootstrapped with no regressions for x86_64-pc-linux-gnu. > > I started seeing the following on x8

Re: Ignore conditions guarding __builtin_unreachable in inliner metrics

> > > > > > > Am 16.11.2024 um 14:08 schrieb Jan Hubicka : > > > > > > Ignore conditions guarding __builtin_unreachable in inliner metrics > > > > > > This patch extends my last year attempt to make inliner metric ignore > > > conditionals guarding __builtin_unreachable. Compared to previous

[PATCH repost, 1/5] Add wD constraint

This patch adds a new constraint ('wD') that matches the accumulator registers that overlap with VSX registers 0..31 on power10. Future patches will add the support for a separate accumulator register class that will be used when the support for dense math registes is added. 2024-11-16 Michael

Re: [PATCH v4 0/3][RFC]Provide more contexts for -Warray-bounds and -Wstringop-* warning messages

On Tue, Nov 05, 2024 at 04:31:29PM +, Qing Zhao wrote: > This is the 4th version of the patch for fixing PR109071. Thanks for all the work on this! I've been doing Linux kernel builds with it and am finding many places where the new diagnostics make the warning understandable. There was an esp

Re: [r15-5359 Regression] FAIL: g++.dg/tree-ssa/pr109442.C -std=gnu++26 scan-tree-dump-not optimized "_M_start" on Linux/x86_64

I think this testcase was accidentally included in r15-5359-gcc33f880e553d1 but this problem can be ignored, as it is now fixed by r15-5361-gaac5c57ee16723. (TL;DR: just a git snafu and the problem is resolved AFAICT.)

[PATCH v2 13/14] Support for 64-bit location_t: Internal parts

Several of the selftests in diagnostic-show-locus.cc and input.cc are sensitive to linemap internals. Adjust them here so they will support 64-bit location_t if configured. Likewise, handle 64-bit location_t in the support for -fdump-internal-locations. As was done with the analyzer, convert to (u

[PATCH v2 01/14] Support for 64-bit location_t: libcpp part 1

Prepare libcpp to support 64-bit location_t, without yet making any functional changes, by adding new typedefs that enable code to be written such that it works with any size location_t. Update the usage of line maps within libcpp accordingly. Subsequent patches will prepare the rest of the codeba

[PATCH v2 05/14] gimple: Handle tail padding when computing gimple_ops_offset

The array gimple_ops_offset_[], which is used to find the trailing op[] array for a given gimple struct, is computed assuming that op[] will be found at sizeof(tree) bytes away from the end of the struct. This is only correct if the alignment requirement of a pointer is the same as the alignment re

[r15-5359 Regression] FAIL: g++.dg/tree-ssa/pr109442.C -std=gnu++26 scan-tree-dump-not optimized "_M_start" on Linux/x86_64

On Linux/x86_64, cc33f880e553d1aa94d19a349ad755f34c33de9e is the first bad commit commit cc33f880e553d1aa94d19a349ad755f34c33de9e Author: Jan Hubicka Date: Sat Nov 16 23:45:57 2024 +0100 Avoid expicit builtion list in tree-ssa-dce caused FAIL: g++.dg/tree-ssa/pr109442.C -std=gnu++11 sc

[PATCH v2 14/14] Support for 64-bit location_t: Final parts

With the codebase having already been prepared to handle it, change location_t to be a 64-bit integer instead of a 32-bit integer. libcpp/ChangeLog: * include/cpplib.h (struct cpp_token): Adjust comment about the struct size. * include/line-map.h (location_t): Change typed

[PATCH v2 06/14] Support for 64-bit location_t: Frontend parts

The C/C++ frontend code contains a couple instances where a callback receiving a "location_t" argument is prototyped to take "unsigned int" instead. This will make a difference once location_t can be configured to a different type, so adjust that now. Also remove a comment about -flarge-source-fil

[PATCH v2 10/14] Support for 64-bit location_t: gimple parts

The size of struct gimple increases by 8 bytes with the change in size of location_t from 32- to 64-bit; adjust the WORD markings in the comments accordingly. It seems that most of the WORD markings were off by one already, probably not having been updated after a previous reduction in the size of

[PATCH v2 08/14] Support for 64-bit location_t: Analyzer parts

The analyzer occasionally prints internal location_t values for debugging; adjust those parts so they will work if location_t is 64-bit. For simplicity, to avoid hassling with the printf format string, just convert to (unsigned long long) in either case. gcc/analyzer/ChangeLog: * checker-

[PATCH v2 04/14] tree-phinodes: Use 4 instead of 2 as the minimum number of phi args

Currently, when we allocate a gphi object, we round up the capacity for the trailing arguments array such that it will make full use of the page size that ggc will allocate. While there is also an explicit minimum of 2 arguments, in practice after rounding to the ggc page size there is always room

[PATCH v2 07/14] Support for 64-bit location_t: toplev parts

With the move from 32-bit to 64-bit location_t, the recommended number of range bits will change from 5 to 7. line-map.h now exports the recommended setting, so use that instead of hard-coding 5. Also silently ignore -flarge-source-files, which will become unnecessary with 64-bit location_t and wo

[PATCH v2 03/14] tree-cfg: Fix call to next_discriminator_for_locus()

While testing 64-bit location_t support, I ran into an -fcompare-debug issue that was traced back here. Despite the name, next_discriminator_for_locus() is meant to take an integer line number argument, not a location_t. There is one call site which has been passing a location_t instead. For the mo

[PATCH v2 00/14] Support for 64-bit location_t

Hello- Here is an upated patch series. Most of the patches have not changed from v1. v1 thread: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667333.html The changes are: - As Richard suggested, I changed to make the feature not configurable, since it will be too hard to optimize st

[PATCH v2 02/14] libcpp: Fix potential unaligned access in cpp_buffer

libcpp makes use of the cpp_buffer pfile->a_buff to store things while it is handling macros. It uses it to store pointers (cpp_hashnode*, for macro arguments) and cpp_macro objects. This works fine because a cpp_hashnode* and a cpp_macro have the same alignment requirement on either 32-bit or 64-b

[PATCH repost, 4/5] Add dense math test for new instruction

Like in the previous patch, Peter has suggested not changing the instruction names if dense math registers are supported. If so, this patch likely will be dropped. Add a new test to see if we changed the name of the MMA instructions if -mcpu=future. gcc/testsuite/ * gcc.target/powerpc/d

[PATCH repost, 3/5] PowerPC: Switch to dense math names for all MMA operations

Note, Peter has suggested we drop this patch. I can look at dropping it in the next patch set, but I wanted to get the patches out there before stage 1 closes. This patch changes the assembler instruction names for MMA instructions from the original name used in power10 to the new name when used

[PATCH 4/3] libstdc++: Add fancy pointer support to std::forward_list [PR57272]

This takes a very similar approach to the changes for std::list. libstdc++-v3/ChangeLog: PR libstdc++/57272 * include/bits/forward_list.h (_GLIBCXX_USE_ALLOC_PTR_FOR_LIST): Define. (_Fwd_list_node_base::_M_base_ptr): New member functions. (_Fwd_list_node::_

[PATCH repost, 2/5] Add support for dense math registers.

The MMA subsystem added the notion of accumulator registers as an optional feature of ISA 3.1 (power10). In ISA 3.1, these accumulators overlapped with the VSX registers 0..31, but logically the accumulator registers were separate from the FPR registers. In ISA 3.1, it was anticipated that in fut

[patch, avr, applied] Fix broken libgcc/libf7 build after switching to C23

Applied this patch as obvious after the switch to GNU-C23 in https://gcc.gnu.org/r15-5327 Johann -- AVR: Fix building LibF7 after switching to C23. Since r15-5327, GNU-C23 is being used as C language default. libf7.h doesn't assume headers like stdbool.h are present and defines bool, true and

[PATCH repost, 0/5] Add PowerPC Dense Math Support for future cpus

I have posted this patch several times over the years. I am reposting it in case the last time I posted it got lost. The last time I posted this patch was on October 28th: https://gcc.gnu.org/pipermail/gcc-patches/2024-October/62.html This patch was posted a year or so during the GCC 14 patc

Re: [committed] Fix various sh tests to work with c23

On Sat, 2024-11-16 at 08:42 -0700, Jeff Law wrote: > A few SH tests want to create a bool typedef which doesn't work for c23. > Easiest fix which should have no impact on the test behavior would be > to just change the name of the typedef so that doesn't conflict. > > One test has a crazy f

[PATCH repost, 5/5] Add support for 1,024 bit Dense Math registers

This patch is a prelimianry patch to add the full 1,024 bit dense math register (DMRs) for -mcpu=future. The MMA 512-bit accumulators map onto the top of the DMR register. This patch only adds the new 1,024 bit register support. It does not add support for any instructions that need 1,024 bit re

[PATCH, repost] Add Vector pair support

I am reposting this patch because I never got feedback on it in case it got lost. This patch adds a new include file (vector-pair.h) that adds support so that users writing high performance libraries can change their code to allow the generation of the vector pair load and store instructions on po

[PATCH repost] PR target/117251 Add PowerPC XXEVAL support for fusion optimization in power10

I had posted this patch previously, and I am reposting it in case it got lost: The multibuff.c benchmark attached to the PR target/117251 compiled for Power10 PowerPC that implement SHA3 has a slowdown in the current trunk and GCC 14 compared to GCC 11 - GCC 13, due to excessive amounts of spillin

[PATCH] PR target/117487 Add power9/power10 float to logical operations

I was answering an email from a co-worker and I pointed him to work I had done for the Power8 era that optimizes the 32-bit float math library in Glibc. In doing so, I discovered with the Power9 and later computers, this optimization is no longer taking place. The glibc 32-bit floating point math

[committed] RISC-V testsuite adjustments for c23

Mix of fixes and workarounds by passing in -std=gnu17. The former is the preferred approach, but occasionally we have code that's just fugly to fix. Pushed to the trunk. Jeff commit e30bc91e96f710cb1a15a32c4c53ddfb40f0f282 Author: Jeff Law Date: Sat Nov 16 11:30:04 2024 -0700 [comm

[PATCH report] PR target/99293 Optimize splat of a V2DF/V2DI extract with constant element

I've posted this patch previous, and pinged it a few times. So I'm reposting it now in case it got lost. We had optimizations for splat of a vector extract for the other vector types, but we missed having one for V2DI and V2DF. This patch adds a combiner insn to do this optimization. In looking

[libstdc++-v3] Add __builtion_unreachable to vector::size(), vector::capacity()

Hi, This patch makes it clear that vector sizes and capacities are not negative. With recent change to ipa-fnsummary this should not affect inlining and improves codegen of some vector manipulation functions. I tested clang build. Looking for throw_bad calls there are only 3 called considerably

[PATCH] libstdc++: Simplify intervals() and densities() for piecewise distributions

Make the members of the distributions call the equivalent member of the param_type, instead of duplicating the logic. Also add FIXME comments about the vector members of the param types, which were changed by LWG 1439 in 2010 but never fixed in libstdc++. libstdc++-v3/ChangeLog: * includ

[PATCH V4 5/4] Restrict future-3.c test to 64-bits

When I checked the previous patch, I didn't check it out on 32-bits. In 32-bit mode, the vector pair load and stores are not generated, even if -mcpu=future is used. Only run the future-3.c in 64-bit mode. 2024-11-16 Michael Meissner gcc/testsuite/ * gcc.target/powerpc/future-3.c: L

Re: [PATCH] c++: experiment with (draft) C++ standard metadata

On Sat, 2024-11-16 at 19:01 +0100, Jakub Jelinek wrote: > On Sat, Nov 16, 2024 at 12:33:51PM -0500, David Malcolm wrote: > > This patch adds metadata to some C++ diagnostics, > > referencing a specific section/anchor within a draft > > of the C++ standard.  For example, this adds > > a [depr.volati

[PATCH 2/2] libstdc++: Add cache for recently used encoding facets

libstdc++-v3/ChangeLog: * src/c++20/format.cc (remove_ref): New deleter type. (move_to_front): New function. (lru_cache): New unique_ptr array. (__with_encoding_conversion): Use LRU cache. --- Tested x86_64-linux. libstdc++-v3/src/c++20/format.cc | 36 +++

[PATCH] libstdc++: Add --enable-clocale=ieee_1003.1-2008 [PR57585]

Do we want something like this for GCC 15? Tested x86_64-freebsd and sparc-solaris (although not for a few months). -- >8 -- libstdc++-v3/ChangeLog: PR libstdc++/57585 * acinclude.m4 (GLIBCXX_ENABLE_CLOCALE): Add ieee_1003.1-2008 as new value. Add posix-2001 and posix-20

[PATCH 3/3 v2] libstdc++: Add fancy pointer support to std::list [PR57272]

Currently std::list uses raw pointers to connect its nodes, which is non-conforming. We should use the allocator's pointer type everywhere that a "pointer" is needed. Because the existing types like _List_node are part of the ABI now, we can't change them. To support nodes that are connected by fa

[PATCH 1/2] libstdc++: Avoid iconv for chrono formatting where possible

libstdc++-v3/ChangeLog: * src/c++20/format.cc (__encoding::conv): Convert ISO-8859-1 and ISO-8859-15 directly without using iconv. Check if iconv can be avoided for some extended ASCII encodings. --- Tested x86_64-linux. libstdc++-v3/src/c++20/format.cc | 119 +++

Re: [PATCH v2] MATCH: Simplify `min(a, b) op max(a, b)` to `a op b` [PR109401]

On 11/15/24 5:16 AM, Eikansh Gupta wrote: Hi Jeff, The patch has support for both. In the test cases, approx half the test cases have |min(a, b) op max(a, b)| and the other half have |max(a, b) op min(a, b). | For some reason my brain just doesn't parse match.pd code well. OK for the tru

Re: [PATCH v2 2/4] vect: disable multiple calls of poly simdclones

On 11/5/24 07:39, Richard Biener wrote: On Tue, 5 Nov 2024, Victor Do Nascimento wrote: The current codegen code to support VF's that are multiples of a simdclone simdlen rely on BIT_FIELD_REF to create multiple input vectors. This does not work for non-constant simdclones, so we should disa

Re: Ignore conditions guarding __builtin_unreachable in inliner metrics

> > > > Am 16.11.2024 um 14:08 schrieb Jan Hubicka : > > > > Ignore conditions guarding __builtin_unreachable in inliner metrics > > > > This patch extends my last year attempt to make inliner metric ignore > > conditionals guarding __builtin_unreachable. Compared to previous patch, > > this

[PATCH] libiberity: ANSIfy test-demangle.c

Some of the function definitions used K&R style definitions (but not all). This just moves them all to be ANSI C Bootstrapped and tested on x86_64-linux-gnu. libiberty/ChangeLog: * testsuite/test-demangle.c (get_line): Change K&R style definition into ANSI C90 definitions.

Re: [PATCH v2] MATCH: Simplify `min(a, b) op max(a, b)` to `a op b` [PR109401]

On Sat, Nov 16, 2024 at 10:48 AM Jeff Law wrote: > > > > > On 11/15/24 5:16 AM, Eikansh Gupta wrote: > > Hi Jeff, > > > > The patch has support for both. In the test cases, approx half the test > > cases have |min(a, b) op max(a, b)| and the other half have |max(a, b) > > op min(a, b). | > For som

Re: [PATCH] match: Optimize `max(a, b) == 0` to `(a|b) == 0` for unsigned [PR115275]

> Am 16.11.2024 um 18:50 schrieb Andrew Pinski : > > For unsigned types, you can optimize `max == 0` into > `(a|b) == 0` (that is both have to be zero). A similar thing happens for `!= > 0`. > This optimization fixes the missed optimization (g++.dg/tree-ssa/pr115275.C) > that was reported exp

Re: Ignore conditions guarding __builtin_unreachable in inliner metrics

> Am 16.11.2024 um 14:08 schrieb Jan Hubicka : > > Ignore conditions guarding __builtin_unreachable in inliner metrics > > This patch extends my last year attempt to make inliner metric ignore > conditionals guarding __builtin_unreachable. Compared to previous patch, this > one implements a

Re: [PATCH] libiberity: ANSIfy test-demangle.c

On Sat, Nov 16, 2024 at 10:55:54AM -0800, Andrew Pinski wrote: > Some of the function definitions used K&R style definitions (but not all). > This just moves them all to be ANSI C > > Bootstrapped and tested on x86_64-linux-gnu. > > libiberty/ChangeLog: > > * testsuite/test-demangle.c (get

Re: [Patch, fortran] PR109066 - Segfault when using defined assignment

Hi Thomas, This has to be the shortest interval between submission and pushing of a patch that I have experienced! Pushed to mainline as r15-5347... Thanks for the review! Paul On Sat, 16 Nov 2024 at 15:46, Thomas Koenig wrote: > Hi Paul, > > > > This is a particularly straightforward, goin

Re: Avoid expicit builtion list in tree-ssa-dce

On 11/15/24 7:19 AM, Jan Hubicka wrote: Hi, while working on -fmalloc-dce I noticed that tree-ssa-dce.cc still has an outdated list of builtions that are known to not read memory that can be replaced by query to fnspec and modref. If I get things right, dce does some dead store removal, but o

Re: [patch, avr] Fix PR116781: Fix ICE due to (clobber (match_dup)) in insn pattern

сб, 16 нояб. 2024 г. в 18:01, Georg-Johann Lay : > > Some passes like CSE kick-up when they see a (clobber (match_dup)) in an > insn pattern, like it is the case for avr.md's *tablejump. > > This patch uses a new "scratch_operand" instead. As the clobbered > entity is known, the casesi expander n

[committed] Adjust ARC tests after c23 changes

This test passes different kinds of objects to the underlying function. So just pass in -std=gnu17. Pushing to the trunk. Jeff commit 9c18fe50565a9bf41ecb45a047d14525990fa130 Author: Jeff Law Date: Sat Nov 16 11:26:21 2024 -0700 [committed] Adjust ARC tests after c23 changes

[PATCH V4 3/4] Add -mcpu=future tests

This patch adds simple tests for -mcpu=future. I have built GCC with the patches in this patch set applied on both little and big endian PowerPC systems and there were no regressions. Can I apply this patch to GCC 15? 2024-11-16 Michael Meissner gcc/testsuite/ * gcc.target/powerpc/f

[PATCH] match: Optimize `max(a, b) == 0` to `(a|b) == 0` for unsigned [PR115275]

For unsigned types, you can optimize `max == 0` into `(a|b) == 0` (that is both have to be zero). A similar thing happens for `!= 0`. This optimization fixes the missed optimization (g++.dg/tree-ssa/pr115275.C) that was reported exposed by adding phiprop early. Bootstrapped and tested on x86_64-li

[committed] testsuite: pru: Fix pr64366.c for new -std=gnu23 default

Provide function declaration in order to fix the test case build with the new -std=gnu23 default. Pushed to trunk. gcc/testsuite/ChangeLog: * gcc.target/pru/pr64366.c (foobar): Provide full function delaration. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/p

[PATCH V4 1/2] Add rs6000 architecture masks.

This patch moves the architecture bits that are not user ISA options from rs6000_isa_flags to a new targt variable rs6000_arch_flags. The intention is to remove switches that are currently isa options, but the user should not be using this particular option. For example, we want users to use -mcpu

Re: [PATCH] c++: experiment with (draft) C++ standard metadata

On Sat, Nov 16, 2024 at 12:33:51PM -0500, David Malcolm wrote: > This patch adds metadata to some C++ diagnostics, > referencing a specific section/anchor within a draft > of the C++ standard. For example, this adds > a [depr.volatile.type] tag: > > standard-ref-1.C:1:12: warning: ‘volatile’-qual

[PATCH V4 2/2] Use architecture flags for defining _ARCH_PWR macros.

For the newer architectures, this patch changes GCC to define the _ARCH_PWR macros using the new architecture flags instead of relying on isa options like -mpower10. The -mpower8-internal, -mpower10, -mpower11, and -mfuture options were removed. The -mpower11 and -mfuture options were removed comp

[committed] Fix compilation of testglue wrapper after c23 changes

testglue.c (which is used for exit/abort wrappers in the testsuite) isn't c23 compatible. The testing harness tries to build testglue.c and use it, but doesn't report a failure if the build fails, instead it's just not used. As a result we get all kinds of failures on targets which depend on

[PATCH V4 0/2] Separate PowerPC ISA bits from architecture bits set by -mcpu=

Peter Bergner asked me to reorganize my V3 patch that separates the architecture bits (set via -mcpu=) compared to the ISA bits that are based on options. Here is the beginning of the V3 patch for reference: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668643.html As Peter has suggest

[PATCH V4] Do not allow -mvsx to boost the cpu to power7

Peter Bergner asked me to reorganize my V3 patch that separates the architecture bits (set via -mcpu=) compared to the ISA bits that are based on options. Here is the beginning of the V3 patch for reference: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668643.html As Peter has suggest

[PATCH V4 1/4] Add support for -mcpu=future in the PowerPC

This patch adds the support that can be used in developing GCC support for future PowerPC processors. I have built GCC with the patches in this patch set applied on both little and big endian PowerPC systems and there were no regressions. Can I apply this patch to GCC 15? 2024-11-15 Michael Mei

[PATCH V4 4/4] Use vector pair load/store for memcpy with -mcpu=future

In the development for the power10 processor, GCC did not enable using the load vector pair and store vector pair instructions when optimizing things like memory copy. This patch enables using those instructions if -mcpu=future is used. I have built GCC with the patches in this patch set applied

[PATCH] c++: experiment with (draft) C++ standard metadata

This patch adds metadata to some C++ diagnostics, referencing a specific section/anchor within a draft of the C++ standard. For example, this adds a [depr.volatile.type] tag: standard-ref-1.C:1:12: warning: ‘volatile’-qualified parameter is deprecated [depr.volatile.type] [-Wvolatile] 1 | voi

[PATCH V4 2/4] Add tuning support for -mcpu=future

This patch makes -mtune=future use the same tuning decision as -mtune=power11. I have built GCC with the patches in this patch set applied on both little and big endian PowerPC systems and there were no regressions. Can I apply this patch to GCC 15? 2024-11-16 Michael Meissner gcc/

[r15-5336 Regression] FAIL: gcc.dg/guality/pr36728-4.c -Os -DPREVENT_OPTIMIZATION line 16 y == 2 on Linux/x86_64

On Linux/x86_64, cee7d080d5c2a5fb8125878998b742c040ec88b4 is the first bad commit commit cee7d080d5c2a5fb8125878998b742c040ec88b4 Author: Jan Hubicka Date: Sat Nov 16 14:04:32 2024 +0100 Ignore conditions guarding __builtin_unreachable in inliner metrics caused FAIL: gcc.dg/guality/pr367

[PATCH V4 0/4] Add support for -mcpu=future in the PowerPC

Peter Bergner asked me to reorganize my V3 patch that separates the architecture bits (set via -mcpu=) compared to the ISA bits that are based on options. Here is the beginning of the V3 patch for reference: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668643.html As Peter has suggest

[committed] Fix various sh tests to work with c23

A few SH tests want to create a bool typedef which doesn't work for c23. Easiest fix which should have no impact on the test behavior would be to just change the name of the typedef so that doesn't conflict. One test has a crazy function signature (similar to the PRU test someone just fixed

Re: [patch, Fortran, committed] Handle unsigned constants in modules

On Sat, Nov 16, 2024 at 02:55:11PM +0100, Thomas Koenig wrote: > > Steve found a test case where unsigned constants were not handled > in a module. Single-line patch committed as obvious and simple, > r15-5341-g66096151afc6631f8f2a3458b154c5daa822b963 . > > Best regards > > Thomas > Than

Re: [Patch, fortran] PR109066 - Segfault when using defined assignment

Hi Paul, This is a particularly straightforward, going on 'obvious',  patch. The bug goes back to at least gcc-6.4.1. OK for mainline and, after a week or two, to 13- and 14-branches? As you say, this one is straightforward. OK for trunk and as far back as you care to backport. Thanks for

[committed] libgcc: Fix a warning/error in libgcc2.c [PR117624]

Hi! Since the switch to -std=gnu23 by default, float.h (included from tsystem.h) defines INFINITY macro (to __builtin_inff ()), which now results in a warning when compiling libgcc2.c which defines it to something else (and, worse aarch64 compiles it with -Werror and build fails). libgcc2.c assert

[Patch, fortran] PR109066 - Segfault when using defined assignment

Hi All, This is a particularly straightforward, going on 'obvious', patch. The bug goes back to at least gcc-6.4.1. OK for mainline and, after a week or two, to 13- and 14-branches? Regards Paul Change.Logs Description: Binary data diff --git a/gcc/fortran/resolve.cc b/gcc/fortran/resolve.cc

[pushed] doc: Streamline hppa*-hp-hpux11 installation instructions

I found this while working on PR target/69374 which complains about cruft in our installation documentation. Pushed. Dave, any chance you can go through the HP/UX installation docs and see what else can be trimmed or needs an update? Gerald doc: Streamline hppa*-hp-hpux11 installation instruc

[patch, fortran, doc, committed] Mention that SELECT CASE works for unsigned

Hello world, I just committed the attached documentatin patch as obvious, in r15-5344-gbf00f117eb4b5527592029e39a3d79f2048745d8 . Best regards Thomas Document that SELECT CASE works for unsigned. gcc/fortran/ChangeLog: * gfortran.texi: Document that SELECT CASE works for UNSI

Re: [RFC PATCH 3/5] vect: Fix dominators when adding a guard to skip the vector loop

On Fri, 15 Nov 2024, Alex Coplan wrote: > On 29/10/2024 13:41, Richard Biener wrote: > > On Mon, 28 Oct 2024, Alex Coplan wrote: > > > > > From: Tamar Christina > > > > > > The alignment peeling changes exposed a latent missing dominator update > > > with early break vectorization, specifically

[patch,avr] Fix PR116781: Fix ICE due to (clobber (match_dup)) in insn pattern

Some passes like CSE kick-up when they see a (clobber (match_dup)) in an insn pattern, like it is the case for avr.md's *tablejump. This patch uses a new "scratch_operand" instead. As the clobbered entity is known, the casesi expander now uses REG_Z or scratch:HI. The latter means that the entit

[patch, Fortran, committed] Handle unsigned constants in modules

Hello world, Steve found a test case where unsigned constants were not handled in a module. Single-line patch committed as obvious and simple, r15-5341-g66096151afc6631f8f2a3458b154c5daa822b963 . Best regards Thomas Handle unsigned constants for module I/O. gcc/fortran/ChangeLog:

[PATCH] c: fix incorrect TBAA for tagged types across translation units [PR117490]

Here is a patch to fix a TBAA issue for tagged types. In principle, this affects earlier language modes too, but I limited the change to C23 for now because it was always wrong but is less of an issue before C23. If there is no fallout, I would propose to later fix this also for earlier version

Re: [PATCH 4/4][v2] Flip vectorization to forced SLP

On Fri, 15 Nov 2024, Richard Biener wrote: > The following flips the vectorizer to forced SLP, there is almost > no expected fallout at this point, the remains should be target > specific cost modeling issues. Now pushed as part of the series, r15-5340-g4b8c5b337e007e Richard. > * params.

Ignore conditions guarding __builtin_unreachable in inliner metrics

Ignore conditions guarding __builtin_unreachable in inliner metrics This patch extends my last year attempt to make inliner metric ignore conditionals guarding __builtin_unreachable. Compared to previous patch, this one implements a "mini-dce" in ipa-fnsummary to avoid accounting all statements t

Re: [patch,avr] Adjust comment headers

On Mon, 2 Sep 2024, Georg-Johann Lay wrote: > Atmel is no more the AVR manufacturer. This patch removes the > manufacturer from the file headers. We also have AVR Manufacturer: Atmel https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/avr-mcus";>AVR do

[pushed] c++: adjust some tests for modules

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- We aren't enabling modules by default yet, but let's fix these tests now so they won't fail when that happens. gcc/testsuite/ChangeLog: * g++.dg/template/error25.C: Adjust export diagnostic. * g++.old-deja/g++.benjamin/tem0

Re: [committed] c: Default to -std=gnu23

On Fri, 15 Nov 2024, Joseph Myers wrote: > Change the default language version for C compilation from -std=gnu17 > to -std=gnu23. : > Bootstrapped with no regressions for x86_64-pc-linux-gnu. I started seeing the following on x86_64-unknown-freebsd13.3 over night: .../GCC-HEAD/libiberty/testsuite

[PATCH] libstdc++: Call regex_traits::transform_primary() only when necessary

This is both a performance optimization and a partial fix for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98723. This commit fixes the issue for bracket expressions that do not depend on the locale's collation facet. Examples: * Character ranges ([a-z]) when std::regex::collate is not set * Ch

[PATCH] libstdc++: Call regex_traits::transform_primary() only if necessary

This is both a performance optimization and a partial fix for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98723. This commit fixes the issue for bracket expressions that do not depend on the locale's collation facet. Examples: * Character ranges ([a-z]) when std::regex::collate is not set * Ch

[PATCH v1 2/2] RISC-V: Remove unnecessary option for scalar SAT_TRUNC testcase

From: Pan Li After we create a isolated folder to hold all SAT scalar test, we have fully control of what optimization options passing to the testcase. Thus, it is better to remove the unnecessary work around for flto option, as well as the -O3 option for each cases. The riscv.exp will pass sor

[PATCH v1 1/2] RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC]

From: Pan Li The test files of scalar SAT_TRUNC only has numbers as the suffix. Rearrange the file name to -{form number}-{target-type}. For example, test form 3 for uint32_t SAT_TRUNC will have -3-u32.c for asm check and -run-3-u32.c for the run test. Meanwhile, all related test files moved to

Re: [PATCH] RISC-V:Support N32(32-bit ABI on 64-bit ISA) in riscv

This patch works fine with the rv64ilp32 Linux kernel self-building. It is tested with binutils together. Tested-by: Guo Ren On Sat, Nov 16, 2024 at 12:22 PM Liao Shihua wrote: > > RISC-V N32 ABI means using 32-bit ABI on 64-bit ISA, the discussion in > https://github.com/riscv-non-isa/riscv-e

[PATCH V4 5/5] Change TARGET_MODULO to TARGET_POWER9.

This patch changes TARGET_MODULO to TARGET_POWER9. The -mmodulo switch is not being changed, just the name of the macros used to determine if the PowerPC processor supports ISA 3.0 (Power9). I have built GCC for both big and little endian systems and there were no regressions. Can I check this p

[PATCH V4 3/5] Change TARGET_CMPB to TARGET_POWER6.

This patch changes TARGET_CMPB to TARGET_POWER6. The -mcmpb switch is not being changed, just the name of the macros used to determine if the PowerPC processor supports ISA 2.5 (Power6). I have built GCC on both big end little endian systems and there were no regressions. Can I check this into G

[PATCH V4 4/5] Change TARGET_POPCNTD to TARGET_POWER7.

This patch changes TARGET_POPCNTD to TARGET_POWER7. The -mpopcntd switch is not being changed, just the name of the macros used to determine if the PowerPC processor supports ISA 2.6 (Power7). I have built GCC on both big and little endian systems and there were no regressions. Can I check this

[PATCH V4 2/5] Change TARGET_FPRND to TARGET_POWER5X.

This patch changes TARGET_POWER5X to TARGET_POWER5. The -mfprnd switch is not being changed, just the name of the macros used to determine if the PowerPC processor supports ISA 2.4 (Power5x). I have GCC with this patch on both big and little endian systems and there were no regressions. Can I ch

[PATCH V4 1/5] Change TARGET_POPCNTB to TARGET_POWER5.

This patch changes TARGET_POPCNTB to TARGET_POWER5. The -mpopcntb switch is not being changed in this patch, just the name of the macros used to determine if the PowerPC processor supports ISA 2.2 (Power5). I have tested this on both big and little endian PowerPC systems and there is no regresion